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atomic: Switch sh to builtin atomics
Switch sh to builtin atomics. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
This commit is contained in:
Wilco Dijkstra
@@ -17,381 +17,7 @@
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<https://www.gnu.org/licenses/>. */
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#define __HAVE_64B_ATOMICS 0
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#define USE_ATOMIC_COMPILER_BUILTINS 0
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#define USE_ATOMIC_COMPILER_BUILTINS 1
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/* XXX Is this actually correct? */
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#define ATOMIC_EXCHANGE_USES_CAS 1
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/* SH kernel has implemented a gUSA ("g" User Space Atomicity) support
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for the user space atomicity. The atomicity macros use this scheme.
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Reference:
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Niibe Yutaka, "gUSA: Simple and Efficient User Space Atomicity
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Emulation with Little Kernel Modification", Linux Conference 2002,
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Japan. http://lc.linux.or.jp/lc2002/papers/niibe0919h.pdf (in
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Japanese).
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B.N. Bershad, D. Redell, and J. Ellis, "Fast Mutual Exclusion for
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Uniprocessors", Proceedings of the Fifth Architectural Support for
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Programming Languages and Operating Systems (ASPLOS), pp. 223-233,
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October 1992. http://www.cs.washington.edu/homes/bershad/Papers/Rcs.ps
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SuperH ABI:
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r15: -(size of atomic instruction sequence) < 0
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r0: end point
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r1: saved stack pointer
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*/
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#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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({ __typeof (*(mem)) __result; \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%1,%0\n\
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cmp/eq %0,%3\n\
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bf 1f\n\
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mov.b %2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__result) : "u" (mem), "u" (newval), "u" (oldval) \
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: "r0", "r1", "t", "memory"); \
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__result; })
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#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
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({ __typeof (*(mem)) __result; \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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mov #-8,r15\n\
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0: mov.w @%1,%0\n\
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cmp/eq %0,%3\n\
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bf 1f\n\
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mov.w %2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__result) : "u" (mem), "u" (newval), "u" (oldval) \
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: "r0", "r1", "t", "memory"); \
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__result; })
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ __typeof (*(mem)) __result; \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%1,%0\n\
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cmp/eq %0,%3\n\
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bf 1f\n\
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mov.l %2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__result) : "u" (mem), "u" (newval), "u" (oldval) \
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: "r0", "r1", "t", "memory"); \
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__result; })
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/* XXX We do not really need 64-bit compare-and-exchange. At least
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not in the moment. Using it would mean causing portability
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problems since not many other 32-bit architectures have support for
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such an operation. So don't define any code for now. */
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# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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(abort (), (__typeof (*mem)) 0)
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#define atomic_exchange_and_add(mem, value) \
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({ __typeof (*(mem)) __result, __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%2,%0\n\
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mov %1,r2\n\
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add %0,r2\n\
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mov.b r2,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.w @%2,%0\n\
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mov %1,r2\n\
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add %0,r2\n\
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mov.w r2,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%2,%0\n\
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mov %1,r2\n\
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add %0,r2\n\
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mov.l r2,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else \
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{ \
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__typeof (mem) memp = (mem); \
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do \
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__result = *memp; \
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while (__arch_compare_and_exchange_val_64_acq \
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(memp, __result + __value, __result) == __result); \
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(void) __value; \
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} \
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__result; })
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#define atomic_add(mem, value) \
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(void) ({ __typeof (*(mem)) __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%1,r2\n\
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add %0,r2\n\
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mov.b r2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__tmp) : "u" (mem), "0" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.w @%1,r2\n\
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add %0,r2\n\
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mov.w r2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__tmp) : "u" (mem), "0" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%1,r2\n\
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add %0,r2\n\
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mov.l r2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__tmp) : "u" (mem), "0" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else \
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{ \
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__typeof (*(mem)) oldval; \
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__typeof (mem) memp = (mem); \
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do \
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oldval = *memp; \
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while (__arch_compare_and_exchange_val_64_acq \
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(memp, oldval + __value, oldval) == oldval); \
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(void) __value; \
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} \
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})
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#define atomic_add_negative(mem, value) \
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({ unsigned char __result; \
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__typeof (*(mem)) __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%2,r2\n\
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add %1,r2\n\
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mov.b r2,@%2\n\
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1: mov r1,r15\n\
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shal r2\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.w @%2,r2\n\
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add %1,r2\n\
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mov.w r2,@%2\n\
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1: mov r1,r15\n\
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shal r2\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%2,r2\n\
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add %1,r2\n\
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mov.l r2,@%2\n\
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1: mov r1,r15\n\
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shal r2\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else \
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abort (); \
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__result; })
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#define atomic_add_zero(mem, value) \
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({ unsigned char __result; \
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__typeof (*(mem)) __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%2,r2\n\
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add %1,r2\n\
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mov.b r2,@%2\n\
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1: mov r1,r15\n\
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tst r2,r2\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.w @%2,r2\n\
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add %1,r2\n\
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mov.w r2,@%2\n\
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1: mov r1,r15\n\
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tst r2,r2\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%2,r2\n\
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add %1,r2\n\
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mov.l r2,@%2\n\
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1: mov r1,r15\n\
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tst r2,r2\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else \
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abort (); \
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__result; })
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#define atomic_increment_and_test(mem) atomic_add_zero((mem), 1)
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#define atomic_decrement_and_test(mem) atomic_add_zero((mem), -1)
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#define atomic_bit_set(mem, bit) \
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(void) ({ unsigned int __mask = 1 << (bit); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%0,r2\n\
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or %1,r2\n\
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mov.b r2,@%0\n\
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1: mov r1,r15"\
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: : "u" (mem), "u" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.w @%0,r2\n\
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or %1,r2\n\
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mov.w r2,@%0\n\
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1: mov r1,r15"\
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: : "u" (mem), "u" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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mova 1f,r0\n\
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mov r15,r1\n\
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.align 2\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%0,r2\n\
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or %1,r2\n\
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mov.l r2,@%0\n\
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1: mov r1,r15"\
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: : "u" (mem), "u" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else \
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abort (); \
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})
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#define atomic_bit_test_set(mem, bit) \
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({ unsigned int __mask = 1 << (bit); \
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unsigned int __result = __mask; \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.b @%2,r2\n\
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mov r2,r3\n\
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or %1,r2\n\
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mov.b r2,@%2\n\
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1: mov r1,r15\n\
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and r3,%0"\
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: "=&r" (__result), "=&r" (__mask) \
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: "u" (mem), "0" (__result), "1" (__mask) \
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: "r0", "r1", "r2", "r3", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.w @%2,r2\n\
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mov r2,r3\n\
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or %1,r2\n\
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mov.w %1,@%2\n\
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1: mov r1,r15\n\
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and r3,%0"\
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: "=&r" (__result), "=&r" (__mask) \
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: "u" (mem), "0" (__result), "1" (__mask) \
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: "r0", "r1", "r2", "r3", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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mova 1f,r0\n\
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.align 2\n\
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mov r15,r1\n\
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mov #(0f-1f),r15\n\
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0: mov.l @%2,r2\n\
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mov r2,r3\n\
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or r2,%1\n\
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mov.l %1,@%2\n\
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1: mov r1,r15\n\
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and r3,%0"\
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: "=&r" (__result), "=&r" (__mask) \
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: "u" (mem), "0" (__result), "1" (__mask) \
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: "r0", "r1", "r2", "r3", "memory"); \
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else \
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abort (); \
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__result; })
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||||
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