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ppc64le: Restore optimized strcmp for power10
This patch addresses the actual cause of CVE-2025-5702
The vector non-volatile registers are not used anymore for
32 byte load and comparison operation
Additionally, the assembler workaround used earlier for the
instruction lxvp is replaced with actual instruction.
Signed-off-by: Sachin Monga <smonga@linux.ibm.com>
Co-authored-by: Paul Murphy <paumurph@redhat.com>
(cherry picked from commit 9a40b1cda5)
This commit is contained in:
Sachin Monga
185
sysdeps/powerpc/powerpc64/le/power10/strcmp.S
Normal file
185
sysdeps/powerpc/powerpc64/le/power10/strcmp.S
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@@ -0,0 +1,185 @@
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/* Optimized strcmp implementation for PowerPC64/POWER10.
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Copyright (C) 2025 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#ifndef STRCMP
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# define STRCMP strcmp
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#endif
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/* Implements the function
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int [r3] strcmp (const char *s1 [r3], const char *s2 [r4]). */
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#define COMPARE_16(vreg1,vreg2,offset) \
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lxv vreg1+32,offset(r3); \
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lxv vreg2+32,offset(r4); \
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vcmpnezb. v7,vreg1,vreg2; \
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bne cr6,L(different); \
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#define COMPARE_32(vreg1,vreg2,offset,label1,label2) \
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lxvp vreg1+32,offset(r3); \
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lxvp vreg2+32,offset(r4); \
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vcmpnezb. v7,vreg1+1,vreg2+1; \
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bne cr6,L(label1); \
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vcmpnezb. v7,vreg1,vreg2; \
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bne cr6,L(label2); \
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#define TAIL(vreg1,vreg2) \
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vctzlsbb r6,v7; \
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vextubrx r5,r6,vreg1; \
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vextubrx r4,r6,vreg2; \
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subf r3,r4,r5; \
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blr; \
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#define CHECK_N_BYTES(reg1,reg2,len_reg) \
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sldi r0,len_reg,56; \
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lxvl 32+v4,reg1,r0; \
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lxvl 32+v5,reg2,r0; \
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add reg1,reg1,len_reg; \
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add reg2,reg2,len_reg; \
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vcmpnezb. v7,v4,v5; \
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vctzlsbb r6,v7; \
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cmpld cr7,r6,len_reg; \
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blt cr7,L(different); \
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.machine power10
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ENTRY_TOCLESS (STRCMP, 4)
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li r11,16
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/* eq bit of cr1 used as swap status flag to indicate if
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source pointers were swapped. */
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crclr 4*cr1+eq
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andi. r7,r3,15
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sub r7,r11,r7 /* r7(nalign1) = 16 - (str1 & 15). */
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andi. r9,r4,15
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sub r5,r11,r9 /* r5(nalign2) = 16 - (str2 & 15). */
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cmpld cr7,r7,r5
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beq cr7,L(same_aligned)
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blt cr7,L(nalign1_min)
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/* Swap r3 and r4, and r7 and r5 such that r3 and r7 hold the
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pointer which is closer to the next 16B boundary so that only
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one CHECK_N_BYTES is needed before entering the loop below. */
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mr r8,r4
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mr r4,r3
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mr r3,r8
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mr r12,r7
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mr r7,r5
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mr r5,r12
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crset 4*cr1+eq /* Set bit on swapping source pointers. */
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.p2align 5
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L(nalign1_min):
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CHECK_N_BYTES(r3,r4,r7)
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.p2align 5
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L(s1_aligned):
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/* r9 and r5 is number of bytes to be read after and before
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page boundary correspondingly. */
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sub r5,r5,r7
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subfic r9,r5,16
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/* Now let r7 hold the count of quadwords which can be
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checked without crossing a page boundary. quadword offset is
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(str2>>4)&0xFF. */
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rlwinm r7,r4,28,0xFF
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/* Below check is required only for first iteration. For second
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iteration and beyond, the new loop counter is always 255. */
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cmpldi r7,255
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beq L(L3)
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/* Get the initial loop count by 255-((str2>>4)&0xFF). */
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subfic r11,r7,255
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.p2align 5
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L(L1):
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mtctr r11
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.p2align 5
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L(L2):
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COMPARE_16(v4,v5,0) /* Load 16B blocks using lxv. */
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addi r3,r3,16
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addi r4,r4,16
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bdnz L(L2)
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/* Cross the page boundary of s2, carefully. */
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.p2align 5
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L(L3):
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CHECK_N_BYTES(r3,r4,r5)
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CHECK_N_BYTES(r3,r4,r9)
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li r11,255 /* Load the new loop counter. */
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b L(L1)
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.p2align 5
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L(same_aligned):
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CHECK_N_BYTES(r3,r4,r7)
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/* Align s1 to 32B and adjust s2 address.
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Use lxvp only if both s1 and s2 are 32B aligned. */
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COMPARE_16(v4,v5,0)
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COMPARE_16(v4,v5,16)
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COMPARE_16(v4,v5,32)
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COMPARE_16(v4,v5,48)
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addi r3,r3,64
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addi r4,r4,64
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COMPARE_16(v4,v5,0)
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COMPARE_16(v4,v5,16)
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clrldi r6,r3,59
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subfic r5,r6,32
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add r3,r3,r5
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add r4,r4,r5
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andi. r5,r4,0x1F
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beq cr0,L(32B_aligned_loop)
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.p2align 5
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L(16B_aligned_loop):
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COMPARE_16(v4,v5,0)
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COMPARE_16(v4,v5,16)
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COMPARE_16(v4,v5,32)
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COMPARE_16(v4,v5,48)
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addi r3,r3,64
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addi r4,r4,64
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b L(16B_aligned_loop)
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/* Calculate and return the difference. */
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L(different):
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vctzlsbb r6,v7
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vextubrx r5,r6,v4
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vextubrx r4,r6,v5
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bt 4*cr1+eq,L(swapped)
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subf r3,r4,r5
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blr
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/* If src pointers were swapped, then swap the
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indices and calculate the return value. */
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L(swapped):
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subf r3,r5,r4
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blr
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.p2align 5
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L(32B_aligned_loop):
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COMPARE_32(v14,v16,0,tail1,tail2)
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COMPARE_32(v14,v16,32,tail1,tail2)
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COMPARE_32(v14,v16,64,tail1,tail2)
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COMPARE_32(v14,v16,96,tail1,tail2)
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addi r3,r3,128
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addi r4,r4,128
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b L(32B_aligned_loop)
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L(tail1): TAIL(v15,v17)
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L(tail2): TAIL(v14,v16)
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END (STRCMP)
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libc_hidden_builtin_def (strcmp)
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@@ -33,7 +33,7 @@ sysdep_routines += memcpy-power8-cached memcpy-power7 memcpy-a2 memcpy-power6 \
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ifneq (,$(filter %le,$(config-machine)))
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sysdep_routines += memcmp-power10 memcpy-power10 memmove-power10 memset-power10 \
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rawmemchr-power9 rawmemchr-power10 \
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strcmp-power9 strncmp-power9 \
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strcmp-power9 strcmp-power10 strncmp-power9 \
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strcpy-power9 strcat-power10 stpcpy-power9 \
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strlen-power9 strncpy-power9 stpncpy-power9 strlen-power10
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endif
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@@ -377,6 +377,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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/* Support sysdeps/powerpc/powerpc64/multiarch/strcmp.c. */
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IFUNC_IMPL (i, name, strcmp,
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#ifdef __LITTLE_ENDIAN__
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IFUNC_IMPL_ADD (array, i, strcmp,
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(hwcap2 & PPC_FEATURE2_ARCH_3_1)
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&& (hwcap & PPC_FEATURE_HAS_VSX),
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__strcmp_power10)
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IFUNC_IMPL_ADD (array, i, strcmp,
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hwcap2 & PPC_FEATURE2_ARCH_3_00
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&& hwcap & PPC_FEATURE_HAS_ALTIVEC,
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26
sysdeps/powerpc/powerpc64/multiarch/strcmp-power10.S
Normal file
26
sysdeps/powerpc/powerpc64/multiarch/strcmp-power10.S
Normal file
@@ -0,0 +1,26 @@
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/* Optimized strcmp implementation for POWER10/PPC64.
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Copyright (C) 2025 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#if defined __LITTLE_ENDIAN__ && IS_IN (libc)
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#define STRCMP __strcmp_power10
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#undef libc_hidden_builtin_def
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#define libc_hidden_builtin_def(name)
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#include <sysdeps/powerpc/powerpc64/le/power10/strcmp.S>
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#endif /* __LITTLE_ENDIAN__ && IS_IN (libc) */
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@@ -29,12 +29,16 @@ extern __typeof (strcmp) __strcmp_power7 attribute_hidden;
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extern __typeof (strcmp) __strcmp_power8 attribute_hidden;
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# ifdef __LITTLE_ENDIAN__
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extern __typeof (strcmp) __strcmp_power9 attribute_hidden;
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extern __typeof (strcmp) __strcmp_power10 attribute_hidden;
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# endif
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# undef strcmp
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libc_ifunc_redirected (__redirect_strcmp, strcmp,
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# ifdef __LITTLE_ENDIAN__
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(hwcap2 & PPC_FEATURE2_ARCH_3_1
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&& hwcap & PPC_FEATURE_HAS_VSX)
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? __strcmp_power10 :
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(hwcap2 & PPC_FEATURE2_ARCH_3_00
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&& hwcap & PPC_FEATURE_HAS_ALTIVEC)
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? __strcmp_power9 :
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