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Merge pull request #11496 from SparkiDev/aarch64_asm_fixup_1

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AArch64 assembly: branch instructions
This commit is contained in:
Tobias Frauenschläger
2026-10-16 08:46:03 +02:00
committed by GitHub
parent 5e7fc2203d f6671beda0
commit 68d83d2a7f
18 changed files with 2093 additions and 2093 deletions
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1788
wolfcrypt/src/port/arm/armv8-aes-asm.S
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File diff suppressed because it is too large Load Diff

1788
wolfcrypt/src/port/arm/armv8-aes-asm.asm
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File diff suppressed because it is too large Load Diff

48
wolfcrypt/src/port/arm/armv8-chacha-asm.S
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@@ -117,7 +117,7 @@ _wc_chacha_crypt_bytes:
# Load state to encrypt
ld1 {v16.4s, v17.4s, v18.4s, v19.4s}, [x0]
cmp x3, #0x140
blt L_chacha_crypt_bytes_arm64_lt_320
b.lt L_chacha_crypt_bytes_arm64_lt_320
mov w25, #4
L_chacha_crypt_bytes_arm64_loop_320:
# Move state into regular register
@@ -380,7 +380,7 @@ L_chacha_crypt_bytes_arm64_round_start_320:
sri v6.4s, v21.4s, #25
sri v7.4s, v22.4s, #25
sri v4.4s, v23.4s, #25
bne L_chacha_crypt_bytes_arm64_round_start_320
b.ne L_chacha_crypt_bytes_arm64_round_start_320
# Add counter now rather than after transposed
add v12.4s, v12.4s, v28.4s
add w21, w21, w25
@@ -489,11 +489,11 @@ L_chacha_crypt_bytes_arm64_round_start_320:
st1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x1], #0x40
cmp x3, #0x140
add v19.4s, v19.4s, v29.4s
bge L_chacha_crypt_bytes_arm64_loop_320
b.ge L_chacha_crypt_bytes_arm64_loop_320
# Done doing 320 bytes at a time
L_chacha_crypt_bytes_arm64_lt_320:
cmp x3, #0x100
blt L_chacha_crypt_bytes_arm64_lt_256
b.lt L_chacha_crypt_bytes_arm64_lt_256
# Move state into vector registers
dup v0.4s, v16.s[0]
dup v1.4s, v16.s[1]
@@ -639,7 +639,7 @@ L_chacha_crypt_bytes_arm64_round_start_256:
sri v6.4s, v21.4s, #25
sri v7.4s, v22.4s, #25
sri v4.4s, v23.4s, #25
bne L_chacha_crypt_bytes_arm64_round_start_256
b.ne L_chacha_crypt_bytes_arm64_round_start_256
mov x26, #4
# Add counter now rather than after transposed
add v12.4s, v12.4s, v28.4s
@@ -724,7 +724,7 @@ L_chacha_crypt_bytes_arm64_round_start_256:
# Done 256-byte block
L_chacha_crypt_bytes_arm64_lt_256:
cmp x3, #0x80
blt L_chacha_crypt_bytes_arm64_lt_128
b.lt L_chacha_crypt_bytes_arm64_lt_128
ld1 {v24.16b, v25.16b, v26.16b, v27.16b}, [x2], #0x40
# Move state into vector registers
mov v4.16b, v16.16b
@@ -819,7 +819,7 @@ L_chacha_crypt_bytes_arm64_round_start_128:
ext v5.16b, v5.16b, v5.16b, #12
ext v2.16b, v2.16b, v2.16b, #8
ext v6.16b, v6.16b, v6.16b, #8
bne L_chacha_crypt_bytes_arm64_round_start_128
b.ne L_chacha_crypt_bytes_arm64_round_start_128
# Add back state, XOR in message and store (load next block)
add v0.4s, v0.4s, v16.4s
add v1.4s, v1.4s, v17.4s
@@ -846,7 +846,7 @@ L_chacha_crypt_bytes_arm64_round_start_128:
# Done 128-byte block
L_chacha_crypt_bytes_arm64_lt_128:
cmp x3, #0
beq L_chacha_crypt_bytes_arm64_done_all
b.eq L_chacha_crypt_bytes_arm64_done_all
mov w5, #0x40
L_chacha_crypt_bytes_arm64_loop_64:
# Move state into vector registers
@@ -902,7 +902,7 @@ L_chacha_crypt_bytes_arm64_round_64:
ext v3.16b, v3.16b, v3.16b, #4
ext v1.16b, v1.16b, v1.16b, #12
ext v2.16b, v2.16b, v2.16b, #8
bne L_chacha_crypt_bytes_arm64_round_64
b.ne L_chacha_crypt_bytes_arm64_round_64
# Add back state
add v0.4s, v0.4s, v16.4s
add v1.4s, v1.4s, v17.4s
@@ -911,7 +911,7 @@ L_chacha_crypt_bytes_arm64_round_64:
# Check if data is less than 64 bytes - store in over
cmp x3, #0x40
add v19.4s, v19.4s, v31.4s
blt L_chacha_crypt_bytes_arm64_lt_64
b.lt L_chacha_crypt_bytes_arm64_lt_64
# Encipher 64 bytes
ld1 {v24.16b, v25.16b, v26.16b, v27.16b}, [x2], #0x40
eor v24.16b, v24.16b, v0.16b
@@ -921,7 +921,7 @@ L_chacha_crypt_bytes_arm64_round_64:
st1 {v24.16b, v25.16b, v26.16b, v27.16b}, [x1], #0x40
# Check for more bytes to be enciphered
subs x3, x3, #0x40
bne L_chacha_crypt_bytes_arm64_loop_64
b.ne L_chacha_crypt_bytes_arm64_loop_64
b L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_64:
# Calculate bytes left in block not used
@@ -931,7 +931,7 @@ L_chacha_crypt_bytes_arm64_lt_64:
str w5, [x0, #64]
# Encipher 32 bytes
cmp x3, #32
blt L_chacha_crypt_bytes_arm64_lt_32
b.lt L_chacha_crypt_bytes_arm64_lt_32
ld1 {v24.16b, v25.16b}, [x2], #32
eor v24.16b, v24.16b, v0.16b
eor v25.16b, v25.16b, v1.16b
@@ -939,27 +939,27 @@ L_chacha_crypt_bytes_arm64_lt_64:
subs x3, x3, #32
mov v0.16b, v2.16b
mov v1.16b, v3.16b
beq L_chacha_crypt_bytes_arm64_done
b.eq L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_32:
cmp x3, #16
blt L_chacha_crypt_bytes_arm64_lt_16
b.lt L_chacha_crypt_bytes_arm64_lt_16
# Encipher 16 bytes
ld1 {v24.16b}, [x2], #16
eor v24.16b, v24.16b, v0.16b
st1 {v24.16b}, [x1], #16
subs x3, x3, #16
mov v0.16b, v1.16b
beq L_chacha_crypt_bytes_arm64_done
b.eq L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_16:
cmp x3, #8
blt L_chacha_crypt_bytes_arm64_lt_8
b.lt L_chacha_crypt_bytes_arm64_lt_8
# Encipher 8 bytes
ld1 {v24.8b}, [x2], #8
eor v24.8b, v24.8b, v0.8b
st1 {v24.8b}, [x1], #8
subs x3, x3, #8
mov v0.d[0], v0.d[1]
beq L_chacha_crypt_bytes_arm64_done
b.eq L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_8:
mov x5, v0.d[0]
L_chacha_crypt_bytes_arm64_loop_lt_8:
@@ -969,7 +969,7 @@ L_chacha_crypt_bytes_arm64_loop_lt_8:
strb w6, [x1], #1
subs x3, x3, #1
lsr x5, x5, #8
bgt L_chacha_crypt_bytes_arm64_loop_lt_8
b.gt L_chacha_crypt_bytes_arm64_loop_lt_8
L_chacha_crypt_bytes_arm64_done:
L_chacha_crypt_bytes_arm64_done_all:
st1 {v16.4s, v17.4s, v18.4s, v19.4s}, [x0]
@@ -1058,7 +1058,7 @@ _wc_chacha_setkey:
#endif /* BIG_ENDIAN_ORDER */
st1 {v0.4s}, [x0], #16
st1 {v1.4s}, [x0], #16
beq L_chacha_setkey_arm64_done
b.eq L_chacha_setkey_arm64_done
ld1 {v1.16b}, [x1]
#ifdef BIG_ENDIAN_ORDER
rev32 v1.8h, v1.8h
@@ -1085,25 +1085,25 @@ _wc_chacha_use_over:
#endif /* __APPLE__ */
L_chacha_use_over_arm64_16byte_loop:
cmp x3, #16
blt L_chacha_use_over_arm64_word_loop
b.lt L_chacha_use_over_arm64_word_loop
# 16 bytes of state XORed into message.
ld1 {v0.16b}, [x0], #16
ld1 {v1.16b}, [x2], #16
eor v1.16b, v1.16b, v0.16b
subs x3, x3, #16
st1 {v1.16b}, [x1], #16
beq L_chacha_use_over_arm64_done
b.eq L_chacha_use_over_arm64_done
b L_chacha_use_over_arm64_16byte_loop
L_chacha_use_over_arm64_word_loop:
cmp x3, #4
blt L_chacha_use_over_arm64_byte_loop
b.lt L_chacha_use_over_arm64_byte_loop
# 4 bytes of state XORed into message.
ldr w4, [x0], #4
ldr w5, [x2], #4
eor w5, w5, w4
subs x3, x3, #4
str w5, [x1], #4
beq L_chacha_use_over_arm64_done
b.eq L_chacha_use_over_arm64_done
b L_chacha_use_over_arm64_word_loop
L_chacha_use_over_arm64_byte_loop:
# 1 bytes of state XORed into message.
@@ -1112,7 +1112,7 @@ L_chacha_use_over_arm64_byte_loop:
eor w5, w5, w4
subs x3, x3, #1
strb w5, [x1], #1
bne L_chacha_use_over_arm64_byte_loop
b.ne L_chacha_use_over_arm64_byte_loop
L_chacha_use_over_arm64_done:
ret
#ifndef __APPLE__

48
wolfcrypt/src/port/arm/armv8-chacha-asm.asm
View File

@@ -64,7 +64,7 @@ wc_chacha_crypt_bytes PROC
; Load state to encrypt
ld1 {V16.4S, V17.4S, V18.4S, V19.4S}, [x0]
cmp x3, #0x140
blt L_chacha_crypt_bytes_arm64_lt_320
b.lt L_chacha_crypt_bytes_arm64_lt_320
mov w25, #4
L_chacha_crypt_bytes_arm64_loop_320
; Move state into regular register
@@ -327,7 +327,7 @@ L_chacha_crypt_bytes_arm64_round_start_320
sri V6.4S, V21.4S, #25
sri V7.4S, V22.4S, #25
sri V4.4S, V23.4S, #25
bne L_chacha_crypt_bytes_arm64_round_start_320
b.ne L_chacha_crypt_bytes_arm64_round_start_320
; Add counter now rather than after transposed
add V12.4S, V12.4S, V28.4S
add w21, w21, w25
@@ -436,11 +436,11 @@ L_chacha_crypt_bytes_arm64_round_start_320
st1 {V0.4S, V1.4S, V2.4S, V3.4S}, [x1], #0x40
cmp x3, #0x140
add V19.4S, V19.4S, V29.4S
bge L_chacha_crypt_bytes_arm64_loop_320
b.ge L_chacha_crypt_bytes_arm64_loop_320
; Done doing 320 bytes at a time
L_chacha_crypt_bytes_arm64_lt_320
cmp x3, #0x100
blt L_chacha_crypt_bytes_arm64_lt_256
b.lt L_chacha_crypt_bytes_arm64_lt_256
; Move state into vector registers
dup V0.4S, V16.S[0]
dup V1.4S, V16.S[1]
@@ -586,7 +586,7 @@ L_chacha_crypt_bytes_arm64_round_start_256
sri V6.4S, V21.4S, #25
sri V7.4S, V22.4S, #25
sri V4.4S, V23.4S, #25
bne L_chacha_crypt_bytes_arm64_round_start_256
b.ne L_chacha_crypt_bytes_arm64_round_start_256
mov x26, #4
; Add counter now rather than after transposed
add V12.4S, V12.4S, V28.4S
@@ -671,7 +671,7 @@ L_chacha_crypt_bytes_arm64_round_start_256
; Done 256-byte block
L_chacha_crypt_bytes_arm64_lt_256
cmp x3, #0x80
blt L_chacha_crypt_bytes_arm64_lt_128
b.lt L_chacha_crypt_bytes_arm64_lt_128
ld1 {V24.16B, V25.16B, V26.16B, V27.16B}, [x2], #0x40
; Move state into vector registers
mov V4.16B, V16.16B
@@ -766,7 +766,7 @@ L_chacha_crypt_bytes_arm64_round_start_128
ext8 V5.16B, V5.16B, V5.16B, #12
ext8 V2.16B, V2.16B, V2.16B, #8
ext8 V6.16B, V6.16B, V6.16B, #8
bne L_chacha_crypt_bytes_arm64_round_start_128
b.ne L_chacha_crypt_bytes_arm64_round_start_128
; Add back state, XOR in message and store (load next block)
add V0.4S, V0.4S, V16.4S
add V1.4S, V1.4S, V17.4S
@@ -793,7 +793,7 @@ L_chacha_crypt_bytes_arm64_round_start_128
; Done 128-byte block
L_chacha_crypt_bytes_arm64_lt_128
cmp x3, #0
beq L_chacha_crypt_bytes_arm64_done_all
b.eq L_chacha_crypt_bytes_arm64_done_all
mov w5, #0x40
L_chacha_crypt_bytes_arm64_loop_64
; Move state into vector registers
@@ -849,7 +849,7 @@ L_chacha_crypt_bytes_arm64_round_64
ext8 V3.16B, V3.16B, V3.16B, #4
ext8 V1.16B, V1.16B, V1.16B, #12
ext8 V2.16B, V2.16B, V2.16B, #8
bne L_chacha_crypt_bytes_arm64_round_64
b.ne L_chacha_crypt_bytes_arm64_round_64
; Add back state
add V0.4S, V0.4S, V16.4S
add V1.4S, V1.4S, V17.4S
@@ -858,7 +858,7 @@ L_chacha_crypt_bytes_arm64_round_64
; Check if data is less than 64 bytes - store in over
cmp x3, #0x40
add V19.4S, V19.4S, V31.4S
blt L_chacha_crypt_bytes_arm64_lt_64
b.lt L_chacha_crypt_bytes_arm64_lt_64
; Encipher 64 bytes
ld1 {V24.16B, V25.16B, V26.16B, V27.16B}, [x2], #0x40
eor V24.16B, V24.16B, V0.16B
@@ -868,7 +868,7 @@ L_chacha_crypt_bytes_arm64_round_64
st1 {V24.16B, V25.16B, V26.16B, V27.16B}, [x1], #0x40
; Check for more bytes to be enciphered
subs x3, x3, #0x40
bne L_chacha_crypt_bytes_arm64_loop_64
b.ne L_chacha_crypt_bytes_arm64_loop_64
b L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_64
; Calculate bytes left in block not used
@@ -878,7 +878,7 @@ L_chacha_crypt_bytes_arm64_lt_64
str w5, [x0, #64]
; Encipher 32 bytes
cmp x3, #32
blt L_chacha_crypt_bytes_arm64_lt_32
b.lt L_chacha_crypt_bytes_arm64_lt_32
ld1 {V24.16B, V25.16B}, [x2], #32
eor V24.16B, V24.16B, V0.16B
eor V25.16B, V25.16B, V1.16B
@@ -886,27 +886,27 @@ L_chacha_crypt_bytes_arm64_lt_64
subs x3, x3, #32
mov V0.16B, V2.16B
mov V1.16B, V3.16B
beq L_chacha_crypt_bytes_arm64_done
b.eq L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_32
cmp x3, #16
blt L_chacha_crypt_bytes_arm64_lt_16
b.lt L_chacha_crypt_bytes_arm64_lt_16
; Encipher 16 bytes
ld1 {V24.16B}, [x2], #16
eor V24.16B, V24.16B, V0.16B
st1 {V24.16B}, [x1], #16
subs x3, x3, #16
mov V0.16B, V1.16B
beq L_chacha_crypt_bytes_arm64_done
b.eq L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_16
cmp x3, #8
blt L_chacha_crypt_bytes_arm64_lt_8
b.lt L_chacha_crypt_bytes_arm64_lt_8
; Encipher 8 bytes
ld1 {V24.8B}, [x2], #8
eor V24.8B, V24.8B, V0.8B
st1 {V24.8B}, [x1], #8
subs x3, x3, #8
mov V0.D[0], V0.D[1]
beq L_chacha_crypt_bytes_arm64_done
b.eq L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_lt_8
mov x5, V0.D[0]
L_chacha_crypt_bytes_arm64_loop_lt_8
@@ -916,7 +916,7 @@ L_chacha_crypt_bytes_arm64_loop_lt_8
strb w6, [x1], #1
subs x3, x3, #1
lsr x5, x5, #8
bgt L_chacha_crypt_bytes_arm64_loop_lt_8
b.gt L_chacha_crypt_bytes_arm64_loop_lt_8
L_chacha_crypt_bytes_arm64_done
L_chacha_crypt_bytes_arm64_done_all
st1 {V16.4S, V17.4S, V18.4S, V19.4S}, [x0]
@@ -964,7 +964,7 @@ wc_chacha_setkey PROC
ENDIF
st1 {V0.4S}, [x0], #16
st1 {V1.4S}, [x0], #16
beq L_chacha_setkey_arm64_done
b.eq L_chacha_setkey_arm64_done
ld1 {V1.16B}, [x1]
IF :DEF:BIG_ENDIAN_ORDER
rev32 V1.8H, V1.8H
@@ -979,25 +979,25 @@ L_chacha_setkey_arm64_done
wc_chacha_use_over PROC
L_chacha_use_over_arm64_16byte_loop
cmp x3, #16
blt L_chacha_use_over_arm64_word_loop
b.lt L_chacha_use_over_arm64_word_loop
; 16 bytes of state XORed into message.
ld1 {V0.16B}, [x0], #16
ld1 {V1.16B}, [x2], #16
eor V1.16B, V1.16B, V0.16B
subs x3, x3, #16
st1 {V1.16B}, [x1], #16
beq L_chacha_use_over_arm64_done
b.eq L_chacha_use_over_arm64_done
b L_chacha_use_over_arm64_16byte_loop
L_chacha_use_over_arm64_word_loop
cmp x3, #4
blt L_chacha_use_over_arm64_byte_loop
b.lt L_chacha_use_over_arm64_byte_loop
; 4 bytes of state XORed into message.
ldr w4, [x0], #4
ldr w5, [x2], #4
eor w5, w5, w4
subs x3, x3, #4
str w5, [x1], #4
beq L_chacha_use_over_arm64_done
b.eq L_chacha_use_over_arm64_done
b L_chacha_use_over_arm64_word_loop
L_chacha_use_over_arm64_byte_loop
; 1 bytes of state XORed into message.
@@ -1006,7 +1006,7 @@ L_chacha_use_over_arm64_byte_loop
eor w5, w5, w4
subs x3, x3, #1
strb w5, [x1], #1
bne L_chacha_use_over_arm64_byte_loop
b.ne L_chacha_use_over_arm64_byte_loop
L_chacha_use_over_arm64_done
ret
ENDP

128
wolfcrypt/src/port/arm/armv8-curve25519.S
View File

@@ -622,21 +622,21 @@ _fe_invert_nct:
mov x17, xzr
mov x22, #0xff
cmp x9, #0
beq L_fe_invert_nct_num_bits_init_v_0
b.eq L_fe_invert_nct_num_bits_init_v_0
mov x24, #0x100
clz x23, x9
sub x23, x24, x23
b L_fe_invert_nct_num_bits_init_v_3
L_fe_invert_nct_num_bits_init_v_0:
cmp x8, #0
beq L_fe_invert_nct_num_bits_init_v_1
b.eq L_fe_invert_nct_num_bits_init_v_1
mov x24, #0xc0
clz x23, x8
sub x23, x24, x23
b L_fe_invert_nct_num_bits_init_v_3
L_fe_invert_nct_num_bits_init_v_1:
cmp x7, #0
beq L_fe_invert_nct_num_bits_init_v_2
b.eq L_fe_invert_nct_num_bits_init_v_2
mov x24, #0x80
clz x23, x7
sub x23, x24, x23
@@ -647,7 +647,7 @@ L_fe_invert_nct_num_bits_init_v_2:
sub x23, x24, x23
L_fe_invert_nct_num_bits_init_v_3:
tst x6, #1
bne L_fe_invert_nct_loop
b.ne L_fe_invert_nct_loop
L_fe_invert_nct_even_init_v_0:
extr x6, x7, x6, #1
extr x7, x8, x7, #1
@@ -655,7 +655,7 @@ L_fe_invert_nct_even_init_v_0:
lsr x9, x9, #1
sub x23, x23, #1
ands x24, x14, #1
beq L_fe_invert_nct_even_init_v_1
b.eq L_fe_invert_nct_even_init_v_1
adds x14, x14, x19
adcs x15, x15, x20
adcs x16, x16, x20
@@ -667,26 +667,26 @@ L_fe_invert_nct_even_init_v_1:
extr x16, x17, x16, #1
extr x17, x24, x17, #1
tst x6, #1
beq L_fe_invert_nct_even_init_v_0
b.eq L_fe_invert_nct_even_init_v_0
L_fe_invert_nct_loop:
cmp x22, #1
beq L_fe_invert_nct_u_done
b.eq L_fe_invert_nct_u_done
cmp x23, #1
beq L_fe_invert_nct_v_done
b.eq L_fe_invert_nct_v_done
cmp x22, x23
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x5, x9
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x4, x8
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x3, x7
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x2, x6
bcc L_fe_invert_nct_v_larger
b.cc L_fe_invert_nct_v_larger
L_fe_invert_nct_u_larger:
subs x2, x2, x6
sbcs x3, x3, x7
@@ -696,28 +696,28 @@ L_fe_invert_nct_u_larger:
sbcs x11, x11, x15
sbcs x12, x12, x16
sbcs x13, x13, x17
bcs L_fe_invert_nct_sub_uv
b.cs L_fe_invert_nct_sub_uv
adds x10, x10, x19
adcs x11, x11, x20
adcs x12, x12, x20
adc x13, x13, x21
L_fe_invert_nct_sub_uv:
cmp x5, #0
beq L_fe_invert_nct_nct_num_bits_u_0
b.eq L_fe_invert_nct_nct_num_bits_u_0
mov x24, #0x100
clz x22, x5
sub x22, x24, x22
b L_fe_invert_nct_nct_num_bits_u_3
L_fe_invert_nct_nct_num_bits_u_0:
cmp x4, #0
beq L_fe_invert_nct_nct_num_bits_u_1
b.eq L_fe_invert_nct_nct_num_bits_u_1
mov x24, #0xc0
clz x22, x4
sub x22, x24, x22
b L_fe_invert_nct_nct_num_bits_u_3
L_fe_invert_nct_nct_num_bits_u_1:
cmp x3, #0
beq L_fe_invert_nct_nct_num_bits_u_2
b.eq L_fe_invert_nct_nct_num_bits_u_2
mov x24, #0x80
clz x22, x3
sub x22, x24, x22
@@ -734,7 +734,7 @@ L_fe_invert_nct_even_u_0:
lsr x5, x5, #1
sub x22, x22, #1
ands x24, x10, #1
beq L_fe_invert_nct_even_u_1
b.eq L_fe_invert_nct_even_u_1
adds x10, x10, x19
adcs x11, x11, x20
adcs x12, x12, x20
@@ -746,7 +746,7 @@ L_fe_invert_nct_even_u_1:
extr x12, x13, x12, #1
extr x13, x24, x13, #1
tst x2, #1
beq L_fe_invert_nct_even_u_0
b.eq L_fe_invert_nct_even_u_0
b L_fe_invert_nct_loop
L_fe_invert_nct_v_larger:
subs x6, x6, x2
@@ -757,28 +757,28 @@ L_fe_invert_nct_v_larger:
sbcs x15, x15, x11
sbcs x16, x16, x12
sbcs x17, x17, x13
bcs L_fe_invert_nct_sub_vu
b.cs L_fe_invert_nct_sub_vu
adds x14, x14, x19
adcs x15, x15, x20
adcs x16, x16, x20
adc x17, x17, x21
L_fe_invert_nct_sub_vu:
cmp x9, #0
beq L_fe_invert_nct_nct_num_bits_v_0
b.eq L_fe_invert_nct_nct_num_bits_v_0
mov x24, #0x100
clz x23, x9
sub x23, x24, x23
b L_fe_invert_nct_nct_num_bits_v_3
L_fe_invert_nct_nct_num_bits_v_0:
cmp x8, #0
beq L_fe_invert_nct_nct_num_bits_v_1
b.eq L_fe_invert_nct_nct_num_bits_v_1
mov x24, #0xc0
clz x23, x8
sub x23, x24, x23
b L_fe_invert_nct_nct_num_bits_v_3
L_fe_invert_nct_nct_num_bits_v_1:
cmp x7, #0
beq L_fe_invert_nct_nct_num_bits_v_2
b.eq L_fe_invert_nct_nct_num_bits_v_2
mov x24, #0x80
clz x23, x7
sub x23, x24, x23
@@ -795,7 +795,7 @@ L_fe_invert_nct_even_v_0:
lsr x9, x9, #1
sub x23, x23, #1
ands x24, x14, #1
beq L_fe_invert_nct_even_v_1
b.eq L_fe_invert_nct_even_v_1
adds x14, x14, x19
adcs x15, x15, x20
adcs x16, x16, x20
@@ -807,7 +807,7 @@ L_fe_invert_nct_even_v_1:
extr x16, x17, x16, #1
extr x17, x24, x17, #1
tst x6, #1
beq L_fe_invert_nct_even_v_0
b.eq L_fe_invert_nct_even_v_0
b L_fe_invert_nct_loop
L_fe_invert_nct_u_done:
str x10, [x0]
@@ -1260,7 +1260,7 @@ L_fe_invert1:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert1
b.ne L_fe_invert1
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1360,7 +1360,7 @@ L_fe_invert2:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert2
b.ne L_fe_invert2
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1460,7 +1460,7 @@ L_fe_invert3:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert3
b.ne L_fe_invert3
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -1560,7 +1560,7 @@ L_fe_invert4:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert4
b.ne L_fe_invert4
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1658,7 +1658,7 @@ L_fe_invert5:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert5
b.ne L_fe_invert5
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1758,7 +1758,7 @@ L_fe_invert6:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert6
b.ne L_fe_invert6
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -1858,7 +1858,7 @@ L_fe_invert7:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert7
b.ne L_fe_invert7
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1956,7 +1956,7 @@ L_fe_invert8:
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert8
b.ne L_fe_invert8
# Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -3021,7 +3021,7 @@ L_curve25519_base_bits:
adc x13, x13, xzr
subs x24, x24, #1
cmp x24, #3
bge L_curve25519_base_bits
b.ge L_curve25519_base_bits
# Conditional Swap
subs xzr, xzr, x2, lsl 63
ldp x25, x26, [x29, #16]
@@ -3523,7 +3523,7 @@ L_curve25519_base_3:
stp x25, x26, [x29, #16]
stp x27, x28, [x29, #32]
subs x24, x24, #1
bge L_curve25519_base_3
b.ge L_curve25519_base_3
# Invert
add x0, x29, #48
add x1, x29, #16
@@ -3669,7 +3669,7 @@ L_curve25519_base_inv_1:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_1
b.ne L_curve25519_base_inv_1
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3769,7 +3769,7 @@ L_curve25519_base_inv_2:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_2
b.ne L_curve25519_base_inv_2
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3869,7 +3869,7 @@ L_curve25519_base_inv_3:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_3
b.ne L_curve25519_base_inv_3
# Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -3969,7 +3969,7 @@ L_curve25519_base_inv_4:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_4
b.ne L_curve25519_base_inv_4
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -4067,7 +4067,7 @@ L_curve25519_base_inv_5:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_5
b.ne L_curve25519_base_inv_5
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -4167,7 +4167,7 @@ L_curve25519_base_inv_6:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_6
b.ne L_curve25519_base_inv_6
# Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -4267,7 +4267,7 @@ L_curve25519_base_inv_7:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_7
b.ne L_curve25519_base_inv_7
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -4365,7 +4365,7 @@ L_curve25519_base_inv_8:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_8
b.ne L_curve25519_base_inv_8
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -5644,7 +5644,7 @@ L_curve25519_bits:
adc x13, x13, x27
subs x24, x24, #1
cmp x24, #3
bge L_curve25519_bits
b.ge L_curve25519_bits
# Conditional Swap
subs xzr, xzr, x23, lsl 63
ldp x25, x26, [x29, #16]
@@ -6146,7 +6146,7 @@ L_curve25519_3:
stp x25, x26, [x29, #16]
stp x27, x28, [x29, #32]
subs x24, x24, #1
bge L_curve25519_3
b.ge L_curve25519_3
# Invert
add x0, x29, #48
add x1, x29, #16
@@ -6292,7 +6292,7 @@ L_curve25519_inv_1:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_1
b.ne L_curve25519_inv_1
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6392,7 +6392,7 @@ L_curve25519_inv_2:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_2
b.ne L_curve25519_inv_2
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6492,7 +6492,7 @@ L_curve25519_inv_3:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_3
b.ne L_curve25519_inv_3
# Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -6592,7 +6592,7 @@ L_curve25519_inv_4:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_4
b.ne L_curve25519_inv_4
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6690,7 +6690,7 @@ L_curve25519_inv_5:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_5
b.ne L_curve25519_inv_5
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6790,7 +6790,7 @@ L_curve25519_inv_6:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_6
b.ne L_curve25519_inv_6
# Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -6890,7 +6890,7 @@ L_curve25519_inv_7:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_7
b.ne L_curve25519_inv_7
# Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6988,7 +6988,7 @@ L_curve25519_inv_8:
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_8
b.ne L_curve25519_inv_8
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -7320,7 +7320,7 @@ L_fe_pow22523_1:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_1
b.ne L_fe_pow22523_1
# Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -7422,7 +7422,7 @@ L_fe_pow22523_2:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_2
b.ne L_fe_pow22523_2
# Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -7522,7 +7522,7 @@ L_fe_pow22523_3:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_3
b.ne L_fe_pow22523_3
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -7622,7 +7622,7 @@ L_fe_pow22523_4:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_4
b.ne L_fe_pow22523_4
# Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -7720,7 +7720,7 @@ L_fe_pow22523_5:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_5
b.ne L_fe_pow22523_5
# Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -7820,7 +7820,7 @@ L_fe_pow22523_6:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_6
b.ne L_fe_pow22523_6
# Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -7920,7 +7920,7 @@ L_fe_pow22523_7:
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_7
b.ne L_fe_pow22523_7
# Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]

128
wolfcrypt/src/port/arm/armv8-curve25519.asm
View File

@@ -458,21 +458,21 @@ fe_invert_nct PROC
mov x17, xzr
mov x22, #0xff
cmp x9, #0
beq L_fe_invert_nct_num_bits_init_v_0
b.eq L_fe_invert_nct_num_bits_init_v_0
mov x24, #0x100
clz x23, x9
sub x23, x24, x23
b L_fe_invert_nct_num_bits_init_v_3
L_fe_invert_nct_num_bits_init_v_0
cmp x8, #0
beq L_fe_invert_nct_num_bits_init_v_1
b.eq L_fe_invert_nct_num_bits_init_v_1
mov x24, #0xc0
clz x23, x8
sub x23, x24, x23
b L_fe_invert_nct_num_bits_init_v_3
L_fe_invert_nct_num_bits_init_v_1
cmp x7, #0
beq L_fe_invert_nct_num_bits_init_v_2
b.eq L_fe_invert_nct_num_bits_init_v_2
mov x24, #0x80
clz x23, x7
sub x23, x24, x23
@@ -483,7 +483,7 @@ L_fe_invert_nct_num_bits_init_v_2
sub x23, x24, x23
L_fe_invert_nct_num_bits_init_v_3
tst x6, #1
bne L_fe_invert_nct_loop
b.ne L_fe_invert_nct_loop
L_fe_invert_nct_even_init_v_0
extr x6, x7, x6, #1
extr x7, x8, x7, #1
@@ -491,7 +491,7 @@ L_fe_invert_nct_even_init_v_0
lsr x9, x9, #1
sub x23, x23, #1
ands x24, x14, #1
beq L_fe_invert_nct_even_init_v_1
b.eq L_fe_invert_nct_even_init_v_1
adds x14, x14, x19
adcs x15, x15, x20
adcs x16, x16, x20
@@ -503,26 +503,26 @@ L_fe_invert_nct_even_init_v_1
extr x16, x17, x16, #1
extr x17, x24, x17, #1
tst x6, #1
beq L_fe_invert_nct_even_init_v_0
b.eq L_fe_invert_nct_even_init_v_0
L_fe_invert_nct_loop
cmp x22, #1
beq L_fe_invert_nct_u_done
b.eq L_fe_invert_nct_u_done
cmp x23, #1
beq L_fe_invert_nct_v_done
b.eq L_fe_invert_nct_v_done
cmp x22, x23
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x5, x9
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x4, x8
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x3, x7
bhi L_fe_invert_nct_u_larger
bcc L_fe_invert_nct_v_larger
b.hi L_fe_invert_nct_u_larger
b.cc L_fe_invert_nct_v_larger
cmp x2, x6
bcc L_fe_invert_nct_v_larger
b.cc L_fe_invert_nct_v_larger
L_fe_invert_nct_u_larger
subs x2, x2, x6
sbcs x3, x3, x7
@@ -532,28 +532,28 @@ L_fe_invert_nct_u_larger
sbcs x11, x11, x15
sbcs x12, x12, x16
sbcs x13, x13, x17
bcs L_fe_invert_nct_sub_uv
b.cs L_fe_invert_nct_sub_uv
adds x10, x10, x19
adcs x11, x11, x20
adcs x12, x12, x20
adc x13, x13, x21
L_fe_invert_nct_sub_uv
cmp x5, #0
beq L_fe_invert_nct_nct_num_bits_u_0
b.eq L_fe_invert_nct_nct_num_bits_u_0
mov x24, #0x100
clz x22, x5
sub x22, x24, x22
b L_fe_invert_nct_nct_num_bits_u_3
L_fe_invert_nct_nct_num_bits_u_0
cmp x4, #0
beq L_fe_invert_nct_nct_num_bits_u_1
b.eq L_fe_invert_nct_nct_num_bits_u_1
mov x24, #0xc0
clz x22, x4
sub x22, x24, x22
b L_fe_invert_nct_nct_num_bits_u_3
L_fe_invert_nct_nct_num_bits_u_1
cmp x3, #0
beq L_fe_invert_nct_nct_num_bits_u_2
b.eq L_fe_invert_nct_nct_num_bits_u_2
mov x24, #0x80
clz x22, x3
sub x22, x24, x22
@@ -570,7 +570,7 @@ L_fe_invert_nct_even_u_0
lsr x5, x5, #1
sub x22, x22, #1
ands x24, x10, #1
beq L_fe_invert_nct_even_u_1
b.eq L_fe_invert_nct_even_u_1
adds x10, x10, x19
adcs x11, x11, x20
adcs x12, x12, x20
@@ -582,7 +582,7 @@ L_fe_invert_nct_even_u_1
extr x12, x13, x12, #1
extr x13, x24, x13, #1
tst x2, #1
beq L_fe_invert_nct_even_u_0
b.eq L_fe_invert_nct_even_u_0
b L_fe_invert_nct_loop
L_fe_invert_nct_v_larger
subs x6, x6, x2
@@ -593,28 +593,28 @@ L_fe_invert_nct_v_larger
sbcs x15, x15, x11
sbcs x16, x16, x12
sbcs x17, x17, x13
bcs L_fe_invert_nct_sub_vu
b.cs L_fe_invert_nct_sub_vu
adds x14, x14, x19
adcs x15, x15, x20
adcs x16, x16, x20
adc x17, x17, x21
L_fe_invert_nct_sub_vu
cmp x9, #0
beq L_fe_invert_nct_nct_num_bits_v_0
b.eq L_fe_invert_nct_nct_num_bits_v_0
mov x24, #0x100
clz x23, x9
sub x23, x24, x23
b L_fe_invert_nct_nct_num_bits_v_3
L_fe_invert_nct_nct_num_bits_v_0
cmp x8, #0
beq L_fe_invert_nct_nct_num_bits_v_1
b.eq L_fe_invert_nct_nct_num_bits_v_1
mov x24, #0xc0
clz x23, x8
sub x23, x24, x23
b L_fe_invert_nct_nct_num_bits_v_3
L_fe_invert_nct_nct_num_bits_v_1
cmp x7, #0
beq L_fe_invert_nct_nct_num_bits_v_2
b.eq L_fe_invert_nct_nct_num_bits_v_2
mov x24, #0x80
clz x23, x7
sub x23, x24, x23
@@ -631,7 +631,7 @@ L_fe_invert_nct_even_v_0
lsr x9, x9, #1
sub x23, x23, #1
ands x24, x14, #1
beq L_fe_invert_nct_even_v_1
b.eq L_fe_invert_nct_even_v_1
adds x14, x14, x19
adcs x15, x15, x20
adcs x16, x16, x20
@@ -643,7 +643,7 @@ L_fe_invert_nct_even_v_1
extr x16, x17, x16, #1
extr x17, x24, x17, #1
tst x6, #1
beq L_fe_invert_nct_even_v_0
b.eq L_fe_invert_nct_even_v_0
b L_fe_invert_nct_loop
L_fe_invert_nct_u_done
str x10, [x0]
@@ -1024,7 +1024,7 @@ L_fe_invert1
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert1
b.ne L_fe_invert1
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1118,7 +1118,7 @@ L_fe_invert2
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert2
b.ne L_fe_invert2
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1212,7 +1212,7 @@ L_fe_invert3
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert3
b.ne L_fe_invert3
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -1306,7 +1306,7 @@ L_fe_invert4
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert4
b.ne L_fe_invert4
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1400,7 +1400,7 @@ L_fe_invert5
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert5
b.ne L_fe_invert5
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1494,7 +1494,7 @@ L_fe_invert6
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert6
b.ne L_fe_invert6
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -1588,7 +1588,7 @@ L_fe_invert7
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert7
b.ne L_fe_invert7
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -1682,7 +1682,7 @@ L_fe_invert8
adcs x8, x12, x15
adc x9, x13, x16
subs x20, x20, #1
bne L_fe_invert8
b.ne L_fe_invert8
; Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -2714,7 +2714,7 @@ L_curve25519_base_bits
adc x13, x13, xzr
subs x24, x24, #1
cmp x24, #3
bge L_curve25519_base_bits
b.ge L_curve25519_base_bits
; Conditional Swap
subs xzr, xzr, x2, lsl 63
ldp x25, x26, [x29, #16]
@@ -3216,7 +3216,7 @@ L_curve25519_base_3
stp x25, x26, [x29, #16]
stp x27, x28, [x29, #32]
subs x24, x24, #1
bge L_curve25519_base_3
b.ge L_curve25519_base_3
; Invert
add x0, x29, #48
add x1, x29, #16
@@ -3328,7 +3328,7 @@ L_curve25519_base_inv_1
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_1
b.ne L_curve25519_base_inv_1
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3422,7 +3422,7 @@ L_curve25519_base_inv_2
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_2
b.ne L_curve25519_base_inv_2
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3516,7 +3516,7 @@ L_curve25519_base_inv_3
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_3
b.ne L_curve25519_base_inv_3
; Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -3610,7 +3610,7 @@ L_curve25519_base_inv_4
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_4
b.ne L_curve25519_base_inv_4
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3704,7 +3704,7 @@ L_curve25519_base_inv_5
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_5
b.ne L_curve25519_base_inv_5
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3798,7 +3798,7 @@ L_curve25519_base_inv_6
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_6
b.ne L_curve25519_base_inv_6
; Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -3892,7 +3892,7 @@ L_curve25519_base_inv_7
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_7
b.ne L_curve25519_base_inv_7
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -3986,7 +3986,7 @@ L_curve25519_base_inv_8
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_base_inv_8
b.ne L_curve25519_base_inv_8
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -5249,7 +5249,7 @@ L_curve25519_bits
adc x13, x13, x27
subs x24, x24, #1
cmp x24, #3
bge L_curve25519_bits
b.ge L_curve25519_bits
; Conditional Swap
subs xzr, xzr, x23, lsl 63
ldp x25, x26, [x29, #16]
@@ -5751,7 +5751,7 @@ L_curve25519_3
stp x25, x26, [x29, #16]
stp x27, x28, [x29, #32]
subs x24, x24, #1
bge L_curve25519_3
b.ge L_curve25519_3
; Invert
add x0, x29, #48
add x1, x29, #16
@@ -5863,7 +5863,7 @@ L_curve25519_inv_1
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_1
b.ne L_curve25519_inv_1
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -5957,7 +5957,7 @@ L_curve25519_inv_2
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_2
b.ne L_curve25519_inv_2
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6051,7 +6051,7 @@ L_curve25519_inv_3
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_3
b.ne L_curve25519_inv_3
; Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -6145,7 +6145,7 @@ L_curve25519_inv_4
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_4
b.ne L_curve25519_inv_4
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6239,7 +6239,7 @@ L_curve25519_inv_5
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_5
b.ne L_curve25519_inv_5
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6333,7 +6333,7 @@ L_curve25519_inv_6
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_6
b.ne L_curve25519_inv_6
; Store
stp x6, x7, [x29, #144]
stp x8, x9, [x29, #160]
@@ -6427,7 +6427,7 @@ L_curve25519_inv_7
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_7
b.ne L_curve25519_inv_7
; Store
stp x6, x7, [x29, #112]
stp x8, x9, [x29, #128]
@@ -6521,7 +6521,7 @@ L_curve25519_inv_8
adcs x8, x12, x15
adc x9, x13, x16
subs x24, x24, #1
bne L_curve25519_inv_8
b.ne L_curve25519_inv_8
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -6797,7 +6797,7 @@ L_fe_pow22523_1
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_1
b.ne L_fe_pow22523_1
; Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -6891,7 +6891,7 @@ L_fe_pow22523_2
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_2
b.ne L_fe_pow22523_2
; Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -6985,7 +6985,7 @@ L_fe_pow22523_3
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_3
b.ne L_fe_pow22523_3
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -7079,7 +7079,7 @@ L_fe_pow22523_4
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_4
b.ne L_fe_pow22523_4
; Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -7173,7 +7173,7 @@ L_fe_pow22523_5
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_5
b.ne L_fe_pow22523_5
; Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]
@@ -7267,7 +7267,7 @@ L_fe_pow22523_6
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_6
b.ne L_fe_pow22523_6
; Store
stp x6, x7, [x29, #80]
stp x8, x9, [x29, #96]
@@ -7361,7 +7361,7 @@ L_fe_pow22523_7
adcs x8, x12, x15
adc x9, x13, x16
subs x23, x23, #1
bne L_fe_pow22523_7
b.ne L_fe_pow22523_7
; Store
stp x6, x7, [x29, #48]
stp x8, x9, [x29, #64]

72
wolfcrypt/src/port/arm/armv8-frodokem-asm.S
View File

@@ -272,7 +272,7 @@ L_frodokem_sha3_x2_neon_begin:
mov v30.d[0], x3
mov v30.d[1], x3
eor v0.16b, v0.16b, v30.16b
bne L_frodokem_sha3_x2_neon_begin
b.ne L_frodokem_sha3_x2_neon_begin
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
st4 {v8.d, v9.d, v10.d, v11.d}[0], [x0], #32
@@ -429,7 +429,7 @@ L_frodokem_sha3_x2_crypto_begin:
mov v30.d[0], x3
mov v30.d[1], x3
eor v0.16b, v0.16b, v30.16b
bne L_frodokem_sha3_x2_crypto_begin
b.ne L_frodokem_sha3_x2_crypto_begin
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
st4 {v8.d, v9.d, v10.d, v11.d}[0], [x0], #32
@@ -529,7 +529,7 @@ _frodokem_sample_neon:
stp d10, d11, [x29, #32]
stp d12, d13, [x29, #48]
cmp w1, #16
blt L_frodokem_sample_neon_rem
b.lt L_frodokem_sample_neon_rem
L_frodokem_sample_neon_blk16:
ld1 {v0.8h}, [x0], #16
ld1 {v1.8h}, [x0], #16
@@ -553,7 +553,7 @@ L_frodokem_sample_neon_cdf16:
ushr v11.8h, v11.8h, #15
add v7.8h, v7.8h, v11.8h
subs w5, w5, #1
bne L_frodokem_sample_neon_cdf16
b.ne L_frodokem_sample_neon_cdf16
neg v8.8h, v4.8h
eor v6.16b, v6.16b, v8.16b
add v6.8h, v6.8h, v4.8h
@@ -564,10 +564,10 @@ L_frodokem_sample_neon_cdf16:
st1 {v7.8h}, [x0], #16
subs w1, w1, #16
cmp w1, #16
bge L_frodokem_sample_neon_blk16
b.ge L_frodokem_sample_neon_blk16
L_frodokem_sample_neon_rem:
cmp w1, #0
beq L_frodokem_sample_neon_done
b.eq L_frodokem_sample_neon_done
L_frodokem_sample_neon_blk:
ld1 {v0.8h}, [x0]
ushr v2.8h, v0.8h, #1
@@ -582,13 +582,13 @@ L_frodokem_sample_neon_cdf:
ushr v12.8h, v12.8h, #15
add v6.8h, v6.8h, v12.8h
subs w5, w5, #1
bne L_frodokem_sample_neon_cdf
b.ne L_frodokem_sample_neon_cdf
neg v8.8h, v4.8h
eor v6.16b, v6.16b, v8.16b
add v6.8h, v6.8h, v4.8h
st1 {v6.8h}, [x0], #16
subs w1, w1, #8
bne L_frodokem_sample_neon_blk
b.ne L_frodokem_sample_neon_blk
L_frodokem_sample_neon_done:
ldp d8, d9, [x29, #16]
ldp d10, d11, [x29, #32]
@@ -674,10 +674,10 @@ L_frodokem_sa_accum_neon_k:
mla v13.8h, v9.8h, v7.8h
st1 {v13.8h}, [x17], #16
subs x11, x11, #1
bne L_frodokem_sa_accum_neon_k
b.ne L_frodokem_sa_accum_neon_k
add x8, x8, x6
subs x12, x12, #1
bne L_frodokem_sa_accum_neon_t
b.ne L_frodokem_sa_accum_neon_t
ldr x17, [x29, #24]
ldp d8, d9, [x29, #32]
ldp d10, d11, [x29, #48]
@@ -793,10 +793,10 @@ L_frodokem_sa_accum_x4_neon_k:
mla v23.8h, v19.8h, v15.8h
st1 {v23.8h}, [x20], #16
subs x13, x13, #1
bne L_frodokem_sa_accum_x4_neon_k
b.ne L_frodokem_sa_accum_x4_neon_k
add x8, x8, x6
subs x14, x14, #1
bne L_frodokem_sa_accum_x4_neon_t
b.ne L_frodokem_sa_accum_x4_neon_t
ldp x17, x19, [x29, #24]
ldr x20, [x29, #40]
ldp d8, d9, [x29, #48]
@@ -870,7 +870,7 @@ L_frodokem_as_accum_neon_k0:
mla v3.8h, v8.8h, v10.8h
mla v7.8h, v9.8h, v10.8h
subs x14, x14, #1
bne L_frodokem_as_accum_neon_k0
b.ne L_frodokem_as_accum_neon_k0
addv h13, v0.8h
ins v11.h[0], v13.h[0]
addv h13, v4.8h
@@ -919,7 +919,7 @@ L_frodokem_as_accum_neon_k1:
mla v3.8h, v8.8h, v10.8h
mla v7.8h, v9.8h, v10.8h
subs x14, x14, #1
bne L_frodokem_as_accum_neon_k1
b.ne L_frodokem_as_accum_neon_k1
addv h13, v0.8h
ins v11.h[4], v13.h[0]
addv h13, v4.8h
@@ -1043,7 +1043,7 @@ L_frodokem_as_accum_x4_neon_k0:
mla v11.8h, v18.8h, v20.8h
mla v15.8h, v19.8h, v20.8h
subs x21, x21, #1
bne L_frodokem_as_accum_x4_neon_k0
b.ne L_frodokem_as_accum_x4_neon_k0
addv h25, v0.8h
ins v21.h[0], v25.h[0]
addv h25, v4.8h
@@ -1128,7 +1128,7 @@ L_frodokem_as_accum_x4_neon_k1:
mla v11.8h, v18.8h, v20.8h
mla v15.8h, v19.8h, v20.8h
subs x21, x21, #1
bne L_frodokem_as_accum_x4_neon_k1
b.ne L_frodokem_as_accum_x4_neon_k1
addv h25, v0.8h
ins v21.h[4], v25.h[0]
addv h25, v4.8h
@@ -1280,7 +1280,7 @@ L_frodokem_mul_bs_neon_k0:
mla v11.8h, v18.8h, v20.8h
mla v15.8h, v19.8h, v20.8h
subs x22, x22, #1
bne L_frodokem_mul_bs_neon_k0
b.ne L_frodokem_mul_bs_neon_k0
addv h25, v0.8h
ins v21.h[0], v25.h[0]
addv h25, v4.8h
@@ -1365,7 +1365,7 @@ L_frodokem_mul_bs_neon_k1:
mla v11.8h, v18.8h, v20.8h
mla v15.8h, v19.8h, v20.8h
subs x22, x22, #1
bne L_frodokem_mul_bs_neon_k1
b.ne L_frodokem_mul_bs_neon_k1
addv h25, v0.8h
ins v21.h[4], v25.h[0]
addv h25, v4.8h
@@ -1413,7 +1413,7 @@ L_frodokem_mul_bs_neon_k1:
add x9, x9, #0x40
add x10, x10, #0x40
subs x23, x23, #1
bne L_frodokem_mul_bs_neon_p
b.ne L_frodokem_mul_bs_neon_p
ldp x17, x19, [x29, #16]
ldp x20, x21, [x29, #32]
ldp x22, x23, [x29, #48]
@@ -1482,7 +1482,7 @@ L_frodokem_mul_add_sb_plus_e_neon_j:
ld1r {v9.8h}, [x13], #2
mla v7.8h, v8.8h, v9.8h
subs x15, x15, #1
bne L_frodokem_mul_add_sb_plus_e_neon_j
b.ne L_frodokem_mul_add_sb_plus_e_neon_j
and v0.16b, v0.16b, v10.16b
and v1.16b, v1.16b, v10.16b
and v2.16b, v2.16b, v10.16b
@@ -1545,13 +1545,13 @@ L_frodokem_gen_a_rows_aes_arm64_blk:
stp x12, xzr, [x9], #16
add x11, x12, x14
cmp x9, x10
blt L_frodokem_gen_a_rows_aes_arm64_blk
b.lt L_frodokem_gen_a_rows_aes_arm64_blk
add x13, x13, #1
add x10, x0, x8
cmp x9, x10
blt L_frodokem_gen_a_rows_aes_arm64_row
b.lt L_frodokem_gen_a_rows_aes_arm64_row
cmp x8, #0x80
blt L_frodokem_gen_a_rows_aes_arm64_tail
b.lt L_frodokem_gen_a_rows_aes_arm64_tail
L_frodokem_gen_a_rows_aes_arm64_aes:
ld1 {v11.16b, v12.16b, v13.16b, v14.16b}, [x0], #0x40
ld1 {v15.16b, v16.16b, v17.16b, v18.16b}, [x0], #0x40
@@ -1727,10 +1727,10 @@ L_frodokem_gen_a_rows_aes_arm64_aes:
st1 {v15.16b, v16.16b, v17.16b, v18.16b}, [x1], #0x40
subs x8, x8, #0x80
cmp x8, #0x80
bge L_frodokem_gen_a_rows_aes_arm64_aes
b.ge L_frodokem_gen_a_rows_aes_arm64_aes
L_frodokem_gen_a_rows_aes_arm64_tail:
cmp x8, #0
beq L_frodokem_gen_a_rows_aes_arm64_done
b.eq L_frodokem_gen_a_rows_aes_arm64_done
ld1 {v11.16b, v12.16b, v13.16b, v14.16b}, [x0], #0x40
aese v11.16b, v0.16b
aesmc v11.16b, v11.16b
@@ -1871,10 +1871,10 @@ L_frodokem_sa_accum_sve_k:
st1h {z2.h}, p0, [x0, x10, lsl #1]
inch x10
cmp x10, x5
blt L_frodokem_sa_accum_sve_k
b.lt L_frodokem_sa_accum_sve_k
add x0, x0, x6
subs x9, x9, #1
bne L_frodokem_sa_accum_sve_i
b.ne L_frodokem_sa_accum_sve_i
ret
#ifndef __APPLE__
.size frodokem_sa_accum_sve,.-frodokem_sa_accum_sve
@@ -1959,7 +1959,7 @@ L_frodokem_as_accum_sve_k:
mla z15.h, p0/m, z17.h, z18.h
inch x9
cmp x9, x5
blt L_frodokem_as_accum_sve_k
b.lt L_frodokem_as_accum_sve_k
ptrue p1.h
sxtw x10, w3
lsl x10, x10, #4
@@ -2136,7 +2136,7 @@ L_frodokem_mul_bs_sve_k:
mla z7.h, p0/m, z8.h, z9.h
inch x10
cmp x10, x5
blt L_frodokem_mul_bs_sve_k
b.lt L_frodokem_mul_bs_sve_k
uaddv d10, p1, z0.h
umov w11, v10.h[0]
and w11, w11, w4
@@ -2179,7 +2179,7 @@ L_frodokem_mul_bs_sve_k:
add x8, x8, #2
add x7, x7, x6
subs x9, x9, #1
bne L_frodokem_mul_bs_sve_i
b.ne L_frodokem_mul_bs_sve_i
ldp x17, x19, [x29, #24]
ldr x20, [x29, #40]
ldp d8, d9, [x29, #48]
@@ -2215,7 +2215,7 @@ L_frodokem_add_sve_k:
st1h {z0.h}, p0, [x0, x4, lsl #1]
inch x4
cmp x4, x3
blt L_frodokem_add_sve_k
b.lt L_frodokem_add_sve_k
ret
#ifndef __APPLE__
.size frodokem_add_sve,.-frodokem_add_sve
@@ -2254,7 +2254,7 @@ L_frodokem_mul_bs_sme_k:
add x1, x1, #32
add x2, x2, #32
subs x5, x5, #1
bne L_frodokem_mul_bs_sme_k
b.ne L_frodokem_mul_bs_sme_k
mov z3.h, w4
mov x6, #8
whilelt p1.h, xzr, x6
@@ -2268,7 +2268,7 @@ L_frodokem_mul_bs_sme_e:
add x0, x0, #16
add w12, w12, #1
cmp w12, #8
bne L_frodokem_mul_bs_sme_e
b.ne L_frodokem_mul_bs_sme_e
smstop
ret
#ifndef __APPLE__
@@ -2320,10 +2320,10 @@ L_frodokem_sa_accum_sme_e:
add x8, x8, x4
add w12, w12, #1
cmp w12, #8
blt L_frodokem_sa_accum_sme_e
b.lt L_frodokem_sa_accum_sme_e
add x7, x7, #16
subs x9, x9, #1
bne L_frodokem_sa_accum_sme_k
b.ne L_frodokem_sa_accum_sme_k
smstop
ret
#ifndef __APPLE__
@@ -2358,7 +2358,7 @@ L_frodokem_as_accum_sme_k:
add x1, x1, #8
add x2, x2, #32
subs x7, x7, #1
bne L_frodokem_as_accum_sme_k
b.ne L_frodokem_as_accum_sme_k
mov x8, #8
whilelt p2.h, xzr, x8
whilelt p3.s, xzr, x8

50
wolfcrypt/src/port/arm/armv8-frodokem-asm.asm
View File

@@ -236,7 +236,7 @@ L_frodokem_sha3_x2_neon_begin
mov V30.D[0], x3
mov V30.D[1], x3
eor V0.16B, V0.16B, V30.16B
bne L_frodokem_sha3_x2_neon_begin
b.ne L_frodokem_sha3_x2_neon_begin
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
st4 {V8.D, V9.D, V10.D, V11.D}[0], [x0], #32
@@ -374,7 +374,7 @@ L_frodokem_sha3_x2_crypto_begin
mov V30.D[0], x3
mov V30.D[1], x3
eor V0.16B, V0.16B, V30.16B
bne L_frodokem_sha3_x2_crypto_begin
b.ne L_frodokem_sha3_x2_crypto_begin
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
st4 {V8.D, V9.D, V10.D, V11.D}[0], [x0], #32
@@ -450,7 +450,7 @@ frodokem_sample_neon PROC
stp D10, D11, [x29, #32]
stp D12, D13, [x29, #48]
cmp w1, #16
blt L_frodokem_sample_neon_rem
b.lt L_frodokem_sample_neon_rem
L_frodokem_sample_neon_blk16
ld1 {V0.8H}, [x0], #16
ld1 {V1.8H}, [x0], #16
@@ -474,7 +474,7 @@ L_frodokem_sample_neon_cdf16
ushr V11.8H, V11.8H, #15
add V7.8H, V7.8H, V11.8H
subs w5, w5, #1
bne L_frodokem_sample_neon_cdf16
b.ne L_frodokem_sample_neon_cdf16
neg V8.8H, V4.8H
eor V6.16B, V6.16B, V8.16B
add V6.8H, V6.8H, V4.8H
@@ -485,10 +485,10 @@ L_frodokem_sample_neon_cdf16
st1 {V7.8H}, [x0], #16
subs w1, w1, #16
cmp w1, #16
bge L_frodokem_sample_neon_blk16
b.ge L_frodokem_sample_neon_blk16
L_frodokem_sample_neon_rem
cmp w1, #0
beq L_frodokem_sample_neon_done
b.eq L_frodokem_sample_neon_done
L_frodokem_sample_neon_blk
ld1 {V0.8H}, [x0]
ushr V2.8H, V0.8H, #1
@@ -503,13 +503,13 @@ L_frodokem_sample_neon_cdf
ushr V12.8H, V12.8H, #15
add V6.8H, V6.8H, V12.8H
subs w5, w5, #1
bne L_frodokem_sample_neon_cdf
b.ne L_frodokem_sample_neon_cdf
neg V8.8H, V4.8H
eor V6.16B, V6.16B, V8.16B
add V6.8H, V6.8H, V4.8H
st1 {V6.8H}, [x0], #16
subs w1, w1, #8
bne L_frodokem_sample_neon_blk
b.ne L_frodokem_sample_neon_blk
L_frodokem_sample_neon_done
ldp D8, D9, [x29, #16]
ldp D10, D11, [x29, #32]
@@ -583,10 +583,10 @@ L_frodokem_sa_accum_neon_k
mla V13.8H, V9.8H, V7.8H
st1 {V13.8H}, [x17], #16
subs x11, x11, #1
bne L_frodokem_sa_accum_neon_k
b.ne L_frodokem_sa_accum_neon_k
add x8, x8, x6
subs x12, x12, #1
bne L_frodokem_sa_accum_neon_t
b.ne L_frodokem_sa_accum_neon_t
ldr x17, [x29, #24]
ldp D8, D9, [x29, #32]
ldp D10, D11, [x29, #48]
@@ -690,10 +690,10 @@ L_frodokem_sa_accum_x4_neon_k
mla V23.8H, V19.8H, V15.8H
st1 {V23.8H}, [x20], #16
subs x13, x13, #1
bne L_frodokem_sa_accum_x4_neon_k
b.ne L_frodokem_sa_accum_x4_neon_k
add x8, x8, x6
subs x14, x14, #1
bne L_frodokem_sa_accum_x4_neon_t
b.ne L_frodokem_sa_accum_x4_neon_t
ldp x17, x19, [x29, #24]
ldr x20, [x29, #40]
ldp D8, D9, [x29, #48]
@@ -755,7 +755,7 @@ L_frodokem_as_accum_neon_k0
mla V3.8H, V8.8H, V10.8H
mla V7.8H, V9.8H, V10.8H
subs x14, x14, #1
bne L_frodokem_as_accum_neon_k0
b.ne L_frodokem_as_accum_neon_k0
addv H13, V0.8H
ins V11.H[0], V13.H[0]
addv H13, V4.8H
@@ -804,7 +804,7 @@ L_frodokem_as_accum_neon_k1
mla V3.8H, V8.8H, V10.8H
mla V7.8H, V9.8H, V10.8H
subs x14, x14, #1
bne L_frodokem_as_accum_neon_k1
b.ne L_frodokem_as_accum_neon_k1
addv H13, V0.8H
ins V11.H[4], V13.H[0]
addv H13, V4.8H
@@ -916,7 +916,7 @@ L_frodokem_as_accum_x4_neon_k0
mla V11.8H, V18.8H, V20.8H
mla V15.8H, V19.8H, V20.8H
subs x21, x21, #1
bne L_frodokem_as_accum_x4_neon_k0
b.ne L_frodokem_as_accum_x4_neon_k0
addv H25, V0.8H
ins V21.H[0], V25.H[0]
addv H25, V4.8H
@@ -1001,7 +1001,7 @@ L_frodokem_as_accum_x4_neon_k1
mla V11.8H, V18.8H, V20.8H
mla V15.8H, V19.8H, V20.8H
subs x21, x21, #1
bne L_frodokem_as_accum_x4_neon_k1
b.ne L_frodokem_as_accum_x4_neon_k1
addv H25, V0.8H
ins V21.H[4], V25.H[0]
addv H25, V4.8H
@@ -1141,7 +1141,7 @@ L_frodokem_mul_bs_neon_k0
mla V11.8H, V18.8H, V20.8H
mla V15.8H, V19.8H, V20.8H
subs x22, x22, #1
bne L_frodokem_mul_bs_neon_k0
b.ne L_frodokem_mul_bs_neon_k0
addv H25, V0.8H
ins V21.H[0], V25.H[0]
addv H25, V4.8H
@@ -1226,7 +1226,7 @@ L_frodokem_mul_bs_neon_k1
mla V11.8H, V18.8H, V20.8H
mla V15.8H, V19.8H, V20.8H
subs x22, x22, #1
bne L_frodokem_mul_bs_neon_k1
b.ne L_frodokem_mul_bs_neon_k1
addv H25, V0.8H
ins V21.H[4], V25.H[0]
addv H25, V4.8H
@@ -1274,7 +1274,7 @@ L_frodokem_mul_bs_neon_k1
add x9, x9, #0x40
add x10, x10, #0x40
subs x23, x23, #1
bne L_frodokem_mul_bs_neon_p
b.ne L_frodokem_mul_bs_neon_p
ldp x17, x19, [x29, #16]
ldp x20, x21, [x29, #32]
ldp x22, x23, [x29, #48]
@@ -1331,7 +1331,7 @@ L_frodokem_mul_add_sb_plus_e_neon_j
ld1r {V9.8H}, [x13], #2
mla V7.8H, V8.8H, V9.8H
subs x15, x15, #1
bne L_frodokem_mul_add_sb_plus_e_neon_j
b.ne L_frodokem_mul_add_sb_plus_e_neon_j
and V0.16B, V0.16B, V10.16B
and V1.16B, V1.16B, V10.16B
and V2.16B, V2.16B, V10.16B
@@ -1380,13 +1380,13 @@ L_frodokem_gen_a_rows_aes_arm64_blk
stp x12, xzr, [x9], #16
add x11, x12, x14
cmp x9, x10
blt L_frodokem_gen_a_rows_aes_arm64_blk
b.lt L_frodokem_gen_a_rows_aes_arm64_blk
add x13, x13, #1
add x10, x0, x8
cmp x9, x10
blt L_frodokem_gen_a_rows_aes_arm64_row
b.lt L_frodokem_gen_a_rows_aes_arm64_row
cmp x8, #0x80
blt L_frodokem_gen_a_rows_aes_arm64_tail
b.lt L_frodokem_gen_a_rows_aes_arm64_tail
L_frodokem_gen_a_rows_aes_arm64_aes
ld1 {V11.16B, V12.16B, V13.16B, V14.16B}, [x0], #0x40
ld1 {V15.16B, V16.16B, V17.16B, V18.16B}, [x0], #0x40
@@ -1562,10 +1562,10 @@ L_frodokem_gen_a_rows_aes_arm64_aes
st1 {V15.16B, V16.16B, V17.16B, V18.16B}, [x1], #0x40
subs x8, x8, #0x80
cmp x8, #0x80
bge L_frodokem_gen_a_rows_aes_arm64_aes
b.ge L_frodokem_gen_a_rows_aes_arm64_aes
L_frodokem_gen_a_rows_aes_arm64_tail
cmp x8, #0
beq L_frodokem_gen_a_rows_aes_arm64_done
b.eq L_frodokem_gen_a_rows_aes_arm64_done
ld1 {V11.16B, V12.16B, V13.16B, V14.16B}, [x0], #0x40
aese V11.16B, V0.16B
aesmc V11.16B, V11.16B

40
wolfcrypt/src/port/arm/armv8-mlkem-asm.S
View File

@@ -8840,7 +8840,7 @@ _mlkem_cmp_neon:
orr v10.16b, v10.16b, v2.16b
orr v11.16b, v11.16b, v3.16b
subs w2, w2, #0x300
beq L_mlkem_aarch64_cmp_neon_done
b.eq L_mlkem_aarch64_cmp_neon_done
ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #0x40
ld4 {v4.16b, v5.16b, v6.16b, v7.16b}, [x1], #0x40
eor v0.16b, v0.16b, v4.16b
@@ -8892,7 +8892,7 @@ _mlkem_cmp_neon:
orr v10.16b, v10.16b, v2.16b
orr v11.16b, v11.16b, v3.16b
subs w2, w2, #0x140
beq L_mlkem_aarch64_cmp_neon_done
b.eq L_mlkem_aarch64_cmp_neon_done
ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #0x40
ld4 {v4.16b, v5.16b, v6.16b, v7.16b}, [x1], #0x40
eor v0.16b, v0.16b, v4.16b
@@ -9602,9 +9602,9 @@ _mlkem_rej_uniform_neon:
ldr q3, [x5]
ldr q2, [x6]
subs wzr, w1, #0
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
subs wzr, w1, #16
blt L_mlkem_rej_uniform_loop_4
b.lt L_mlkem_rej_uniform_loop_4
L_mlkem_rej_uniform_loop_16:
ld3 {v4.8b, v5.8b, v6.8b}, [x2], #24
zip1 v4.16b, v4.16b, v1.16b
@@ -9646,16 +9646,16 @@ L_mlkem_rej_uniform_loop_16:
add x0, x0, x11, lsl 1
add x12, x12, x11
subs w3, w3, #24
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
sub w10, w1, w12
subs x10, x10, #16
blt L_mlkem_rej_uniform_loop_4
b.lt L_mlkem_rej_uniform_loop_4
b L_mlkem_rej_uniform_loop_16
L_mlkem_rej_uniform_loop_4:
subs w10, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
subs x10, x10, #4
blt L_mlkem_rej_uniform_loop_lt_4
b.lt L_mlkem_rej_uniform_loop_lt_4
ldr x4, [x2], #6
lsr x5, x4, #12
lsr x6, x4, #24
@@ -9685,7 +9685,7 @@ L_mlkem_rej_uniform_loop_4:
cinc x0, x0, lt
cinc x12, x12, lt
subs w3, w3, #6
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
b L_mlkem_rej_uniform_loop_4
L_mlkem_rej_uniform_loop_lt_4:
ldr x4, [x2], #6
@@ -9702,30 +9702,30 @@ L_mlkem_rej_uniform_loop_lt_4:
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
strh w5, [x0]
subs xzr, x5, x13
cinc x0, x0, lt
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
strh w6, [x0]
subs xzr, x6, x13
cinc x0, x0, lt
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
strh w7, [x0]
subs xzr, x7, x13
cinc x0, x0, lt
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
subs w3, w3, #6
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
b L_mlkem_rej_uniform_loop_lt_4
L_mlkem_rej_uniform_done:
mov x0, x12
@@ -10049,7 +10049,7 @@ L_SHA3_transform_blocksx3_crypto_begin:
mov v30.d[1], x0
eor x1, x1, x0
eor v0.16b, v0.16b, v30.16b
bne L_SHA3_transform_blocksx3_crypto_begin
b.ne L_SHA3_transform_blocksx3_crypto_begin
ldr x0, [x29, #40]
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
@@ -10398,7 +10398,7 @@ L_SHA3_shake128_blocksx3_seed_crypto_begin:
mov v30.d[1], x0
eor x2, x2, x0
eor v0.16b, v0.16b, v30.16b
bne L_SHA3_shake128_blocksx3_seed_crypto_begin
b.ne L_SHA3_shake128_blocksx3_seed_crypto_begin
ldr x0, [x29, #40]
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
@@ -10747,7 +10747,7 @@ L_SHA3_shake256_blocksx3_seed_crypto_begin:
mov v30.d[1], x0
eor x2, x2, x0
eor v0.16b, v0.16b, v30.16b
bne L_SHA3_shake256_blocksx3_seed_crypto_begin
b.ne L_SHA3_shake256_blocksx3_seed_crypto_begin
ldr x0, [x29, #40]
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
@@ -11160,7 +11160,7 @@ L_SHA3_transform_blocksx3_neon_begin:
mov v30.d[1], x0
eor x1, x1, x0
eor v0.16b, v0.16b, v30.16b
bne L_SHA3_transform_blocksx3_neon_begin
b.ne L_SHA3_transform_blocksx3_neon_begin
ldr x0, [x29, #40]
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
@@ -11594,7 +11594,7 @@ L_SHA3_shake128_blocksx3_seed_neon_begin:
mov v30.d[1], x0
eor x2, x2, x0
eor v0.16b, v0.16b, v30.16b
bne L_SHA3_shake128_blocksx3_seed_neon_begin
b.ne L_SHA3_shake128_blocksx3_seed_neon_begin
ldr x0, [x29, #40]
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
@@ -12028,7 +12028,7 @@ L_SHA3_shake256_blocksx3_seed_neon_begin:
mov v30.d[1], x0
eor x2, x2, x0
eor v0.16b, v0.16b, v30.16b
bne L_SHA3_shake256_blocksx3_seed_neon_begin
b.ne L_SHA3_shake256_blocksx3_seed_neon_begin
ldr x0, [x29, #40]
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32

40
wolfcrypt/src/port/arm/armv8-mlkem-asm.asm
View File

@@ -8373,7 +8373,7 @@ mlkem_cmp_neon PROC
orr V10.16B, V10.16B, V2.16B
orr V11.16B, V11.16B, V3.16B
subs w2, w2, #0x300
beq L_mlkem_aarch64_cmp_neon_done
b.eq L_mlkem_aarch64_cmp_neon_done
ld4 {V0.16B, V1.16B, V2.16B, V3.16B}, [x0], #0x40
ld4 {V4.16B, V5.16B, V6.16B, V7.16B}, [x1], #0x40
eor V0.16B, V0.16B, V4.16B
@@ -8425,7 +8425,7 @@ mlkem_cmp_neon PROC
orr V10.16B, V10.16B, V2.16B
orr V11.16B, V11.16B, V3.16B
subs w2, w2, #0x140
beq L_mlkem_aarch64_cmp_neon_done
b.eq L_mlkem_aarch64_cmp_neon_done
ld4 {V0.16B, V1.16B, V2.16B, V3.16B}, [x0], #0x40
ld4 {V4.16B, V5.16B, V6.16B, V7.16B}, [x1], #0x40
eor V0.16B, V0.16B, V4.16B
@@ -9067,9 +9067,9 @@ mlkem_rej_uniform_neon PROC
ldr Q3, [x5]
ldr Q2, [x6]
subs wzr, w1, #0
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
subs wzr, w1, #16
blt L_mlkem_rej_uniform_loop_4
b.lt L_mlkem_rej_uniform_loop_4
L_mlkem_rej_uniform_loop_16
ld3 {V4.8B, V5.8B, V6.8B}, [x2], #24
zip1 V4.16B, V4.16B, V1.16B
@@ -9111,16 +9111,16 @@ L_mlkem_rej_uniform_loop_16
add x0, x0, x11, lsl 1
add x12, x12, x11
subs w3, w3, #24
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
sub w10, w1, w12
subs x10, x10, #16
blt L_mlkem_rej_uniform_loop_4
b.lt L_mlkem_rej_uniform_loop_4
b L_mlkem_rej_uniform_loop_16
L_mlkem_rej_uniform_loop_4
subs w10, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
subs x10, x10, #4
blt L_mlkem_rej_uniform_loop_lt_4
b.lt L_mlkem_rej_uniform_loop_lt_4
ldr x4, [x2], #6
lsr x5, x4, #12
lsr x6, x4, #24
@@ -9150,7 +9150,7 @@ L_mlkem_rej_uniform_loop_4
cinc x0, x0, lt
cinc x12, x12, lt
subs w3, w3, #6
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
b L_mlkem_rej_uniform_loop_4
L_mlkem_rej_uniform_loop_lt_4
ldr x4, [x2], #6
@@ -9167,30 +9167,30 @@ L_mlkem_rej_uniform_loop_lt_4
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
strh w5, [x0]
subs xzr, x5, x13
cinc x0, x0, lt
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
strh w6, [x0]
subs xzr, x6, x13
cinc x0, x0, lt
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
strh w7, [x0]
subs xzr, x7, x13
cinc x0, x0, lt
cinc x0, x0, lt
cinc x12, x12, lt
subs wzr, w1, w12
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
subs w3, w3, #6
beq L_mlkem_rej_uniform_done
b.eq L_mlkem_rej_uniform_done
b L_mlkem_rej_uniform_loop_lt_4
L_mlkem_rej_uniform_done
mov x0, x12
@@ -9483,7 +9483,7 @@ L_SHA3_transform_blocksx3_crypto_begin
mov V30.D[1], x0
eor x1, x1, x0
eor V0.16B, V0.16B, V30.16B
bne L_SHA3_transform_blocksx3_crypto_begin
b.ne L_SHA3_transform_blocksx3_crypto_begin
ldr x0, [x29, #40]
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
@@ -9815,7 +9815,7 @@ L_SHA3_shake128_blocksx3_seed_crypto_begin
mov V30.D[1], x0
eor x2, x2, x0
eor V0.16B, V0.16B, V30.16B
bne L_SHA3_shake128_blocksx3_seed_crypto_begin
b.ne L_SHA3_shake128_blocksx3_seed_crypto_begin
ldr x0, [x29, #40]
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
@@ -10147,7 +10147,7 @@ L_SHA3_shake256_blocksx3_seed_crypto_begin
mov V30.D[1], x0
eor x2, x2, x0
eor V0.16B, V0.16B, V30.16B
bne L_SHA3_shake256_blocksx3_seed_crypto_begin
b.ne L_SHA3_shake256_blocksx3_seed_crypto_begin
ldr x0, [x29, #40]
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
@@ -10543,7 +10543,7 @@ L_SHA3_transform_blocksx3_neon_begin
mov V30.D[1], x0
eor x1, x1, x0
eor V0.16B, V0.16B, V30.16B
bne L_SHA3_transform_blocksx3_neon_begin
b.ne L_SHA3_transform_blocksx3_neon_begin
ldr x0, [x29, #40]
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
@@ -10960,7 +10960,7 @@ L_SHA3_shake128_blocksx3_seed_neon_begin
mov V30.D[1], x0
eor x2, x2, x0
eor V0.16B, V0.16B, V30.16B
bne L_SHA3_shake128_blocksx3_seed_neon_begin
b.ne L_SHA3_shake128_blocksx3_seed_neon_begin
ldr x0, [x29, #40]
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
@@ -11377,7 +11377,7 @@ L_SHA3_shake256_blocksx3_seed_neon_begin
mov V30.D[1], x0
eor x2, x2, x0
eor V0.16B, V0.16B, V30.16B
bne L_SHA3_shake256_blocksx3_seed_neon_begin
b.ne L_SHA3_shake256_blocksx3_seed_neon_begin
ldr x0, [x29, #40]
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32

12
wolfcrypt/src/port/arm/armv8-poly1305-asm.S
View File

@@ -141,7 +141,7 @@ _poly1305_arm64_blocks:
stp d12, d13, [x29, #64]
stp d14, d15, [x29, #80]
cmp x2, #0x40
blt L_poly1305_arm64_blocks_done
b.lt L_poly1305_arm64_blocks_done
# Set mask (0x3ffffff), hi bit and 5 into vector registers
movi v25.16b, #0xff
movi v27.4s, #1, lsl 24
@@ -258,9 +258,9 @@ L_poly1305_arm64_blocks_loop_64:
usra v4.2d, v3.2d, #26
and v3.16b, v3.16b, v26.16b
cmp x2, #0x40
bge L_poly1305_arm64_blocks_loop_64
b.ge L_poly1305_arm64_blocks_loop_64
cmp x2, #16
ble L_poly1305_arm64_blocks_done_32
b.le L_poly1305_arm64_blocks_done_32
# Start 32
ld4 {v5.2s, v6.2s, v7.2s, v8.2s}, [x1], #32
sub x2, x2, #32
@@ -340,7 +340,7 @@ L_poly1305_arm64_blocks_loop_64:
and v3.16b, v3.16b, v26.16b
L_poly1305_arm64_blocks_done_32:
cmp x2, #16
beq L_poly1305_arm64_blocks_transfer
b.eq L_poly1305_arm64_blocks_transfer
add x14, x0, #0x60
st4 {v0.s, v1.s, v2.s, v3.s}[0], [x14], #16
st1 {v4.s}[0], [x14]
@@ -354,7 +354,7 @@ L_poly1305_arm64_blocks_transfer:
b L_poly1305_arm64_blocks_start
L_poly1305_arm64_blocks_done:
cmp x2, #16
blt L_poly1305_arm64_blocks_done_all
b.lt L_poly1305_arm64_blocks_done_all
# Load h
ldp w3, w4, [x0, #96]
ldp w5, w6, [x0, #104]
@@ -422,7 +422,7 @@ L_poly1305_arm64_blocks_loop:
subs x2, x2, #16
add x1, x1, #16
# Loop again if more message to do.
bgt L_poly1305_arm64_blocks_loop
b.gt L_poly1305_arm64_blocks_loop
extr x7, x5, x4, #40
ubfx x5, x3, #52, #12
ubfx x6, x4, #14, #26

12
wolfcrypt/src/port/arm/armv8-poly1305-asm.asm
View File

@@ -110,7 +110,7 @@ poly1305_arm64_blocks PROC
stp D12, D13, [x29, #64]
stp D14, D15, [x29, #80]
cmp x2, #0x40
blt L_poly1305_arm64_blocks_done
b.lt L_poly1305_arm64_blocks_done
; Set mask (0x3ffffff), hi bit and 5 into vector registers
movi V25.16B, #0xff
movi V27.4S, #1, lsl 24
@@ -227,9 +227,9 @@ L_poly1305_arm64_blocks_loop_64
usra V4.2D, V3.2D, #26
and V3.16B, V3.16B, V26.16B
cmp x2, #0x40
bge L_poly1305_arm64_blocks_loop_64
b.ge L_poly1305_arm64_blocks_loop_64
cmp x2, #16
ble L_poly1305_arm64_blocks_done_32
b.le L_poly1305_arm64_blocks_done_32
; Start 32
ld4 {V5.2S, V6.2S, V7.2S, V8.2S}, [x1], #32
sub x2, x2, #32
@@ -309,7 +309,7 @@ L_poly1305_arm64_blocks_loop_64
and V3.16B, V3.16B, V26.16B
L_poly1305_arm64_blocks_done_32
cmp x2, #16
beq L_poly1305_arm64_blocks_transfer
b.eq L_poly1305_arm64_blocks_transfer
add x14, x0, #0x60
st4 {V0.S, V1.S, V2.S, V3.S}[0], [x14], #16
st1 {V4.S}[0], [x14]
@@ -323,7 +323,7 @@ L_poly1305_arm64_blocks_transfer
b L_poly1305_arm64_blocks_start
L_poly1305_arm64_blocks_done
cmp x2, #16
blt L_poly1305_arm64_blocks_done_all
b.lt L_poly1305_arm64_blocks_done_all
; Load h
ldp w3, w4, [x0, #96]
ldp w5, w6, [x0, #104]
@@ -391,7 +391,7 @@ L_poly1305_arm64_blocks_loop
subs x2, x2, #16
add x1, x1, #16
; Loop again if more message to do.
bgt L_poly1305_arm64_blocks_loop
b.gt L_poly1305_arm64_blocks_loop
extr x7, x5, x4, #40
ubfx x5, x3, #52, #12
ubfx x6, x4, #14, #26

6
wolfcrypt/src/port/arm/armv8-sha256-asm.S
View File

@@ -658,7 +658,7 @@ L_sha256_len_neon_start:
add w4, w4, w13
add x3, x3, #0x40
subs x24, x24, #1
bne L_sha256_len_neon_start
b.ne L_sha256_len_neon_start
# Round 0
mov w14, v0.s[0]
ror w12, w8, #6
@@ -1037,7 +1037,7 @@ L_sha256_len_neon_start:
add w4, w4, w15
subs w2, w2, #0x40
sub x3, x3, #0xc0
bne L_sha256_len_neon_begin
b.ne L_sha256_len_neon_begin
str w4, [x0]
str w5, [x0, #4]
str w6, [x0, #8]
@@ -1246,7 +1246,7 @@ L_sha256_len_crypto_begin:
add v0.4s, v0.4s, v2.4s
add v1.4s, v1.4s, v3.4s
subs w2, w2, #0x40
bne L_sha256_len_crypto_begin
b.ne L_sha256_len_crypto_begin
# Store digest back
st1 {v0.4s, v1.4s}, [x0]
ldp d8, d9, [x29, #16]

6
wolfcrypt/src/port/arm/armv8-sha256-asm.asm
View File

@@ -621,7 +621,7 @@ L_sha256_len_neon_start
add w4, w4, w13
add x3, x3, #0x40
subs x24, x24, #1
bne L_sha256_len_neon_start
b.ne L_sha256_len_neon_start
; Round 0
mov w14, V0.S[0]
ror w12, w8, #6
@@ -1000,7 +1000,7 @@ L_sha256_len_neon_start
add w4, w4, w15
subs w2, w2, #0x40
sub x3, x3, #0xc0
bne L_sha256_len_neon_begin
b.ne L_sha256_len_neon_begin
str w4, [x0]
str w5, [x0, #4]
str w6, [x0, #8]
@@ -1178,7 +1178,7 @@ L_sha256_len_crypto_begin
add V0.4S, V0.4S, V2.4S
add V1.4S, V1.4S, V3.4S
subs w2, w2, #0x40
bne L_sha256_len_crypto_begin
b.ne L_sha256_len_crypto_begin
; Store digest back
st1 {V0.4S, V1.4S}, [x0]
ldp D8, D9, [x29, #16]

4
wolfcrypt/src/port/arm/armv8-sha3-asm.S
View File

@@ -182,7 +182,7 @@ L_sha3_crypto_begin:
ld1r {v30.2d}, [x1], #8
subs x2, x2, #1
eor v0.16b, v0.16b, v30.16b
bne L_sha3_crypto_begin
b.ne L_sha3_crypto_begin
st4 {v0.d, v1.d, v2.d, v3.d}[0], [x0], #32
st4 {v4.d, v5.d, v6.d, v7.d}[0], [x0], #32
st4 {v8.d, v9.d, v10.d, v11.d}[0], [x0], #32
@@ -409,7 +409,7 @@ L_SHA3_transform_base_begin:
ldr x0, [x27], #8
subs x28, x28, #1
eor x1, x1, x0
bne L_SHA3_transform_base_begin
b.ne L_SHA3_transform_base_begin
ldr x0, [x29, #40]
stp x1, x2, [x0]
stp x3, x4, [x0, #16]

4
wolfcrypt/src/port/arm/armv8-sha3-asm.asm
View File

@@ -143,7 +143,7 @@ L_sha3_crypto_begin
ld1r {V30.2D}, [x1], #8
subs x2, x2, #1
eor V0.16B, V0.16B, V30.16B
bne L_sha3_crypto_begin
b.ne L_sha3_crypto_begin
st4 {V0.D, V1.D, V2.D, V3.D}[0], [x0], #32
st4 {V4.D, V5.D, V6.D, V7.D}[0], [x0], #32
st4 {V8.D, V9.D, V10.D, V11.D}[0], [x0], #32
@@ -341,7 +341,7 @@ L_SHA3_transform_base_begin
ldr x0, [x27], #8
subs x28, x28, #1
eor x1, x1, x0
bne L_SHA3_transform_base_begin
b.ne L_SHA3_transform_base_begin
ldr x0, [x29, #40]
stp x1, x2, [x0]
stp x3, x4, [x0, #16]

6
wolfcrypt/src/port/arm/armv8-sha512-asm.S
View File

@@ -673,7 +673,7 @@ L_sha512_len_neon_start:
add x8, x8, x4
add x4, x4, x14
subs x27, x27, #1
bne L_sha512_len_neon_start
b.ne L_sha512_len_neon_start
# Round 0
mov x13, v0.d[0]
ldr x15, [x3], #8
@@ -1036,7 +1036,7 @@ L_sha512_len_neon_start:
add x4, x4, x19
subs w2, w2, #0x80
sub x3, x3, #0x280
bne L_sha512_len_neon_begin
b.ne L_sha512_len_neon_begin
stp x4, x5, [x0]
stp x6, x7, [x0, #16]
stp x8, x9, [x0, #32]
@@ -1641,7 +1641,7 @@ L_sha512_len_crypto_begin:
add v25.2d, v25.2d, v29.2d
add v24.2d, v24.2d, v28.2d
subs w2, w2, #0x80
bne L_sha512_len_crypto_begin
b.ne L_sha512_len_crypto_begin
# Store digest back
st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0]
ldp d8, d9, [x29, #16]

6
wolfcrypt/src/port/arm/armv8-sha512-asm.asm
View File

@@ -619,7 +619,7 @@ L_sha512_len_neon_start
add x8, x8, x4
add x4, x4, x14
subs x27, x27, #1
bne L_sha512_len_neon_start
b.ne L_sha512_len_neon_start
; Round 0
mov x13, V0.D[0]
ldr x15, [x3], #8
@@ -982,7 +982,7 @@ L_sha512_len_neon_start
add x4, x4, x19
subs w2, w2, #0x80
sub x3, x3, #0x280
bne L_sha512_len_neon_begin
b.ne L_sha512_len_neon_begin
stp x4, x5, [x0]
stp x6, x7, [x0, #16]
stp x8, x9, [x0, #32]
@@ -1556,7 +1556,7 @@ L_sha512_len_crypto_begin
add V25.2D, V25.2D, V29.2D
add V24.2D, V24.2D, V28.2D
subs w2, w2, #0x80
bne L_sha512_len_crypto_begin
b.ne L_sha512_len_crypto_begin
; Store digest back
st1 {V24.2D, V25.2D, V26.2D, V27.2D}, [x0]
ldp D8, D9, [x29, #16]