Added Flash mode and reset method selection options for Olimex board MOD-WIFI-ESP8266(-DEV)
The addition of the FlashMode and ResetMethod selection options via boards.txt.py generation file.
* Respect linking order of libraries
Now has the same order as the Arduino IDE does with its platform.txt
* Remove double-referenced libs
* Change implementation style
Instead of injecting at magic indices, which might break when some other extra-scripts inject other libraries, let's create the LIBS array at the bottom in easy to understand and correct order.
* Fix PRxxx printf format macros
Update toolchain (newlib) to supply proper definitions for PRxxx macros.
Fixes#8220
Added a PRxxx macro to an example to ensure CI will catch any problem like
this in the future.
* Make mkdir.py work unter python3 versions below 3.5
Because early versions of python3 did not have the optional arg "exist_ok" for "pathlib.Path(...).mkdir(...)" a build under this versions will abort with an error message.
This PR will modify the python script so that it works even under python 3.4 (and below).
* Create pins_arduino.h
* Update boards.txt.py
* Update boards.txt
* done a "boards.txt.py --allgen"
* Removed the definition of LED_BUILTIN from variants/wifi_kit_8/pins_arduino.h, because this board has no build in lED
GCC 10.x seems to have a knack for crashing when a function which is declared
to return a value does not. Add a warning, present on all builds, when this
is the case. For more info see https://github.com/esp8266/Arduino/discussions/8160
Thanks to @hreintke and @mcspr for the tips.
* release script: fix variable name error
* Release process in README is decribed twice. Syncing the two walk-throughs.
* adding ARDUINO_ESP8266_VERSION reflecting exactly what's passed to `makecorever.py -v`
* remove "unix-" in version name (which was present even for windows but never used)
Fixes#8069
GCC 10.3 has a patch to stop escaping the initial : in Windows paths which
is causing Arduino and other tools to fail dependency checks and rebuild
everything on every compile.
* Hardware WDT Stack Dump
This Sketch demonstrates the use of a tool to print a stack dump
at reboot after a Hardware WDT event.
The module hwdt_app_entry.cpp writes a stack dump to the serial interface
after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
The sketch must properly initialized the Serial port before the crash.
hwdt_app_entry.cpp is the core file that does the work.
* Corrected Style. Improved HWDT reset detectionat boot.
* Style and typos
* Update comments.
* Improvements to reset reason determination.
Improved comments.
Added option to match the UART speed used by the sketch.
Added option to print greeting at the start to indicate the HWDT stack dump code is active.
Isolated logic for handling strings: one assuming they are not inited at
the time the code is running and one that does. The later appears to be the case.
* Style plus
Fix issue with HWDT reason detection when sketch crashes too fast.
Added sample sketch menu option for crashing with a function defined
with a weak attribute via prototype, but never actually defined in
full function form. eg. `void trouble(void){return;}`
* Moved all configuration options to the top.
Adjusted configuration option order for most likely to be used to the top.
Tried to improve comments.
Replace numbers with enum values.
* Removed clutter of having an alternate printing method.
Regular global strings have worked reliably.
Tweaked reset reason detection.
Reordered elements in global structure.
Improve #if test for debug option
Always improving comments.
* Added delays around uart_div_modify. This appeara to resolve the lost
data problem that occurs when printing after a flash upload using esptool.
Curiously, esptool stub also uses similar delays.
Word choices and description improvements.
* Finished TODO looked at assembly of app_entry_redefinable to confirm
no mixed up stack frame was created. Also removed no longer needed
extra level of function calling.
Use existing macros from uart_register,h to handle getting current
UART speed. Added some missing `const`.
* Comment changes.
Added a few newlines to printing.
Decreased the settling delay after the uart_div_modify call.
* Improved comments.
Print caution message when stack integrity checks failed.
* Several corrections to set_uart_speed
Comment improvements
Added missing ";"
* Removed unused include.
Code cleanup.
Comments.
* Now runs from flash before SDK is started.
Cache_Read_Enable working. Free 1K of IRAM and 200 bytes of DRAM.
* Changed ICACHE size from 32K to 16K to avoid conflict with
SDK or core selecting smaller 16K ICACHE.
The Issue: Cache_Read_Enable does not clear the bit field when mapping IRAM to
ICACHE on register 0x3FF00024. Thus, no problem upgrading from 16K to 32K;
however, you cannot downgrade from 32K to 16K. These bits are cleared at boot.
Improved uart data rate change handling.
Update comments.
* Added support to print ThunkStack.
Adjustments to inline asm. Added "memory" when callx0 is used.
* comment cleanup. added missing additional #if defined()
Made structure name unique. Changed HWDT_INFO to HWDR_INFO_S.
* Update style used for structure and typedef to match that used in core
when snake case is used. Moved a constexpr block up a scope so that
some #ifdef debug code compiles again.
* Updated comments
* Corrected new errors from upgrade to GCC 10.1 toolchain related to
constexpr and casting integers to pointers.
Cleared warning for asm.
* Work around divide by 0 HWDT event under toolchain 10.1.
* Changes to move feature into core.
Making ready for selection via tools menu, updated defines to DEBUG_ESP_,,, format.
Added HWDT and HWDT_NO4KEXTRA options to boards.txt.py. These options are selectable
from Arduino IDE 'Tools->Debug Level'
Converted macro names that use to be constexprs to uppercase.
Update comments. Added comments to maintainers anotated by '//C'
Revised example.
* Fix stack character buffer length.
* Updated comment to reflect support via Arduino IDE Tools menu.
* Improve meshing of HWDT and NOEXTRA4K
* Made compatible with `disable_extra4k_at_link_time()` usage.
Changed to strings containing "no4kextra" to "noextra4k" to be consistant with
original usage.
Updated example to provide indications of which build options were used or resulted.
Some comment cleanup.
* CI style
* Adjusted down the ROM Stack space for the extra 4K Heap option.
If too large, a really bad crashes occurs.
Updated the example to start WiFi. This helps double check ROM
Stack space size is not too small at start.
Removed stale comment.
Changed cont stack check functions to make globally available.
* Add replacement aes_unwrap for the debug HWDT option.
Improves the SYS stack space available when using the extra 4K Heap
option in conjunction with HWDT. Replaces the ROM AES buffer at
0x3FFFEA80 with one provided by malloc().
* Update umm_info_safe_printf_P to support default of unaligned PROGMEM strings.
* Improve cont stack trace for yielding case.
Check if cont stack is yielding to SYS, use g_pcont->sp_yield to limit the
amount of the cont stack dumped.
Generalized dev logic path to create a generalized debug function hwdt_pre_sdk_init_icache.
* Added missed update to heap.cpp for change to use PSTR instead of PSTR4
* Updated comments and #if in aes_unwrap.
* Update boards.txt
Provides a transparently accessible additional block of RAM of 128K to
8MB by using an external SPI SRAM. This memory is managed using the UMM
memory manager and can be used by the core as if it were internal RAM
(albeit much slower to read or write).
The use case would be for things which are quite large but not
particularly frequently used or compute intensive. For example, the SSL
buffers of 16K++ are a good fit for this, as are the contents of Strings
(both to avoid main heap fragmentation as well as allowing Strings of
>30KB).
A fully associative LRU cache is used to limit the SPI bus bottleneck,
and background writeback is supported.
Uses a define in boards.txt to enable. If this value is not defined,
then the entire VM routines should not be linked in to user apps
so there should be no space penalty w/o it.
UMM `malloc` and `new` are modified to support internal and external
heap regions. By default, everything comes from the standard heap, but
a call to `ESP.setExternalHeap()` before the allocation (followed by a
call to `ESP.resetHeap()` will make the allocation come from external
RAM. See the `virtualmem.ino` example for use.
If there is no external RAM installed, the `setExternalHeap` call is a
no-op.
The String and BearSSL libraries have been modified to use this external
RAM automatically.
Theory of Operation:
The Xtensa core generates a hardware exception (unrelated to C++
exceptions) when an address that's defined as invalid for load or store.
The XTOS ROM routines capture the machine state and call a standard C
exception handler routine (or the default one which resets the system).
We hook into this exception callback and decode the EXCVADDR (the
address being accessed) and use the exception PC to read out the
faulting instruction. We decode that instruction and simulate it's
behavior (i.e. either loading or storing some data to a
register/external memory) and then return to the calling application.
We use the hardware SPI interface to talk to an external SRAM/PSRAM,
and implement a simple cache to minimize the amount of times we need
to go out over the (slow) SPI bus. The SPI is set up in a DIO mode
which uses no more pins than normal SPI, but provides for ~2X faster
transfers. SIO mode is also supported.
NOTE: This works fine for processor accesses, but cannot be used by
any of the peripherals' DMA. For that, we'd need a real MMU.
Hardware Configuration (only use 3.3V compatible SRAMs!):
SPI byte-addressible SRAM/PSRAM: 23LC1024 or smaller
CS -> GPIO15
SCK -> GPIO14
MOSI -> GPIO13
MISO -> GPIO12
(note these are GPIO numbers, not the Arduino Dxx pin names. Refer
to your ESP8266 board schematic for the mapping of GPIO to pin.)
Higher density PSRAM (ESP-PSRAM64H/etc.) should work as well, but
I'm still waiting on my chips so haven't done any testing. Biggest
concern is their command set and functionality in DIO mode. If DIO
mode isn't supported, then a fallback to SIO is possible.
This PR originated with code from @pvvx's esp8266web server at
https://github.com/pvvx/esp8266web (licensed in the public domain)
but doesn't resemble it much any more. Thanks, @pvvx!
Keep a list of the last 8 lines in RAM (~.5KB of RAM) and use that to
speed up things like memcpys and other operations where the source and
destination addresses are inside VM RAM.
A custom set of SPI routines is used in the VM system for speed and code
size (and because the core cannot be dependent on a library).
Because UMM manages RAM in 8 byte chunks, attempting to manage the
entire 1M available space on a 1M PSRAM causes the block IDs to
overflow, crashing things at some point. Limit the UMM allocation to
only 256K in this case. The remaining space can manually be assigned to
buffers/etc. managed by the application, not malloc()/free().
without any external wiring.
This patch introduces the new method
Esp.rebootIntoUartDownloadMode()
When the user calls this method the ESP8266 reboots into the UART
download mode. In this mode the user can use esptool.py to flash a new
firmware file. The following command was used to test it:
$ esptool.py --before no_reset --after soft_reset --chip esp8266 \
--port /dev/ttyUSB0 --baud 460800 write_flash 0x0 firmware.bin
The implementation is based on the original implementation in the
boot ROM. Some parts of the original implementation can be found in
[1]. This patch is a squashed and simplified version of [2]. The non
squashed version might be helpful in case of debugging issues.
[1] https://github.com/twischer/xtensa-subjects/blob/master/reversed/bootrom.c
[2] https://github.com/twischer/Arduino/tree/reboot_uart_download_full
Signed-off-by: Timo Wischer <twischer@freenet.de>
RODATA can be copied automatically by the bootrom, so no reason not to
allow its use for strings and constants in eboot.c
Revert to pfalcon's original uzlib since the single patch to remove
RODATA is not required.
Rationalize eboot.ld linker script, clean up BSS and init it in code.
Saves 112 bytes of space in the bootloader sector by removing the
extra code associated with literal loads.
* Move CRC out of bootload sector
We added protection to only erase the bootload sector when flashing an
image when the new sector != the old sector. This was intended to
minimize the chance of bricking (i.e. if there was a powerfail during
flashing of the boot sector the chip would be dead).
Unfortunately, by placing the CRC inside the eboot sector *every*
application will have a unique eboot sector (due to the crc/len), so
this protection doesn't work.
Move the CRC into the first 8 bytes of IROM itself. This frees up extra
space in the boot sector and ensures that eboot won't be reflashed
unless there really is an eboot change.
Update newlib to enable the __ieee754_remainder(f) calls required by
std::remainder and others.
Add device test for std::remainder variants.
Fixes#7845
A couple board types reported ESP8266_GENERIC instead of their proper
types in boards.txt (and in defined generated therefrom/etc.).
Give them proper board types based on their names, like other modules.
* Allow specifying waveform generator in source code
Allows code to explicitly specify which waveform generator it wants,
without needing to use one of the 100 IDE menus or adding a `-D`
compile-time define.
Uses weakrefs to allow for apps to call `enablePhaseLockedWaveform();`
within their `setup()` (or anywhere, really) and have the phase locked
versions override the default waveform generators automatically.
For example:
````
void setup() {
// Uncomment following line to use phase-locked waveform generator
// enablePhaseLockedWaveform();
Serial.begin(115200);
pinMode(LED_BUILTIN, OUTPUT); // Initialize the LED_BUILTIN pin as an output
analogWriteRange(1000);
}
void loop() {
analogWrite(LED_BUILTIN, 100);
delay(1000); // Wait for a second
analogWrite(LED_BUILTIN, 900);
delay(2000); // Wait for two seconds (to demonstrate the active low LED)
}
````
Also adds an example showing it's use.
Address @dok-net's comments and also remove the _weak/_bound version of
startWaveform() since it's invariant of the actual waveform generator.
The FSMs that drive the encryption logic are not performance critical,
but they are very large. Build BearSSL using -Os on them, leaving -O2
everywhere else (i.e. encryption) for speed.
Saves 1-2KB of flash for SSL applications.
* Upgrade to upstream newlib 4.0.0 release
Includes 64 bit time_t and 5 years of updates.
Binary incompatible with libraries which use time_t (due to the size
difference). Recompiling with the new newlib should be sufficient for
most libraries, assuming source is available.
* Remove tools/sdk/libc directory, it isn't used anywhere
Somewhere along the line the copy of libc in tools/sdl/libc was taken
out of the build process. Files in there are not used, take add'l time
to build and install on a toolchain release, and just cause confusion.
Remove them.
* Fix 64-bit time for LittleFS
The core was setting 64-bit times automatically on new file creation or
updates, but would fail when attempting to read them back due to 64/32b
confusion.
Now attempt to read 64b time, and if that fails fallback to reading 32b
time to allow both old and new FS to preserve timestamps.
* Update to jjsuwa-sys3175 additions to GCC and newlib
@jjsuwa-sys3175 contributed multiple patches to GCC, included in
the toolchain, as well as a slightly faster pgm_read_byte() macro.
* Rebuild w/addl GCC patches, new BearSSL flags
* Remove copied libgcc.a file, is contained in toolchain
This commit adds W5500 W5100 and ENC28j60 drivers from @njh with credits
They are available in libraries/
An example is added in W5500 examples directory
plus:
* Extract dhcp server from lwip2 and add it to the core as a class.
It must always be present, it is linked and can be called by fw on boot.
So it cannot be stored in a library.
* ethernet: static or dhcp works
* PPPServer: example
* bring WiFi.config() to the lwIP generic interface (argument reorder common function)
* move hostname() from WiFI-STA to generic interface
* remove non readable characters from dhcp-server comments
* dhcp-server: magic_cookie is part of bootp rfc
* fixes from https://github.com/d-a-v/W5500lwIP/issues/17
* enable lwip_hook_dhcp_parse_option()
* +ethernet tcp client example in w5500 library examples
* Fix: cannot build after #7060 on Win64
* add double-quotes to `compiler.S.flags`
* fix windows-specific processes (`recipe.hooks.linking.prelink.[12].pattern.windows`)
* rewrite processing of "mkdir" and "cp" in python because of platform-independence
* make consistent with the use of quotation marks in other *.py files
* PoC cache configuration control
Expaned boards.txt.py to allow new MMU options and create revised .ld's
Updated eboot to pass 48K IRAM segments.
Added Cache_Read_Enable intercept to modify call for 16K ICACHE
Update platform.txt to pass new mmu options through to compiler and linker preprocessor.
Added quick example: esp8266/MMU48K
* Style corrections
Added MMU_ qualifier to new defines.
Moved changes into their own file.
Don't know how to fix platformio issue.
* Added detailed description for Cache_Read_Enable.
Updated tools/sizes.py to report correct IRAM size and indicate ICACHE size.
Merged in earlephilhower's work on unaligned exception. Refactored and added
support for store operations and changed the name to be more closely aligned
with its function. Improved crash reporting path.
* Style and MMU_SEC_HEAP corrections.
* Improved asm register usage.
Added some inline functions to aid in byte and short access to iRAM.
* only byte read has been tested
Updated .ld file to work better with platform.io; however, I am still
missing some steps, so platformio will still fail.
* Interesting glitch in boards.txt after github merge. A new board in
master was missing new additions added by boards.txt.py in the PR.
Which the CI flags when it rebuilds boards.txt.
* Support for 2nd Heap, excess IRAM, through umm_malloc.
Adapted changes to umm_malloc, Esp.cpp, StackThunk.cpp,
WiFiClientSecureBearSSL.cpp, and virtualmem.ino to irammem.ino from
@earlephilhower PR #6994.
Reworked umm_malloc to use context pointers instead of copy context.
umm_malloc now supports allocations from IRAM. Added class
HeapSelectIram, ... to aid in selecting alternate heaps,
modeled after class InterruptLock.
Restrict alloc request from ISRs to DRAM.
Never ending improvements to debug printing.
Sec Heap option now pulls in free IRAM left over in the 1st 32K block.
Managed through umm_malloc with HeapSelectIram.
Updated examples.
* Post push CI cleanup.
* Cleanup part II
* Cleanup part III
* Updates to support platformio, maybe.
* Added exception C wrapper replacement.
* CI Cleanup
* CI Cleanup II
Don't know what to do with platformio it doesn't like my .S file.
ifdef out USE_ISR_SAFE_EXC_WRAPPER to block the new assemlby module
from building on platformio only.
* Changes to exc-c-wrapper-handler.S to assemble under platformio.
* For platformio, Correction to toolchain-xtensa include path.
@mcspr, Thankyou!
* Temporarily added --print-memory-usage to ld parameters for cross-checking IRAM size.
* undo change to platform.txt
* correct merge conflict. take 1
* Fixed #if... for building umm_get_oom_count. It was not building when UMM_STATS_FULL was used.
* Commented out XMC support. Compatibility issues with PoC when using 16K ICACHE.
* Corrected size.py, DRAM bracketing changed to not include ICACHE with DRAM total.
* Added additional _context for support of use of UMM_INLINE_METRICS.
Corrected some UMM_POSION missed edits.
* Changes to clear errors and warnings from toolchain 10.1
Several fixes and improvements to example MMU48K.
With the improved optimization in toolchain 10.1 The example divide by 0
exception was failing with a HWDT event instead of its exception handler.
The compiler saw the obscured divide by 0 and replaced it with a break point.
* Isolated incompatable definitions related to _xtos_set_exception_handler.
GDBSTUB definitions are different from the BootROM's.
* Update tools/platformio-build.py
Co-authored-by: Max Prokhorov <prokhorov.max@outlook.com>
* Requested changes
Changed mmu related usages of ETS_... defines to DBG_MMU_...
Cleanup in example MMU48K.ino. Removed stale memory reference macro
and mmu_status print statement. Cleanup printf '\n' to be '\r\n'.
Improved issolation of development debug prints from the rest of the debug prints.
* Corrected comment. And added missing include.
* Improve comment.
* style and comment correction
* Added draft mmu.rst file and updated index.
Updated example HeapMetric.ino to also illustrate use of IRAM
Improved comments in exc-c-wrapper-handler.S. Added insurance IRQ disable.
* Updated mmu.rst
Improved function name uniqueness for is_iram, is_dram, and is_icache by
adding prefix mmu_. Also, made them available outside of a debug build.
Made pointer precision width more specific.
Made some of the static inline functions in mmu_irm.h safe for ISRs by
setting then for always inline.
* Add a default MMU_IRAM_SIZE value for a new CI test to pass.
Extended use 'umm_heap_context_t *_context' argument in ..._core functions
and expanded its usage to reduce unnecessary repeated calls to
umm_info(NULL, false), also removed recursion from umm_info(NULL, true).
Fixed stack buffer length in umm_info_safe_printf_P and heap.cpp.
Added example for creating an IRAM reserve section.
Updated mmu.rst. Grammar and spelling corrections.
* CI appeasement
* CI appeasement with comment correction.
* Ensure SYS always runs with DRAM Heap selected.
* Add/move heap stack overflow/underflow check to Esp.cpp where the event was discarded.
* Improved comment clarity of purpose for IramReserve.ino. Clean up MMU48K.ino
* Added missing #include
* Corrected usage of warning
* CI appeasement and use #message not #pragma message
* Updated git version of eboot.elf to match build version.
Good test catch.
* Remove conditional build option USE_ISR_SAFE_EXC_WRAPPER, always install.
Use the replacement wrapper on non32xfer_exception_handler install.
Added comments to code describing some exception handling issues.
* Updated mmu.rst
* Expanded and clarified comments.
Limited access to some detailed typdefs/prototypes to .cpp
modules, to avoid future build conflicts.
Completed TODO for verifing that the "C" structure struct __exception_frame
matches the ASM version.
Fixed some typo's, code rot, and added some more cases in examaple irammem.ino.
Refactored a little and reordered printing to ease comparison between methods.
Corrected `#ifdef __cplusplus` coverage area. Cleaned up `extern "C" ...` usage.
Fixes issues with including mmu_iram.h or esp8266_undocumented.h in .c files.
* Style fixes and more cleanup
* Style fix
* Remove unnessasary IRAM_ATTR from install_non32xfer_exception_handler
Some comment tuning.
In the context of _xtos_set_exception_handler and the functions it registers,
changed to type int for exception cause type. This is also the type used by gdbstub
and some other Xtensa files I found.
Recent releases may work better with some newer MacOS releases
according to their commit logs.
Ensure esptool detects the flash size and doesn't use the one hardcoded
in the bootloader. Thanks to @d-a-v for noticing the esptool change.
* every other ci builder uses waveform phase lock
* fix indentation
* same defaults for PIO as in IDE
* CI: force logging without error/warning
* remove forced logging
* Re-implement PWM generator logic
Add special-purpose PWM logic to preserve alignment of PWM signals for
things like RGB LEDs.
Keep a sorted list of GPIO changes in memory. At time 0 of the PWM
cycle, set all pins to high. As time progresses bring down the
additional pins as their duty cycle runs out. This way all PWM signals
are time aligned by construction.
This also reduces the number of PWM interrupts by up to 50%. Before,
both the rising and falling edge of a PWM pin required an interrupt (and
could shift arround accordingly). Now, a single IRQ sets all PWM rising
edges (so 1 no matter how many PWM pins) and individual interrupts
generate the falling edges.
The code favors duty cycle accuracy over PWM period accuracy (since PWM
is simulating an analog voltage it's the %age of time high that's the
critical factor in most apps, not the refresh rate). Measurements give
it about 35% less total error over full range at 20khz than master.
@me-no-dev used something very similar in the original PWM generator.
* Adjust running PWM when analogWriteFreq changed
Use fixed point math to adjust running PWM channels to the new
frequency.
* Also preserve phase of running tone/waveforms
Copy over full high/low periods only on the falling edge of a cycle,
ensuring phase alignment for Tone and Servo.
* Clean up signed/unsigned mismatch, 160MHz operat'n
* Turn off PWM on a Tone or digitalWrite
Ensure both the general purpose waveform generator and the PWM generator
are disabled on a pin used for Tone/digitalWrite.
* Remove hump due to fixed IRQ delta
A hump in the dueling PWMs was very prominent in prior pulls.
The hump was caused by having a PWM falling edge just before the cycle
restart, while having the other channel requesting a 1->0 transition
just outside the busy-loop window of 10us. So it gets an IRQ for channel
B 0->1, then waits 2..8us for the next PWM full cycle 0->1, and ends up
returning from interrupt and not scheduling another IRQ for 10us...hence
the horizontal leg of the bump...
Reduce the minimum IRQ latency a little bit to minimize this effect.
There will still be a (significantly smaller) hump when things cross, but
it won't be anywhere near as bad or detectable.
* Speed PWM generator by reordering data struct
Breaking out bitfields required a load and an AND, slowing things down
in the PWM loop. Convert the bitfield into two separate natural-sized
arrays to reduce code size and increase accuracy.
* Remove if() that could never evaluate TRUE
* Add error feedback to waveform generation
Apply an error term to generated waveform phase times to adjust for any
other ongoing processes/waveforms. Take the actual edge generation
times, subtract them from the desired, and add 1/4 of that (to dampen
any potential oscillations) to the next similar phase of that waveform.
Allows the waveform to seek its proper period and duty cycle without
hardcoding any specific calibrations (which would change depending on
the codepaths, compiler options, etc.) in the source.
* Move _stopPWM and _removePWMEntry to IRAM
Thanks to @dok-net for noticing these need to be in IRAM as they may be
called by digitalWrites in an IRQ.
* Avoid long wait times when PWM freq is low
* Fix bug where tone/pwm could happen on same pin
* Adjust for random 160MHZ operation
The WiFi stack sometimes changes frequency behind our backs, so ESP's
cycle counter does not count constant ticks.
We can't know how long it's been at a different than expected frequency,
so do the next best thing and make sure we adjust any ESP cycles we're
waiting for by the current CPU speed.
This can lead to a blip in the waveform for 1 period when the frequency
toggles from normal, and when it toggles back, but it should remain
for the intervening periods.
Should avoid a lot of LED shimmering and servo errors during WiFi
connection (and maybe transmission).
* Clean up leftover debugs in ISR
* Subtract constant-time overhead for PWM, add 60khz
PWM has a constant minimum time between loops with a single pin, so pull
that time out of the desired PWM period and shift the center of the PWM
frequency closer to the desired without any dynamic feedback needed.
Enable 60khz PWM, even though it's not terribly useful as it causes an
IRQ every ~8us (and each IRQ is 2-3us). The core can still run w/o WDT,
but it's performance is about 5x slower than unloaded.
* Fix GPIO16 not toggling properly.
* Remove constant offset to PWM period
analogWrite doesn't know about the change in total PWM cycles, so it is
possible for it to send in a value that's beyond the maximum adjusted
PWM cycle count, royally messing up things. Remove the offset.
Also, fix bug with timer callback functions potentially disabling the
timer if PWM was still active.
* Remove volatiles, replace with explicit membarrier
Volatiles are expensive in flash/IRAM as well as in runtime because they
introduce `memw` instructions everywhere their values are used.
Remove the volatiles and manually mark handshake signals for
re-read/flush to reduce code and runtime in the waveform generator/PWM.
* Consolidate data into single structure
Save IRAM and flash by using a class to hold waveform generator state.
Allows for bast+offset addressing to be used in many cases, removing
`l32r` and literals from the assembly code.
* Factor out common timer shutdown code
* Remove unneeded extra copy on PWM start
* Factor out common edge work in waveform loop
* Factor out waveform phase feedback loop math
* Reduce PWM size by using 32b count, indexes
Byte-wide operations require extra instructions, so make index and count
a full 32-bits wide.
* GP16O is a 1-bit register, just write to it
Testing indicates that GP16O is just a simple 1-bit wide register in the
RTC module. Instead of |= and &- (i.e. RmW), use direct assignment in
PWM generator.
* Increase PWM linearity in low/high regions
By adjusting the PWM cycle slightly to account for the fixed time
through the compute loop, increase the linear response near the min and
max areas.
* Remove redundant GetCycleCount (non-IRQ)
* Factor out common timer setup operations
* Fix clean-waveform transition, lock to tone faster
New startWaveform waveforms were being copied over on the falling edge
of the cycle, not the rising edge. Everything else is based on rising
edge, so adjust accordingly.
Also, feedback a larger % of the error term in standard waveform
generation. Balances the speed at which it locks to tones under
changing circumstances with it not going completely bonkers when a
transient error occurs due to some other bit.
* Reduce IRAM by pushing more work to _setPWM
Simply mark pins as inactive, don't adjust the ordered list until the
next _startPWM call (in IROM).
* Fix typo in PWM pin 1->0 transition
Actually check the pin mask is active before setting the PWM pin low.
D'oh.
* Combine cleanup and pin remove, save 50 bytes IROM
The cleanup (where marked-off pins are removed from the PWM time map)
and remove (where a chosen pin is taken out of the PWM map) do
essentially the same processing. Combine them and save ~50 bytes of
code and speed things up a tiny bit.
* Remove unused analogMap, toneMap
Save ~100 bytes of IROM by removing the tone/analog pin tracking from
the interface functions. They were completely unused.
* Save IRAM/heap by adjusting WVF update struct
The waveform update structure included 2 32-bit quantities (so, used
8 * 17 = 136 bytes of RAM) for the next cycle of a waveform.
Replace that with a single update register, in a posted fashion. The
logic now sets the new state of a single waveform and returns
immediately (so, no need to wait 1ms if you've got an existing waveform
of 1khz). The waveform NMI will pick up the changed value on its next
cycle.
Reduces IRAM by 40 bytes, and heap by 144 bytes.
* Don't duplicate PWM period calculation
Let the waveform generator be the single source of truth for the PWM
period in clock cycles.
Reduces IRAM by 32 bytes and makes things generally saner.
* Factor out common PWM update code
Replace repeated PWM update logic with a subroutine, and move the
PWMUpdate pointer into the state itself. Reduces IROM and IRAM,
removes code duplication.
Also remove single-use macros and ifdef configurable options as the
IRAM and IROM impact of them are now not very large.
* Fix regression when analogWrite done cold
Lost an `initTimer()` call in a refactoring, resulting in the core
hanging forever while waiting for the NMI which will never happen.
Re-add as appropriate.
* Save 16b of IRAM by not re-setting edge intr bit
Per @dok-net, drop the rewrite of the edge trigger flag in the timer
interrupt register. It's set on startup and never cleared, so this is
redundant. Drops ~16 bytes of IRAM.
* Allow on-the-fly PWM frequency changes
When PWM is running and analogWriteFreq is called, re-calculate the
entire set of PWM pins to the new frequency. Preserve the raw
numerator/denominator in an unused bit of the waveform structure to
avoid wasting memory.
* Adjust for fixed overhead on PWM period
Pulls the actual PWM period closer to the requested one with a simple,
0-overhead static adjustment.
* Fix value reversal when analogWrite out of range
Silly mistake, swapped high and low values when checking analogWrite for
over/under values. Fixed
* Don't optimize the satopWaveform call
Save a few bytes of IRAM by not using -O2 on the stopWaveform call. It
is not a speed-critical function.
* Avoid side effects in addPWMtoList
* Adjust PWM period as fcn of # of PWM pins
Results in much closer PWM frequency range over any number of PWM pins,
while taking 0 add'l overhead in IRAM or in the IRQ.
* Fix occasional Tone artifacts
When _setPWMFreq was called the initial PWM mask was not set to 0
leading to occasional issues where non-PWM pins would be set to 1
on the nextPWM cycle. Manifested itself as an overtone at the PWM
frequency +/-.
* Reduce CPU usage and enhance low range PWM output
Borrow a trick from #7022 to exit the busy loop when the next event is
too far out. Also reduce the IRQ delta subtraction because it was
initially not NMI so there was much more variation than now.
Keep the PWM state machine active at a higher prio than the standard
tone generation when the next edge is very close (i.e. when we're at
the max or min of the range and have 2 or more near edges). Adds a
lot of resolution to the response at low and high ranges.
Go from relative to absolute cycle counts in the main IRQ loop so that
we don't mingle delta-cycles when the delta start was significantly
different.
* Update min IRQ time to remove humps in PWM linearity
Keep PWM error <2.0% on entire range, from 0-100%, and remove the
hump seen in testC by fixing the min IRQ delay setting.
* Remove minor bump at high PWM frequencies
The IRQ lead time was a tiny bit undersized, causing IRQs to come back
too late for about .25us worth of PWM range. Adjust the constant
accordingly
