14 Commits

Author	SHA1	Message	Date
Kristijan Gjoshev	0fe725909e	Update I2S base frequency and frequency dividers to real ones (#4031) ... * Fix I2S base frequency * Update frequency dividers for I2S Reference: https://github.com/espressif/ESP8266_MP3_DECODER/blob/master/mp3/driver/i2s_freertos.c * fixed i2s_set_rate, added i2s_get_real_rate() and i2s_set_dividers * Minimise float calculations	2018-01-20 15:58:42 -08:00
jpmendoza	af0f5ed956	Issue #1062: Implement support for HSPI overlap mode.	2017-05-08 03:04:11 -05:00
Ivan Grokhotkov	4b43860276	Add offset parameter to rtcUserMemoryRead/Write, expose RTC_USER_MEM in esp8266_peri.h	2016-06-02 13:39:53 +08:00
Markus Sattler	02e22b38cb	add define RANDOM_REG32 ESP8266_DREG(0x20E44)	2015-12-08 11:33:15 +01:00
Markus Sattler	ac0264767a	#1151 SPI definition correction - SPILADDR	2015-12-05 13:04:24 +01:00
John Doe	3a525e47cf	add I2S core	2015-06-22 15:47:22 +03:00
John Doe	cfb9cf7374	double	2015-06-03 22:23:19 +03:00
John Doe	6ab3c76e03	register and clock changes	2015-06-02 00:11:20 +03:00
John Doe	1501818c67	add RTC registers	2015-06-01 03:27:21 +03:00
Ivan Grokhotkov	4fdd546ad5	Fix build	2015-05-24 15:35:18 +03:00
ficeto	a689d6715b	revert some changes that were wrong	2015-05-06 20:54:56 +03:00
ficeto	fcbd7dbed0	Change UART register access methods	2015-05-03 16:44:19 +03:00
Markus Sattler	d4e6561b52	add back pull-down support	2015-05-01 14:46:08 +02:00
ficeto	fbec557ddb	Importing my changes	2015-04-30 20:48:50 +03:00