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https://github.com/esp8266/Arduino.git
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deprecate RTC_REG macros in favor of TIMER_REG macros (old typo in macro names) (#5326)
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@ -65,19 +65,19 @@
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#define ETS_CACHED_ADDR(addr) (addr)
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#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))
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#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)
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#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
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#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)))
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#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
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#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))
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#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)
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#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
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#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)))
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#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
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#define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|((value)<<(shift)) ))
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//}}
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//Periheral Clock {{
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#define CPU_CLK_FREQ 80*1000000 //unit: Hz
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#define APB_CLK_FREQ CPU_CLK_FREQ
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#define UART_CLK_FREQ APB_CLK_FREQ
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#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256
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#define CPU_CLK_FREQ 80*1000000 //unit: Hz
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#define APB_CLK_FREQ CPU_CLK_FREQ
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#define UART_CLK_FREQ APB_CLK_FREQ
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#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256
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//}}
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//Peripheral device base address define{{
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@ -85,110 +85,119 @@
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#define PERIPHS_GPIO_BASEADDR 0x60000300
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#define PERIPHS_TIMER_BASEDDR 0x60000600
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#define PERIPHS_RTC_BASEADDR 0x60000700
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#define PERIPHS_IO_MUX 0x60000800
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#define PERIPHS_IO_MUX 0x60000800
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//}}
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//Interrupt remap control registers define{{
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#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04)
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#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04)
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#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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//}}
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//GPIO reg {{
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#define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg))
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#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg), val)
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#define GPIO_OUT_ADDRESS 0x00
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#define GPIO_OUT_W1TS_ADDRESS 0x04
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#define GPIO_OUT_W1TC_ADDRESS 0x08
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#define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg))
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#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg), val)
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#define GPIO_OUT_ADDRESS 0x00
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#define GPIO_OUT_W1TS_ADDRESS 0x04
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#define GPIO_OUT_W1TC_ADDRESS 0x08
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#define GPIO_ENABLE_ADDRESS 0x0c
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#define GPIO_ENABLE_W1TS_ADDRESS 0x10
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#define GPIO_ENABLE_W1TC_ADDRESS 0x14
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#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff
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#define GPIO_ENABLE_ADDRESS 0x0c
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#define GPIO_ENABLE_W1TS_ADDRESS 0x10
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#define GPIO_ENABLE_W1TC_ADDRESS 0x14
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#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff
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#define GPIO_IN_ADDRESS 0x18
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#define GPIO_IN_ADDRESS 0x18
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#define GPIO_STATUS_ADDRESS 0x1c
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#define GPIO_STATUS_W1TS_ADDRESS 0x20
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#define GPIO_STATUS_W1TC_ADDRESS 0x24
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#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff
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#define GPIO_STATUS_ADDRESS 0x1c
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#define GPIO_STATUS_W1TS_ADDRESS 0x20
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#define GPIO_STATUS_W1TC_ADDRESS 0x24
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#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff
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#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c
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#define RTC_CALIB_START BIT31 //first write to zero, then to one to start
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#define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms
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#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c
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#define RTC_CALIB_START BIT31 //first write to zero, then to one to start
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#define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms
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#define GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70
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#define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero
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#define RTC_CALIB_VALUE_MASK 0xfffff
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#define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero
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#define RTC_CALIB_VALUE_MASK 0xfffff
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#define GPIO_PIN0_ADDRESS 0x28
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#define GPIO_PIN0_ADDRESS 0x28
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#define GPIO_ID_PIN0 0
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#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
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#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15)
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#define GPIO_ID_NONE 0xffffffff
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#define GPIO_ID_PIN0 0
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#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
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#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15)
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#define GPIO_ID_NONE 0xffffffff
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#define GPIO_PIN_COUNT 16
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#define GPIO_PIN_COUNT 16
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#define GPIO_PIN_CONFIG_MSB 12
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#define GPIO_PIN_CONFIG_LSB 11
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#define GPIO_PIN_CONFIG_MASK 0x00001800
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#define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB)
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#define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK)
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#define GPIO_PIN_CONFIG_MSB 12
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#define GPIO_PIN_CONFIG_LSB 11
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#define GPIO_PIN_CONFIG_MASK 0x00001800
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#define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB)
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#define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK)
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#define GPIO_WAKEUP_ENABLE 1
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#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE)
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#define GPIO_PIN_WAKEUP_ENABLE_MSB 10
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#define GPIO_PIN_WAKEUP_ENABLE_LSB 10
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#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400
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#define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB)
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#define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK)
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#define GPIO_WAKEUP_ENABLE 1
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#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE)
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#define GPIO_PIN_WAKEUP_ENABLE_MSB 10
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#define GPIO_PIN_WAKEUP_ENABLE_LSB 10
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#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400
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#define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB)
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#define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK)
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#define GPIO_PIN_INT_TYPE_MASK 0x380
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#define GPIO_PIN_INT_TYPE_MSB 9
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#define GPIO_PIN_INT_TYPE_LSB 7
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#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)
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#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)
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#define GPIO_PIN_INT_TYPE_MSB 9
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#define GPIO_PIN_INT_TYPE_LSB 7
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#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)
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#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)
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#define GPIO_PAD_DRIVER_ENABLE 1
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#define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE)
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#define GPIO_PIN_PAD_DRIVER_MSB 2
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#define GPIO_PIN_PAD_DRIVER_LSB 2
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#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004
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#define GPIO_PIN_PAD_DRIVER_LSB 2
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#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004
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#define GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB)
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#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)
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#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)
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#define GPIO_AS_PIN_SOURCE 0
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#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE)
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#define GPIO_PIN_SOURCE_MSB 0
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#define GPIO_PIN_SOURCE_LSB 0
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#define GPIO_PIN_SOURCE_MASK 0x00000001
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#define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB)
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#define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK)
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#define GPIO_AS_PIN_SOURCE 0
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#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE)
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#define GPIO_PIN_SOURCE_MSB 0
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#define GPIO_PIN_SOURCE_LSB 0
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#define GPIO_PIN_SOURCE_MASK 0x00000001
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#define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB)
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#define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK)
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// }}
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// TIMER reg {{
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#define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)
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#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)
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#define RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask)
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/* Returns the current time according to the timer timer. */
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#define NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS)
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#define TIMER_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)
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#define TIMER_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)
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#define TIMER_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask)
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//Previous definitions of the above, kept for a while for possible compatibility, but deprecated
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#define RTC_REG_READ(addr) _Pragma("GCC warning \"'RTC_REG_READ' macro is deprecated\"") TIMER_REG_READ(addr)
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#define RTC_REG_WRITE(addr, val) _Pragma("GCC warning \"'RTC_REG_WRITE' macro is deprecated\"") TIMER_REG_WRITE(addr, val)
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#define RTC_CLR_REG_MASK(reg, mask) _Pragma("GCC warning \"'RTC_CLR_REG_MASK' macro is deprecated\"") TIMER_CLR_REG_MASK(reg, mask)
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//load initial_value to timer1
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#define FRC1_LOAD_ADDRESS 0x00
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#define FRC1_LOAD_ADDRESS 0x00
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//timer1's counter value(count from initial_value to 0)
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#define FRC1_COUNT_ADDRESS 0x04
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#define FRC1_CTRL_ADDRESS 0x08
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#define FRC1_CTRL_ADDRESS 0x08
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//clear timer1's interrupt when write this address
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#define FRC1_INT_ADDRESS 0x0c
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#define FRC1_INT_CLR_MASK 0x00000001
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#define FRC1_INT_ADDRESS 0x0c
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#define FRC1_INT_CLR_MASK 0x00000001
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//timer2's counter value(count from initial_value to 0)
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#define FRC2_COUNT_ADDRESS 0x24
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#define FRC2_COUNT_ADDRESS 0x24
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// }}
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/* Returns the current time according to the timer timer. */
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#define NOW() TIMER_REG_READ(FRC2_COUNT_ADDRESS)
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//RTC reg {{
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#define REG_RTC_BASE PERIPHS_RTC_BASEADDR
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@ -226,11 +235,11 @@
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#define FUNC_UART0_DTR 4
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#define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08)
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#define FUNC_MTCK 0
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#define FUNC_I2SI_BCK 1
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#define FUNC_HSPID_MOSI 2
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#define FUNC_GPIO13 3
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#define FUNC_UART0_CTS 4
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#define FUNC_MTCK 0
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#define FUNC_I2SI_BCK 1
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#define FUNC_HSPID_MOSI 2
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#define FUNC_GPIO13 3
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#define FUNC_UART0_CTS 4
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#define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C)
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#define FUNC_MTMS 0
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