mirror of
https://github.com/esp8266/Arduino.git
synced 2025-04-22 21:23:07 +03:00
Bufferless and Interruptless HardwareSerial
Let's use the onboard buffers :)
This commit is contained in:
Me No Dev
Ivan Grokhotkov
parent
aeb9597ccf
commit
e255f25cfd
@ -82,136 +82,50 @@ static const int UART_NO = -1;
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HardwareSerial Serial(UART0);
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HardwareSerial Serial1(UART1);
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// ####################################################################################################
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// ####################################################################################################
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// ####################################################################################################
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void uart_interrupt_handler(uart_t* uart);
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void uart_wait_for_tx_fifo(uart_t* uart, size_t size_needed);
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size_t uart_get_tx_fifo_room(uart_t* uart);
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void uart_wait_for_transmit(uart_t* uart);
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void uart_transmit_char(uart_t* uart, char c);
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void uart_transmit(uart_t* uart, const char* buf, size_t size);
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void uart_flush(uart_t* uart);
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void uart_interrupt_enable(uart_t* uart);
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void uart_interrupt_disable(uart_t* uart);
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void uart_arm_tx_interrupt(uart_t* uart);
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void uart_disarm_tx_interrupt(uart_t* uart);
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void uart_set_baudrate(uart_t* uart, int baud_rate);
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int uart_get_baudrate(uart_t* uart);
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uart_t* uart_start_init(int uart_nr, int baudrate, byte config, uint8_t use_tx);
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void uart_finish_init(uart_t* uart);
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void uart_uninit(uart_t* uart);
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void uart_swap(uart_t* uart, uint8_t use_tx);
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void uart_set_tx(uart_t* uart, uint8_t use_tx);
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void uart_set_pins(uart_t* uart, uint8_t tx, uint8_t rx);
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void uart_ignore_char(char c);
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void uart0_write_char(char c);
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void uart1_write_char(char c);
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void uart_set_debug(int uart_nr);
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int uart_get_debug();
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// ####################################################################################################
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// ####################################################################################################
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// ####################################################################################################
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// These function internals can be used from interrupt handlers to ensure they
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// are in instruction RAM, or anywhere that the uart_nr has been validated.
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#define UART_GET_TX_FIFO_ROOM(uart_nr) (UART_TX_FIFO_SIZE - ((USS(uart_nr) >> USTXC) & 0xff))
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#define UART_TRANSMIT_CHAR(uart_nr, c) do { USF(uart_nr) = (c); } while(0)
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#define UART_ARM_TX_INTERRUPT(uart_nr) do { USIE(uart_nr) |= (1 << UIFE); } while(0)
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#define UART_DISARM_TX_INTERRUPT(uart_nr) do { USIE(uart_nr) &= ~(1 << UIFE); } while(0)
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void ICACHE_RAM_ATTR uart_interrupt_handler(uart_t* uart) {
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// -------------- UART 0 --------------
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if(Serial.isRxEnabled()) {
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while(U0IS & (1 << UIFF)) {
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Serial._rx_complete_irq((char) (U0F & 0xff));
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U0IC = (1 << UIFF);
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}
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}
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if(Serial.isTxEnabled()) {
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if(U0IS & (1 << UIFE)) {
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U0IC = (1 << UIFE);
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Serial._tx_empty_irq();
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}
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}
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// -------------- UART 1 --------------
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// Note: only TX is supported on UART 1.
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if(Serial1.isTxEnabled()) {
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if(U1IS & (1 << UIFE)) {
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U1IC = (1 << UIFE);
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Serial1._tx_empty_irq();
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}
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}
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}
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// ####################################################################################################
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void uart_wait_for_tx_fifo(uart_t* uart, size_t size_needed) {
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if(uart == 0)
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void uart_write_char(uart_t* uart, char c) {
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if(uart == 0 || !uart->txEnabled)
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return;
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if(uart->txEnabled) {
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while(true) {
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size_t tx_count = (USS(uart->uart_nr) >> USTXC) & 0xff;
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if(tx_count <= (UART_TX_FIFO_SIZE - size_needed))
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break;
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}
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}
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while((USS(uart->uart_nr) >> USTXC) >= 0x7f);
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USF(uart->uart_nr) = c;
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}
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size_t uart_get_tx_fifo_room(uart_t* uart) {
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if(uart == 0)
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void uart_write(uart_t* uart, const char* buf, size_t size) {
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if(uart == 0 || !uart->txEnabled)
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return;
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while(size--)
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uart_write_char(uart, *buf++);
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}
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uint8_t uart_read_char(uart_t* uart){
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if(uart == 0 || !uart->rxEnabled)
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return 0;
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if(uart->txEnabled) {
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return UART_GET_TX_FIFO_ROOM(uart->uart_nr);
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return USF(uart->uart_nr) & 0xff;
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}
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uint8_t uart_rx_available(uart_t* uart){
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if(uart == 0 || !uart->rxEnabled)
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return 0;
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return (USS(uart->uart_nr) >> USRXC) & 0xff;
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}
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void uart_wait_for_transmit(uart_t* uart) {
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if(uart == 0)
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uint8_t uart_tx_free(uart_t* uart){
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if(uart == 0 || !uart->txEnabled)
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return 0;
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return UART_TX_FIFO_SIZE - ((USS(uart->uart_nr) >> USTXC) & 0xff);
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}
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void uart_wait_tx_empty(uart_t* uart){
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if(uart == 0 || !uart->txEnabled)
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return;
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if(uart->txEnabled) {
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uart_wait_for_tx_fifo(uart, UART_TX_FIFO_SIZE);
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}
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}
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void uart_transmit_char(uart_t* uart, char c) {
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if(uart == 0)
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return;
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if(uart->txEnabled) {
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UART_TRANSMIT_CHAR(uart->uart_nr, c);
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}
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}
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void uart_transmit(uart_t* uart, const char* buf, size_t size) {
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if(uart == 0)
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return;
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if(uart->txEnabled) {
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while(size) {
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size_t part_size = (size > UART_TX_FIFO_SIZE) ? UART_TX_FIFO_SIZE : size;
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size -= part_size;
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uart_wait_for_tx_fifo(uart, part_size);
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for(; part_size; --part_size, ++buf)
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USF(uart->uart_nr) = *buf;
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}
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}
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while(((USS(uart->uart_nr) >> USTXC) & 0xff) > 0) delay(0);
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}
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void uart_flush(uart_t* uart) {
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uint32_t tmp = 0x00000000;
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if(uart == 0)
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return;
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uint32_t tmp = 0x00000000;
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if(uart->rxEnabled) {
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tmp |= (1 << UCRXRST);
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}
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@ -224,45 +138,6 @@ void uart_flush(uart_t* uart) {
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USC0(uart->uart_nr) &= ~(tmp);
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}
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void uart_interrupt_enable(uart_t* uart) {
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if(uart == 0)
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return;
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USIC(uart->uart_nr) = 0x1ff;
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ETS_UART_INTR_ATTACH(&uart_interrupt_handler, uart); // uart parameter is not osed in irq function!
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if(uart->rxEnabled) {
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USIE(uart->uart_nr) |= (1 << UIFF);
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}
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ETS_UART_INTR_ENABLE();
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}
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void uart_interrupt_disable(uart_t* uart) {
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if(uart == 0)
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return;
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if(uart->rxEnabled) {
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USIE(uart->uart_nr) &= ~(1 << UIFF);
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}
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if(uart->txEnabled) {
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USIE(uart->uart_nr) &= ~(1 << UIFE);
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}
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//ETS_UART_INTR_DISABLE(); // never disable irq complete may its needed by the other Serial Interface!
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}
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void uart_arm_tx_interrupt(uart_t* uart) {
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if(uart == 0)
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return;
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if(uart->txEnabled) {
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UART_ARM_TX_INTERRUPT(uart->uart_nr);
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}
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}
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void uart_disarm_tx_interrupt(uart_t* uart) {
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if(uart == 0)
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return;
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if(uart->txEnabled) {
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UART_DISARM_TX_INTERRUPT(uart->uart_nr);
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}
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}
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void uart_set_baudrate(uart_t* uart, int baud_rate) {
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if(uart == 0)
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return;
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@ -276,7 +151,11 @@ int uart_get_baudrate(uart_t* uart) {
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return uart->baud_rate;
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}
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uart_t* uart_start_init(int uart_nr, int baudrate, byte config, byte mode, uint8_t use_tx) {
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// ####################################################################################################
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// ####################################################################################################
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// ####################################################################################################
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uart_t* uart_init(int uart_nr, int baudrate, byte config, byte mode, uint8_t use_tx) {
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uart_t* uart = (uart_t*) os_malloc(sizeof(uart_t));
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@ -317,33 +196,18 @@ uart_t* uart_start_init(int uart_nr, int baudrate, byte config, byte mode, uint8
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os_free(uart);
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return 0;
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}
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uart_set_baudrate(uart, baudrate);
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USC0(uart->uart_nr) = config;
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uart_flush(uart);
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USC1(uart->uart_nr) = 0;
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return uart;
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}
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void uart_finish_init(uart_t* uart) {
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uint32_t conf1 = 0x00000000;
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uart_flush(uart);
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uart_interrupt_enable(uart);
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if(uart->rxEnabled) {
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conf1 |= (0x01 << UCFFT);
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}
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if(uart->txEnabled) {
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conf1 |= (0x20 << UCFET);
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}
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USC1(uart->uart_nr) = conf1;
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}
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void uart_uninit(uart_t* uart) {
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if(uart == 0)
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return;
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uart_interrupt_disable(uart);
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switch(uart->rxPin) {
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case 3:
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@ -458,54 +322,15 @@ void uart_set_pins(uart_t* uart, uint8_t tx, uint8_t rx) {
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// ####################################################################################################
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// ####################################################################################################
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void uart_ignore_char(char c) {
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}
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void uart_ignore_char(char c) {}
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void uart0_write_char(char c) {
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if(&Serial != NULL && Serial.isTxEnabled()) {
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if(Serial.availableForWrite() > 0) {
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if(c == '\n') {
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Serial.write('\r');
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}
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Serial.write(c);
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return;
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}
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}
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// wait for the Hardware FIFO
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while(true) {
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if(((USS(0) >> USTXC) & 0xff) <= (UART_TX_FIFO_SIZE - 2)) {
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break;
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}
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}
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if(c == '\n') {
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USF(0) = '\r';
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}
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while(((USS(0) >> USTXC) & 0xff) >= 0x7F) delay(0);
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USF(0) = c;
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}
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void uart1_write_char(char c) {
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if(&Serial1 != NULL && Serial1.isTxEnabled()) {
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if(Serial1.availableForWrite() > 0) {
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if(c == '\n') {
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Serial1.write('\r');
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}
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Serial1.write(c);
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return;
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}
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}
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// wait for the Hardware FIFO
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while(true) {
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if(((USS(1) >> USTXC) & 0xff) <= (UART_TX_FIFO_SIZE - 2)) {
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break;
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}
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}
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if(c == '\n') {
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USF(1) = '\r';
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}
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while(((USS(1) >> USTXC) & 0xff) >= 0x7F) delay(0);
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USF(1) = c;
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}
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@ -534,62 +359,31 @@ int uart_get_debug() {
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return s_uart_debug_nr;
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}
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// ####################################################################################################
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// ####################################################################################################
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// ####################################################################################################
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HardwareSerial::HardwareSerial(int uart_nr) :
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_uart_nr(uart_nr), _uart(0), _tx_buffer(0), _rx_buffer(0) {
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}
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HardwareSerial::HardwareSerial(int uart_nr)
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: _uart_nr(uart_nr)
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, _uart(0)
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{}
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void HardwareSerial::begin(unsigned long baud, byte config, byte mode, uint8_t use_tx) {
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InterruptLock il;
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// disable debug for this interface
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if(uart_get_debug() == _uart_nr) {
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if(uart_get_debug() == _uart_nr)
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uart_set_debug(UART_NO);
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}
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if (_uart) {
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if (_uart)
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os_free(_uart);
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}
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_uart = uart_start_init(_uart_nr, baud, config, mode, use_tx);
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if(_uart == 0) {
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return;
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}
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// Disable the RX and/or TX functions if we fail to allocate circular buffers.
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// The user can confirm they are enabled with isRxEnabled() and isTxEnabled().
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if(_uart->rxEnabled && !_rx_buffer) {
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_rx_buffer = new cbuf(SERIAL_RX_BUFFER_SIZE);
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if(!_rx_buffer) {
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_uart->rxEnabled = false;
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}
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}
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if(_uart->txEnabled && !_tx_buffer) {
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_tx_buffer = new cbuf(SERIAL_TX_BUFFER_SIZE);
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if(!_tx_buffer) {
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_uart->txEnabled = false;
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}
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}
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delay(1);
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uart_finish_init(_uart);
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_uart = uart_init(_uart_nr, baud, config, mode, use_tx);
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}
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void HardwareSerial::end() {
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InterruptLock il;
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if(uart_get_debug() == _uart_nr) {
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if(uart_get_debug() == _uart_nr)
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uart_set_debug(UART_NO);
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}
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uart_uninit(_uart);
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delete _rx_buffer;
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delete _tx_buffer;
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_uart = 0;
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_rx_buffer = 0;
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_tx_buffer = 0;
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}
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void HardwareSerial::swap(uint8_t use_tx) {
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@ -627,138 +421,57 @@ void HardwareSerial::setDebugOutput(bool en) {
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}
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bool ICACHE_RAM_ATTR HardwareSerial::isTxEnabled(void) {
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if(_uart == 0)
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return false;
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return _uart->txEnabled;
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return _uart != 0 && _uart->txEnabled;
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}
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bool ICACHE_RAM_ATTR HardwareSerial::isRxEnabled(void) {
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if(_uart == 0)
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return false;
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return _uart->rxEnabled;
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return _uart != 0 && _uart->rxEnabled;
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}
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int HardwareSerial::available(void) {
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int result = 0;
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if (_uart != NULL && _uart->rxEnabled) {
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InterruptLock il;
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result = static_cast<int>(_rx_buffer->available());
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}
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if(_uart == 0 || !_uart->rxEnabled)
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return 0;
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int result = static_cast<int>(uart_rx_available(_uart));
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if (!result) {
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optimistic_yield(USD(_uart->uart_nr) / 128);
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}
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return result;
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}
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int HardwareSerial::peek(void) {
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if(_uart == 0)
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return -1;
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if(_uart->rxEnabled) {
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InterruptLock il;
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return _rx_buffer->peek();
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} else {
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return -1;
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}
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}
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int HardwareSerial::read(void) {
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if(_uart == 0)
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if(_uart == 0 || !_uart->rxEnabled)
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return -1;
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if(_uart->rxEnabled) {
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InterruptLock il;
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return _rx_buffer->read();
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} else {
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return -1;
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}
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return static_cast<int>(uart_read_char(_uart));
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}
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int HardwareSerial::availableForWrite(void) {
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if(_uart == 0)
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if(_uart == 0 || !_uart->txEnabled)
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return 0;
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if(_uart->txEnabled) {
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InterruptLock il;
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return static_cast<int>(_tx_buffer->room());
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} else {
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return 0;
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}
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return static_cast<int>(uart_tx_free(_uart));
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}
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void HardwareSerial::flush() {
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if(_uart == 0)
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return;
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if(!_uart->txEnabled)
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if(_uart == 0 || !_uart->txEnabled)
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return;
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const int uart_nr = _uart->uart_nr;
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while(true) {
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{
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InterruptLock il;
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if(_tx_buffer->available() == 0 &&
|
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UART_GET_TX_FIFO_ROOM(uart_nr) >= UART_TX_FIFO_SIZE) {
|
||||
break;
|
||||
} else if(il.savedInterruptLevel() > 0) {
|
||||
_tx_empty_irq();
|
||||
continue;
|
||||
}
|
||||
}
|
||||
yield();
|
||||
}
|
||||
uart_wait_tx_empty(_uart);
|
||||
}
|
||||
|
||||
size_t HardwareSerial::write(uint8_t c) {
|
||||
if(_uart == 0 || !_uart->txEnabled)
|
||||
return 0;
|
||||
|
||||
bool tx_now = false;
|
||||
const int uart_nr = _uart->uart_nr;
|
||||
while(true) {
|
||||
{
|
||||
InterruptLock il;
|
||||
if(_tx_buffer->empty()) {
|
||||
if(UART_GET_TX_FIFO_ROOM(uart_nr) > 0) {
|
||||
tx_now = true;
|
||||
} else {
|
||||
_tx_buffer->write(c);
|
||||
UART_ARM_TX_INTERRUPT(uart_nr);
|
||||
}
|
||||
break;
|
||||
} else if(_tx_buffer->write(c)) {
|
||||
break;
|
||||
} else if(il.savedInterruptLevel() > 0) {
|
||||
_tx_empty_irq();
|
||||
continue;
|
||||
}
|
||||
}
|
||||
yield();
|
||||
}
|
||||
if (tx_now) {
|
||||
UART_TRANSMIT_CHAR(uart_nr, c);
|
||||
}
|
||||
uart_write_char(_uart, c);
|
||||
return 1;
|
||||
}
|
||||
|
||||
HardwareSerial::operator bool() const {
|
||||
return _uart != 0;
|
||||
}
|
||||
|
||||
void ICACHE_RAM_ATTR HardwareSerial::_rx_complete_irq(char c) {
|
||||
_rx_buffer->write(c);
|
||||
}
|
||||
|
||||
void ICACHE_RAM_ATTR HardwareSerial::_tx_empty_irq(void) {
|
||||
const int uart_nr = _uart->uart_nr;
|
||||
size_t queued = _tx_buffer->available();
|
||||
if(!queued) {
|
||||
UART_DISARM_TX_INTERRUPT(uart_nr);
|
||||
return;
|
||||
}
|
||||
|
||||
size_t room = UART_GET_TX_FIFO_ROOM(uart_nr);
|
||||
int n = static_cast<int>((queued < room) ? queued : room);
|
||||
while(n--) {
|
||||
UART_TRANSMIT_CHAR(uart_nr, _tx_buffer->read());
|
||||
}
|
||||
}
|
||||
|
||||
@ -64,14 +64,13 @@
|
||||
#define SERIAL_RX_ONLY 1
|
||||
#define SERIAL_TX_ONLY 2
|
||||
|
||||
class cbuf;
|
||||
|
||||
struct uart_;
|
||||
typedef struct uart_ uart_t;
|
||||
|
||||
class HardwareSerial: public Stream {
|
||||
public:
|
||||
HardwareSerial(int uart_nr);
|
||||
virtual ~HardwareSerial(){}
|
||||
|
||||
void begin(unsigned long baud) {
|
||||
begin(baud, SERIAL_8N1, SERIAL_FULL, 1);
|
||||
@ -127,15 +126,10 @@ class HardwareSerial: public Stream {
|
||||
bool isRxEnabled(void);
|
||||
|
||||
protected:
|
||||
friend void uart_interrupt_handler(uart_t* uart);
|
||||
void _rx_complete_irq(char c);
|
||||
void _tx_empty_irq(void);
|
||||
|
||||
protected:
|
||||
int _uart_nr;
|
||||
uart_t* _uart;
|
||||
cbuf* _tx_buffer;
|
||||
cbuf* _rx_buffer;
|
||||
};
|
||||
|
||||
extern HardwareSerial Serial;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user