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Always arm the "TX FIFO Empty" interrupt after we write into _tx_buffer.

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This avoids a race where the interrupt handler detects an empty _tx_buffer
just before we write data into it.

Note that commit d6f62943d4b511e7d5fe6147096c8979890416f5 works around
this race when data is continually added to _tx_buffer in the hung state.
We revert that change here as the race should no longer occur.

Testing performed:
 - set UART_CONF1.txfifo_empty_thrhd=0x70 (which exacerbates the issue)
 - generate a ~240 byte burst of data, sent in back-to-back Serial1.write(, 4)
   calls, optionally followed by a Serial1.flush()
Test results:
 - before this change, observe occasional unsent data and hang in flush()
   (if used).
 - after this change, data is sent as expected.
This commit is contained in:
Christopher Pascoe 2015-12-06 21:03:05 -08:00
parent ee314f2cdc
commit cc0a8ead55
1 changed files with 1 additions and 4 deletions
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5
cores/esp8266/HardwareSerial.cpp
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@ -617,18 +617,15 @@ size_t HardwareSerial::write(uint8_t c) {
size_t room = uart_get_tx_fifo_room(_uart); size_t room = uart_get_tx_fifo_room(_uart);
if(room > 0 && _tx_buffer->empty()) { if(room > 0 && _tx_buffer->empty()) {
uart_transmit_char(_uart, c); uart_transmit_char(_uart, c);
if(room < 10) {
uart_arm_tx_interrupt(_uart);
}
return 1; return 1;
} }
while(_tx_buffer->room() == 0) { while(_tx_buffer->room() == 0) {
yield(); yield();
uart_arm_tx_interrupt(_uart);
} }
_tx_buffer->write(c); _tx_buffer->write(c);
uart_arm_tx_interrupt(_uart);
return 1; return 1;
} }