From 4e5c63d65248f06b704a51fe794b473f41ba247d Mon Sep 17 00:00:00 2001
From: Dave Rodgman <dave.rodgman@arm.com>
Date: Fri, 23 Jun 2023 15:17:37 +0100
Subject: [PATCH] Improve documentation in bn_mul.h

Co-authored-by: Tom Cosgrove <tom.cosgrove@arm.com>
Signed-off-by: Dave Rodgman <dave.rodgman@arm.com>
---
 library/bn_mul.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/library/bn_mul.h b/library/bn_mul.h
index 93dd4b6bb5..4ccd7b4b17 100644
--- a/library/bn_mul.h
+++ b/library/bn_mul.h
@@ -248,6 +248,8 @@
 
 #endif /* AMD64 */
 
+// The following assembly code assumes that a pointer will fit in a 64-bit register
+// (including ILP32 __aarch64__ ABIs such as on watchOS, hence the 2^32 - 1)
 #if defined(__aarch64__) && (UINTPTR_MAX == 0xfffffffful || UINTPTR_MAX == 0xfffffffffffffffful)
 
 #define MULADDC_X1_INIT             \