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	I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
		
			
				
	
	
		
			315 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			315 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /* Set a block of memory to some byte value.
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|    For UltraSPARC.
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|    Copyright (C) 1996-2021 Free Software Foundation, Inc.
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|    This file is part of the GNU C Library.
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|    Contributed by David S. Miller (davem@caip.rutgers.edu) and
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|                   Jakub Jelinek (jj@ultra.linux.cz).
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| 
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|    The GNU C Library is free software; you can redistribute it and/or
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|    modify it under the terms of the GNU Lesser General Public
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|    License as published by the Free Software Foundation; either
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|    version 2.1 of the License, or (at your option) any later version.
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| 
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|    The GNU C Library is distributed in the hope that it will be useful,
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|    but WITHOUT ANY WARRANTY; without even the implied warranty of
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|    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|    Lesser General Public License for more details.
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| 
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|    You should have received a copy of the GNU Lesser General Public
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|    License along with the GNU C Library; if not, see
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|    <https://www.gnu.org/licenses/>.  */
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| 
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| #include <sysdep.h>
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| #include <asm/asi.h>
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| #ifndef XCC
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| #define XCC xcc
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| #define USE_BPR
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| #endif
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| #define FPRS_FEF	4
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| 
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| #define SET_BLOCKS(base, offset, source)		\
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| 	stx		source, [base - offset - 0x18];	\
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| 	stx		source, [base - offset - 0x10];	\
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| 	stx		source, [base - offset - 0x08];	\
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| 	stx		source, [base - offset - 0x00];
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| 
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| 	/* Well, memset is a lot easier to get right than bcopy... */
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| 	.text
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| 	.align		32
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| ENTRY(memset)
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| 	andcc		%o1, 0xff, %o1
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| 	mov		%o0, %o5
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| 	be,a,pt		%icc, 50f
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| #ifndef USE_BPR
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| 	 srl		%o2, 0, %o1
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| #else
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| 	 mov		%o2, %o1
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| #endif
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| 	cmp		%o2, 7
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| #ifndef USE_BPR
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| 	srl		%o2, 0, %o2
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| #endif
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| 	bleu,pn		%XCC, 17f
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| 	 andcc		%o0, 3, %g5
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| 	be,pt		%xcc, 4f
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| 	 and		%o1, 0xff, %o1
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| 	cmp		%g5, 3
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| 	be,pn		%xcc, 2f
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| 	 stb		%o1, [%o0 + 0x00]
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| 	cmp		%g5, 2
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| 	be,pt		%xcc, 2f
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| 	 stb		%o1, [%o0 + 0x01]
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| 	stb		%o1, [%o0 + 0x02]
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| 2:	sub		%g5, 4, %g5
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| 	sub		%o0, %g5, %o0
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| 	add		%o2, %g5, %o2
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| 4:	sllx		%o1, 8, %g1
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| 	andcc		%o0, 4, %g0
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| 	or		%o1, %g1, %o1
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| 	sllx		%o1, 16, %g1
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| 	or		%o1, %g1, %o1
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| 	be,pt		%xcc, 2f
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| 	 sllx		%o1, 32, %g1
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| 	stw		%o1, [%o0]
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| 	sub		%o2, 4, %o2
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| 	add		%o0, 4, %o0
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| 2:	cmp		%o2, 128
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| 	or		%o1, %g1, %o1
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| 	blu,pn		%xcc, 9f
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| 	 andcc		%o0, 0x38, %g5
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| 	be,pn		%icc, 6f
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| 	 mov		64, %o4
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| 	andcc		%o0, 8, %g0
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| 	be,pn		%icc, 1f
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| 	 sub		%o4, %g5, %o4
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| 	stx		%o1, [%o0]
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| 	add		%o0, 8, %o0
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| 1:	andcc		%o4, 16, %g0
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| 	be,pn		%icc, 1f
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| 	 sub		%o2, %o4, %o2
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| 	stx		%o1, [%o0]
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| 	stx		%o1, [%o0 + 8]
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| 	add		%o0, 16, %o0
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| 1:	andcc		%o4, 32, %g0
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| 	be,pn		%icc, 7f
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| 	 andncc		%o2, 0x3f, %o3
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| 	stw		%o1, [%o0]
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| 	stw		%o1, [%o0 + 4]
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| 	stw		%o1, [%o0 + 8]
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| 	stw		%o1, [%o0 + 12]
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| 	stw		%o1, [%o0 + 16]
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| 	stw		%o1, [%o0 + 20]
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| 	stw		%o1, [%o0 + 24]
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| 	stw		%o1, [%o0 + 28]
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| 	add		%o0, 32, %o0
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| 7:	be,pn		%xcc, 9f
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| 	 nop
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| 	ldd		[%o0 - 8], %f0
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| 18:	wr		%g0, ASI_BLK_P, %asi
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| 	membar		#StoreStore | #LoadStore
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| 	andcc		%o3, 0xc0, %g5
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| 	and		%o2, 0x3f, %o2
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| 	fsrc2		%f0, %f2
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| 	fsrc2		%f0, %f4
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| 	andn		%o3, 0xff, %o3
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| 	fsrc2		%f0, %f6
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| 	cmp		%g5, 64
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| 	fsrc2		%f0, %f8
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| 	fsrc2		%f0, %f10
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| 	fsrc2		%f0, %f12
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| 	brz,pn		%g5, 10f
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| 	 fsrc2		%f0, %f14
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| 	be,pn		%icc, 2f
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| 	 stda		%f0, [%o0 + 0x00] %asi
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| 	cmp		%g5, 128
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| 	be,pn		%icc, 2f
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| 	 stda		%f0, [%o0 + 0x40] %asi
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| 	stda		%f0, [%o0 + 0x80] %asi
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| 2:	brz,pn		%o3, 12f
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| 	 add		%o0, %g5, %o0
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| 10:	stda		%f0, [%o0 + 0x00] %asi
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| 	stda		%f0, [%o0 + 0x40] %asi
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| 	stda		%f0, [%o0 + 0x80] %asi
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| 	stda		%f0, [%o0 + 0xc0] %asi
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| 11:	subcc		%o3, 256, %o3
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| 	bne,pt		%xcc, 10b
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| 	 add		%o0, 256, %o0
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| 12:	wr		%g0, FPRS_FEF, %fprs
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| 	membar		#StoreLoad | #StoreStore
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| 9:	andcc		%o2, 0x78, %g5
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| 	be,pn		%xcc, 13f
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| 	 andcc		%o2, 7, %o2
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| 14:	rd		%pc, %o4
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| 	srl		%g5, 1, %o3
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| 	sub		%o4, %o3, %o4
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| 	jmpl		%o4 + (13f - 14b), %g0
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| 	 add		%o0, %g5, %o0
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| 12:	SET_BLOCKS	(%o0, 0x68, %o1)
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| 	SET_BLOCKS	(%o0, 0x48, %o1)
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| 	SET_BLOCKS	(%o0, 0x28, %o1)
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| 	SET_BLOCKS	(%o0, 0x08, %o1)
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| 13:	be,pn		%xcc, 8f
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| 	 andcc		%o2, 4, %g0
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| 	be,pn		%xcc, 1f
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| 	 andcc		%o2, 2, %g0
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| 	stw		%o1, [%o0]
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| 	add		%o0, 4, %o0
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| 1:	be,pn		%xcc, 1f
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| 	 andcc		%o2, 1, %g0
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| 	sth		%o1, [%o0]
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| 	add		%o0, 2, %o0
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| 1:	bne,a,pn	%xcc, 8f
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| 	 stb		%o1, [%o0]
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| 8:	retl
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| 	 mov		%o5, %o0
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| 17:	brz,pn		%o2, 0f
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| 8:	 add		%o0, 1, %o0
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| 	subcc		%o2, 1, %o2
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| 	bne,pt		%xcc, 8b
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| 	 stb		%o1, [%o0 - 1]
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| 0:	retl
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| 	 mov		%o5, %o0
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| 
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| 6:	stx		%o1, [%o0]
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| 	andncc		%o2, 0x3f, %o3
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| 	be,pn		%xcc, 9b
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| 	 nop
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| 	ba,pt		%xcc, 18b
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| 	 ldd		[%o0], %f0
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| END(memset)
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| libc_hidden_builtin_def (memset)
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| 
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| #define ZERO_BLOCKS(base, offset, source)		\
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| 	stx		source, [base - offset - 0x38];	\
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| 	stx		source, [base - offset - 0x30];	\
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| 	stx		source, [base - offset - 0x28];	\
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| 	stx		source, [base - offset - 0x20];	\
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| 	stx		source, [base - offset - 0x18];	\
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| 	stx		source, [base - offset - 0x10];	\
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| 	stx		source, [base - offset - 0x08];	\
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| 	stx		source, [base - offset - 0x00];
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| 
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| 	.text
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| 	.align		32
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| ENTRY(__bzero)
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| #ifndef USE_BPR
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| 	srl		%o1, 0, %o1
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| #endif
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| 	mov		%o0, %o5
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| 50:	cmp		%o1, 7
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| 	bleu,pn		%xcc, 17f
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| 	 andcc		%o0, 3, %o2
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| 	be,a,pt		%xcc, 4f
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| 	 andcc		%o0, 4, %g0
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| 	cmp		%o2, 3
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| 	be,pn		%xcc, 2f
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| 	 stb		%g0, [%o0 + 0x00]
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| 	cmp		%o2, 2
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| 	be,pt		%xcc, 2f
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| 	 stb		%g0, [%o0 + 0x01]
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| 	stb		%g0, [%o0 + 0x02]
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| 2:	sub		%o2, 4, %o2
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| 	sub		%o0, %o2, %o0
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| 	add		%o1, %o2, %o1
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| 	andcc		%o0, 4, %g0
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| 4:	be,pt		%xcc, 2f
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| 	 cmp		%o1, 128
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| 	stw		%g0, [%o0]
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| 	sub		%o1, 4, %o1
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| 	add		%o0, 4, %o0
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| 2:	blu,pn		%xcc, 9f
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| 	 andcc		%o0, 0x38, %o2
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| 	be,pn		%icc, 6f
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| 	 mov		64, %o4
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| 	andcc		%o0, 8, %g0
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| 	be,pn		%icc, 1f
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| 	 sub		%o4, %o2, %o4
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| 	stx		%g0, [%o0]
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| 	add		%o0, 8, %o0
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| 1:	andcc		%o4, 16, %g0
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| 	be,pn		%icc, 1f
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| 	 sub		%o1, %o4, %o1
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| 	stx		%g0, [%o0]
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| 	stx		%g0, [%o0 + 8]
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| 	add		%o0, 16, %o0
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| 1:	andcc		%o4, 32, %g0
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| 	be,pn		%icc, 7f
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| 	 andncc		%o1, 0x3f, %o3
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| 	stx		%g0, [%o0]
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| 	stx		%g0, [%o0 + 8]
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| 	stx		%g0, [%o0 + 16]
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| 	stx		%g0, [%o0 + 24]
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| 	add		%o0, 32, %o0
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| 6:	andncc		%o1, 0x3f, %o3
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| 7:	be,pn		%xcc, 9f
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| 	 wr		%g0, ASI_BLK_P, %asi
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| 	membar		#StoreLoad | #StoreStore | #LoadStore
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| 	fzero		%f0
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| 	andcc		%o3, 0xc0, %o2
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| 	and		%o1, 0x3f, %o1
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| 	fzero		%f2
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| 	andn		%o3, 0xff, %o3
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| 	faddd		%f0, %f2, %f4
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| 	fmuld		%f0, %f2, %f6
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| 	cmp		%o2, 64
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| 	faddd		%f0, %f2, %f8
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| 	fmuld		%f0, %f2, %f10
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| 	faddd		%f0, %f2, %f12
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| 	brz,pn		%o2, 10f
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| 	 fmuld		%f0, %f2, %f14
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| 	be,pn		%icc, 2f
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| 	 stda		%f0, [%o0 + 0x00] %asi
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| 	cmp		%o2, 128
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| 	be,pn		%icc, 2f
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| 	 stda		%f0, [%o0 + 0x40] %asi
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| 	stda		%f0, [%o0 + 0x80] %asi
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| 2:	brz,pn		%o3, 12f
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| 	 add		%o0, %o2, %o0
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| 10:	stda		%f0, [%o0 + 0x00] %asi
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| 	stda		%f0, [%o0 + 0x40] %asi
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| 	stda		%f0, [%o0 + 0x80] %asi
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| 	stda		%f0, [%o0 + 0xc0] %asi
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| 11:	subcc		%o3, 256, %o3
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| 	bne,pt		%xcc, 10b
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| 	 add		%o0, 256, %o0
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| 12:	wr		%g0, FPRS_FEF, %fprs
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| 	membar		#StoreLoad | #StoreStore
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| 9:	andcc		%o1, 0xf8, %o2
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| 	be,pn		%xcc, 13f
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| 	 andcc		%o1, 7, %o1
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| 14:	rd		%pc, %o4
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| 	srl		%o2, 1, %o3
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| 	sub		%o4, %o3, %o4
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| 	jmpl		%o4 + (13f - 14b), %g0
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| 	 add		%o0, %o2, %o0
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| 12:	ZERO_BLOCKS	(%o0, 0xc8, %g0)
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| 	ZERO_BLOCKS	(%o0, 0x88, %g0)
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| 	ZERO_BLOCKS	(%o0, 0x48, %g0)
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| 	ZERO_BLOCKS	(%o0, 0x08, %g0)
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| 13:	be,pn		%xcc, 8f
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| 	 andcc		%o1, 4, %g0
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| 	be,pn		%xcc, 1f
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| 	 andcc		%o1, 2, %g0
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| 	stw		%g0, [%o0]
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| 	add		%o0, 4, %o0
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| 1:	be,pn		%xcc, 1f
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| 	 andcc		%o1, 1, %g0
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| 	sth		%g0, [%o0]
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| 	add		%o0, 2, %o0
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| 1:	bne,a,pn	%xcc, 8f
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| 	 stb		%g0, [%o0]
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| 8:	retl
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| 	 mov		%o5, %o0
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| 17:	be,pn		%xcc, 13b
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| 	 orcc		%o1, 0, %g0
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| 	be,pn		%xcc, 0f
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| 8:	 add		%o0, 1, %o0
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| 	subcc		%o1, 1, %o1
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| 	bne,pt		%xcc, 8b
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| 	 stb		%g0, [%o0 - 1]
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| 0:	retl
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| 	 mov		%o5, %o0
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| END(__bzero)
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| 
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| weak_alias (__bzero, bzero)
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