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and then by running 'make dist-prepare' to regenerate files built
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  # Omit irrelevant whitespace and comment-only changes,
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  git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
		
	
		
			
				
	
	
		
			115 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			115 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* FPU control word definitions.  PowerPC version.
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   Copyright (C) 1996-2019 Free Software Foundation, Inc.
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   This file is part of the GNU C Library.
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   The GNU C Library is free software; you can redistribute it and/or
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   modify it under the terms of the GNU Lesser General Public
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   License as published by the Free Software Foundation; either
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   version 2.1 of the License, or (at your option) any later version.
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   The GNU C Library is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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   Lesser General Public License for more details.
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   You should have received a copy of the GNU Lesser General Public
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   License along with the GNU C Library; if not, see
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   <https://www.gnu.org/licenses/>.  */
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#ifndef _FPU_CONTROL_H
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#define _FPU_CONTROL_H
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#if defined __SPE__ || (defined __NO_FPRS__ && !defined _SOFT_FLOAT)
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# error "SPE/e500 is no longer supported"
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#endif
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#ifdef _SOFT_FLOAT
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# define _FPU_RESERVED 0xffffffff
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# define _FPU_DEFAULT  0x00000000 /* Default value.  */
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typedef unsigned int fpu_control_t;
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# define _FPU_GETCW(cw) (cw) = 0
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# define _FPU_SETCW(cw) (void) (cw)
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extern fpu_control_t __fpu_control;
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#else /* PowerPC 6xx floating-point.  */
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/* rounding control */
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# define _FPU_RC_NEAREST 0x00   /* RECOMMENDED */
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# define _FPU_RC_DOWN    0x03
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# define _FPU_RC_UP      0x02
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# define _FPU_RC_ZERO    0x01
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# define _FPU_MASK_RC (_FPU_RC_NEAREST|_FPU_RC_DOWN|_FPU_RC_UP|_FPU_RC_ZERO)
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# define _FPU_MASK_NI  0x04 /* non-ieee mode */
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/* masking of interrupts */
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# define _FPU_MASK_ZM  0x10 /* zero divide */
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# define _FPU_MASK_OM  0x40 /* overflow */
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# define _FPU_MASK_UM  0x20 /* underflow */
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# define _FPU_MASK_XM  0x08 /* inexact */
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# define _FPU_MASK_IM  0x80 /* invalid operation */
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# define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
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/* The fdlibm code requires no interrupts for exceptions.  */
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# define _FPU_DEFAULT  0x00000000 /* Default value.  */
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/* IEEE:  same as above, but (some) exceptions;
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   we leave the 'inexact' exception off.
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 */
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# define _FPU_IEEE     0x000000f0
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/* Type of the control word.  */
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typedef unsigned int fpu_control_t;
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/* Macros for accessing the hardware control word.  */
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# define _FPU_GETCW(cw)						\
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  ({union { double __d; unsigned long long __ll; } __u;		\
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    __asm__ __volatile__("mffs %0" : "=f" (__u.__d));		\
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    (cw) = (fpu_control_t) __u.__ll;				\
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    (fpu_control_t) __u.__ll;					\
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  })
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# define _FPU_GET_RC_ISA300()						\
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  ({union { double __d; unsigned long long __ll; } __u;			\
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    __asm__ __volatile__(						\
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      ".machine push; .machine \"power9\"; mffsl %0; .machine pop" 	\
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      : "=f" (__u.__d));						\
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    (fpu_control_t) (__u.__ll & _FPU_MASK_RC);				\
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  })
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# ifdef _ARCH_PWR9
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#  define _FPU_GET_RC() _FPU_GET_RC_ISA300()
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# elif defined __BUILTIN_CPU_SUPPORTS__
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#  define _FPU_GET_RC()							\
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  ({fpu_control_t __rc;							\
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    __rc = __glibc_likely (__builtin_cpu_supports ("arch_3_00"))	\
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      ? _FPU_GET_RC_ISA300 ()						\
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      : _FPU_GETCW (__rc) & _FPU_MASK_RC;				\
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    __rc;								\
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  })
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# else
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#  define _FPU_GET_RC()						\
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  ({fpu_control_t __rc = _FPU_GETCW (__rc) & _FPU_MASK_RC;	\
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    __rc;							\
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  })
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# endif
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# define _FPU_SETCW(cw)						\
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  { union { double __d; unsigned long long __ll; } __u;		\
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    register double __fr;					\
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    __u.__ll = 0xfff80000LL << 32; /* This is a QNaN.  */	\
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    __u.__ll |= (cw) & 0xffffffffLL;				\
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    __fr = __u.__d;						\
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    __asm__ __volatile__("mtfsf 255,%0" : : "f" (__fr));	\
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  }
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/* Default control word set at startup.  */
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extern fpu_control_t __fpu_control;
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#endif /* PowerPC 6xx floating-point.  */
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#endif /* _FPU_CONTROL_H */
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