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54 lines
2.0 KiB
C
54 lines
2.0 KiB
C
/* Copyright (C) 2002,2003,2011 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Ulrich Drepper <drepper@redhat.com>, 2002.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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/* Default stack size. */
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#define ARCH_STACK_DEFAULT_SIZE (2 * 1024 * 1024)
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/* Required stack pointer alignment at beginning. SSE requires 16
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bytes. */
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#define STACK_ALIGN 16
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/* Minimal stack size after allocating thread descriptor and guard size. */
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#define MINIMAL_REST_STACK 2048
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/* Alignment requirement for TCB.
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Some processors such as Intel Atom pay a big penalty on every
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access using a segment override if that segment's base is not
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aligned to the size of a cache line. (See Intel 64 and IA-32
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Architectures Optimization Reference Manual, section 13.3.3.3,
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"Segment Base".) On such machines, a cache line is 64 bytes. */
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#define TCB_ALIGNMENT 64
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/* Location of current stack frame. */
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#define CURRENT_STACK_FRAME __builtin_frame_address (0)
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/* XXX Until we have a better place keep the definitions here. */
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/* While there is no such syscall. */
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#define __exit_thread_inline(val) \
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while (1) { \
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if (__builtin_constant_p (val) && (val) == 0) \
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asm volatile ("xorl %%ebx, %%ebx; int $0x80" :: "a" (__NR_exit)); \
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else \
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asm volatile ("movl %1, %%ebx; int $0x80" \
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:: "a" (__NR_exit), "r" (val)); \
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}
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