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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
129 lines
2.6 KiB
ArmAsm
129 lines
2.6 KiB
ArmAsm
/* MIPS __mpn_addmul_1 -- Multiply a limb vector with a single limb and
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add the product to a second limb vector.
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Copyright (C) 1995-2021 Free Software Foundation, Inc.
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This file is part of the GNU MP Library.
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The GNU MP Library is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation; either version 2.1 of the License, or (at your
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option) any later version.
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The GNU MP Library is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with the GNU MP Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* INPUT PARAMETERS
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res_ptr $4
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s1_ptr $5
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size $6
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s2_limb $7
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*/
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#ifdef __PIC__
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.option pic2
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#endif
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ENTRY (__mpn_addmul_1)
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.set noreorder
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#ifdef __PIC__
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.cpload t9
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#endif
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.set nomacro
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/* warm up phase 0 */
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lw $8,0($5)
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/* warm up phase 1 */
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addiu $5,$5,4
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#if __mips_isa_rev < 6
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multu $8,$7
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#else
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mulu $11,$8,$7
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muhu $12,$8,$7
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#endif
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addiu $6,$6,-1
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beq $6,$0,L(LC0)
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move $2,$0 /* zero cy2 */
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addiu $6,$6,-1
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beq $6,$0,L(LC1)
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lw $8,0($5) /* load new s1 limb as early as possible */
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L(Loop): lw $10,0($4)
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#if __mips_isa_rev < 6
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mflo $3
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mfhi $9
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#else
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move $3,$11
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move $9,$12
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#endif
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addiu $5,$5,4
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addu $3,$3,$2 /* add old carry limb to low product limb */
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#if __mips_isa_rev < 6
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multu $8,$7
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#else
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mulu $11,$8,$7
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muhu $12,$8,$7
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#endif
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lw $8,0($5) /* load new s1 limb as early as possible */
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addiu $6,$6,-1 /* decrement loop counter */
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sltu $2,$3,$2 /* carry from previous addition -> $2 */
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addu $3,$10,$3
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sltu $10,$3,$10
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addu $2,$2,$10
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sw $3,0($4)
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addiu $4,$4,4
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bne $6,$0,L(Loop) /* should be "bnel" */
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addu $2,$9,$2 /* add high product limb and carry from addition */
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/* cool down phase 1 */
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L(LC1): lw $10,0($4)
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#if __mips_isa_rev < 6
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mflo $3
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mfhi $9
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#else
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move $3,$11
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move $9,$12
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#endif
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addu $3,$3,$2
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sltu $2,$3,$2
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#if __mips_isa_rev < 6
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multu $8,$7
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#else
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mulu $11,$8,$7
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muhu $12,$8,$7
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#endif
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addu $3,$10,$3
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sltu $10,$3,$10
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addu $2,$2,$10
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sw $3,0($4)
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addiu $4,$4,4
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addu $2,$9,$2 /* add high product limb and carry from addition */
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/* cool down phase 0 */
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L(LC0): lw $10,0($4)
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#if __mips_isa_rev < 6
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mflo $3
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mfhi $9
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#else
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move $3,$11
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move $9,$12
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#endif
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addu $3,$3,$2
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sltu $2,$3,$2
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addu $3,$10,$3
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sltu $10,$3,$10
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addu $2,$2,$10
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sw $3,0($4)
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j $31
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addu $2,$9,$2 /* add high product limb and carry from addition */
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END (__mpn_addmul_1)
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