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glibc/sysdeps/unix/sysv/linux/s390/sysconf.c
Stefan Liebler 4f6dae2195 S390: Add new s390 platform z17.
The glibc-hwcaps subdirectories are extended by "z17".  Libraries are loaded if
the z17 facility bits are active:
- Miscellaneous-instruction-extensions facility 4
- Vector-enhancements-facility 3
- Vector-Packed-Decimal-Enhancement Facility 3
- CPU: Concurrent-Functions Facility

tst-glibc-hwcaps.c is extended in order to test z17 via new marker6.
In case of running on a z17 with a kernel not recognizing z17 yet,
AT_PLATFORM will be z900 but vector-bit in AT_HWCAP is set.  This situation
is now recognized and this testcase does not fail.

A fatal glibc error is dumped if glibc was build with architecture
level set for z17, but run on an older machine (See dl-hwcap-check.h).
Note, you might get an SIGILL before this check if you don't use:
configure --with-rtld-early-cflags=-march=<older-machine>

ld.so --list-diagnostics now also dumps information about s390.cpu_features.

Independent from z17, the s390x kernel won't introduce new HWCAP-Bits if there
is no special handling needed in kernel itself.  For z17, we don't have new
HWCAP flags, but have to check the facility bits retrieved by
stfle-instruction.

Instead of storing all the stfle-bits (currently four 64bit values) in the
cpu_features struct, we now only store those bits, which are needed within
glibc itself.  Note that we have this list twice, one with original values and
the other one which can be filtered with GLIBC_TUNABLES=glibc.cpu.hwcaps.
Those new fields are stored in so far reserved space in cpu_features struct.
Thus processes started in between the update of glibc package and we e.g. have
a new ld.so and an old libc.so, won't crash. The glibc internal ifunc-resolvers
would not select the best optimized variant.

The users of stfle-bits are also updated:
- parsing of GLIBC_TUNABLES=glibc.cpu.hwcaps
- glibc internal ifunc-resolvers
- __libc_ifunc_impl_list
- sysconf
2025-05-05 10:30:55 +02:00

217 lines
5.6 KiB
C

/* Get system parameters, e.g. cache information. S390/S390x version.
Copyright (C) 2015-2025 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library. If not, see
<https://www.gnu.org/licenses/>. */
#include <unistd.h>
#include <cpu-features.h>
#include <ldsodefs.h>
#include <sys/auxv.h>
static long int linux_sysconf (int name);
/* Possible arguments for get_cache_info.
The values are reflecting the level/attribute/type indications
of ecag-instruction (extract cpu attribute). */
#define CACHE_LEVEL_MAX 8
#define CACHE_ATTR_LINESIZE 1
#define CACHE_ATTR_SIZE 2
#define CACHE_ATTR_ASSOC 3
#define CACHE_TYPE_DATA 0
#define CACHE_TYPE_INSTRUCTION 1
static long
get_cache_info (int level, int attr, int type)
{
unsigned long int val;
unsigned int cmd;
unsigned long int arg;
/* Check arguments. */
if (level < 1 || level > CACHE_LEVEL_MAX
|| attr < CACHE_ATTR_LINESIZE || attr > CACHE_ATTR_ASSOC
|| type < CACHE_TYPE_DATA || type > CACHE_TYPE_INSTRUCTION)
return 0L;
const struct cpu_features *features = &GLRO(dl_s390_cpu_features);
/* Check if ecag-instruction is available.
ecag - extract CPU attribute (only in zarch; arch >= z10; in as 2.24) */
if (!(features->hwcap & HWCAP_S390_STFLE)
#if !defined __s390x__
|| !(features->hwcap & HWCAP_S390_ZARCH)
|| !(features->hwcap & HWCAP_S390_HIGH_GPRS)
#endif /* !__s390x__ */
)
{
/* stfle (or zarch, high-gprs on s390-32) is not available.
We are on an old machine. Return 256byte for LINESIZE for L1 d/i-cache,
otherwise 0. */
if (level == 1 && attr == CACHE_ATTR_LINESIZE)
return 256L;
else
return 0L;
}
if (!S390_IS_Z10 (features->stfle_orig))
{
/* We are at least on a z9 machine.
Return 256byte for LINESIZE for L1 d/i-cache,
otherwise 0. */
if (level == 1 && attr == CACHE_ATTR_LINESIZE)
return 256L;
else
return 0L;
}
/* Check cache topology, if cache is available at this level. */
arg = (CACHE_LEVEL_MAX - level) * 8;
__asm__ __volatile__ (".machine push\n\t"
".machine \"z10\"\n\t"
".machinemode \"zarch_nohighgprs\"\n\t"
"ecag %0,%%r0,0\n\t" /* returns 64bit unsigned integer. */
"srlg %0,%0,0(%1)\n\t" /* right align 8bit cache info field. */
".machine pop"
: "=&d" (val)
: "a" (arg)
);
val &= 0xCUL; /* Extract cache scope information from cache topology summary.
(bits 4-5 of 8bit-field; 00 means cache does not exist). */
if (val == 0)
return 0L;
/* Get cache information for level, attribute and type. */
cmd = (attr << 4) | ((level - 1) << 1) | type;
__asm__ __volatile__ (".machine push\n\t"
".machine \"z10\"\n\t"
".machinemode \"zarch_nohighgprs\"\n\t"
"ecag %0,%%r0,0(%1)\n\t"
".machine pop"
: "=d" (val)
: "a" (cmd)
);
return val;
}
long int
__sysconf (int name)
{
if (name >= _SC_LEVEL1_ICACHE_SIZE && name <= _SC_LEVEL4_CACHE_LINESIZE)
{
int level;
int attr;
int type;
switch (name)
{
case _SC_LEVEL1_ICACHE_SIZE:
level = 1;
attr = CACHE_ATTR_SIZE;
type = CACHE_TYPE_INSTRUCTION;
break;
case _SC_LEVEL1_ICACHE_ASSOC:
level = 1;
attr = CACHE_ATTR_ASSOC;
type = CACHE_TYPE_INSTRUCTION;
break;
case _SC_LEVEL1_ICACHE_LINESIZE:
level = 1;
attr = CACHE_ATTR_LINESIZE;
type = CACHE_TYPE_INSTRUCTION;
break;
case _SC_LEVEL1_DCACHE_SIZE:
level = 1;
attr = CACHE_ATTR_SIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL1_DCACHE_ASSOC:
level = 1;
attr = CACHE_ATTR_ASSOC;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL1_DCACHE_LINESIZE:
level = 1;
attr = CACHE_ATTR_LINESIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL2_CACHE_SIZE:
level = 2;
attr = CACHE_ATTR_SIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL2_CACHE_ASSOC:
level = 2;
attr = CACHE_ATTR_ASSOC;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL2_CACHE_LINESIZE:
level = 2;
attr = CACHE_ATTR_LINESIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL3_CACHE_SIZE:
level = 3;
attr = CACHE_ATTR_SIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL3_CACHE_ASSOC:
level = 3;
attr = CACHE_ATTR_ASSOC;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL3_CACHE_LINESIZE:
level = 3;
attr = CACHE_ATTR_LINESIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL4_CACHE_SIZE:
level = 4;
attr = CACHE_ATTR_SIZE;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL4_CACHE_ASSOC:
level = 4;
attr = CACHE_ATTR_ASSOC;
type = CACHE_TYPE_DATA;
break;
case _SC_LEVEL4_CACHE_LINESIZE:
level = 4;
attr = CACHE_ATTR_LINESIZE;
type = CACHE_TYPE_DATA;
break;
default:
level = 0;
attr = 0;
type = 0;
break;
}
return get_cache_info (level, attr, type);
}
return linux_sysconf (name);
}
/* Now the generic Linux version. */
#undef __sysconf
#define __sysconf static linux_sysconf
#include <sysdeps/unix/sysv/linux/sysconf.c>