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73a061bbe9
Rename argument to avoid symbol conflict. * sysdeps/unix/sysv/linux/powerpc/bits/fcntl.h [__USE_GNU] (O_DIRECT): New macro.
70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
/* FPU control word definitions. PowerPC version.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#ifndef _FPU_CONTROL_H
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#define _FPU_CONTROL_H
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/* rounding control */
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#define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */
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#define _FPU_RC_DOWN 0x03
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#define _FPU_RC_UP 0x02
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#define _FPU_RC_ZERO 0x01
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#define _FPU_MASK_NI 0x04 /* non-ieee mode */
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/* masking of interrupts */
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#define _FPU_MASK_ZM 0x10 /* zero divide */
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#define _FPU_MASK_OM 0x40 /* overflow */
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#define _FPU_MASK_UM 0x20 /* underflow */
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#define _FPU_MASK_XM 0x08 /* inexact */
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#define _FPU_MASK_IM 0x80 /* invalid operation */
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#define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
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/* The fdlibm code requires no interrupts for exceptions. */
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#define _FPU_DEFAULT 0x00000000 /* Default value. */
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/* IEEE: same as above, but (some) exceptions;
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we leave the 'inexact' exception off.
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*/
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#define _FPU_IEEE 0x000000f0
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/* Type of the control word. */
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typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
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/* Macros for accessing the hardware control word. */
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#define _FPU_GETCW(__cw) ( { \
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union { double d; fpu_control_t cw[2]; } \
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tmp __attribute__ ((__aligned__(8))); \
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__asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
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(__cw)=tmp.cw[1]; \
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tmp.cw[1]; } )
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#define _FPU_SETCW(__cw) { \
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union { double d; fpu_control_t cw[2]; } \
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tmp __attribute__ ((__aligned__(8))); \
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tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
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tmp.cw[1] = __cw; \
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__asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
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}
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/* Default control word set at startup. */
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extern fpu_control_t __fpu_control;
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#endif /* _FPU_CONTROL_H */
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