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GAS treats the R5900 as MIPS III, with some modifications. The MIPS III designation means that the GNU C Library will try to assemble the LL and SC instructions, even though they are not implemented in the R5900. GAS will therefore produce the following errors: Error: opcode not supported on this processor: r5900 (mips3) `ll $2,0($4)' Error: opcode not supported on this processor: r5900 (mips3) `sc $6,0($4)' The MIPS II ISA override as used here enables the kernel to trap and emulate the LL and SC instructions, as required. This change has been tested by compiling the GNU C Library 2.27 with a GCC 8.2.0 cross-compiler for mipsr5900el-unknown-linux-gnu under Gentoo. * sysdeps/mips/sys/tas.h (_test_and_set): Handle the R5900 CPU with the ISA override.
71 lines
1.9 KiB
C
71 lines
1.9 KiB
C
/* Copyright (C) 2000-2018 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Maciej W. Rozycki <macro@ds2.pg.gda.pl>, 2000.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _SYS_TAS_H
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#define _SYS_TAS_H 1
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#include <features.h>
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#include <sgidefs.h>
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__BEGIN_DECLS
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extern int _test_and_set (int *__p, int __v)
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__THROW __attribute__ ((__nomips16__));
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#ifdef __USE_EXTERN_INLINES
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# ifndef _EXTERN_INLINE
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# define _EXTERN_INLINE __extern_inline
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# endif
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_EXTERN_INLINE int __attribute__ ((__nomips16__))
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__NTH (_test_and_set (int *__p, int __v))
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{
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int __r, __t;
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/* The R5900 reports itself as MIPS III but it does not have LL/SC. */
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__asm__ __volatile__
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("/* Inline test and set */\n"
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".set push\n\t"
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#if _MIPS_SIM == _ABIO32 && (__mips < 2 || defined (_MIPS_ARCH_R5900))
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".set mips2\n\t"
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#endif
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"sync\n\t"
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"1:\n\t"
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"ll %0,%3\n\t"
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"move %1,%4\n\t"
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"beq %0,%4,2f\n\t"
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"sc %1,%2\n\t"
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"beqz %1,1b\n"
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"sync\n\t"
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".set pop\n\t"
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"2:\n\t"
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"/* End test and set */"
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: "=&r" (__r), "=&r" (__t), "=m" (*__p)
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: "m" (*__p), "r" (__v)
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: "memory");
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return __r;
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}
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#endif /* __USE_EXTERN_INLINES */
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__END_DECLS
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#endif /* sys/tas.h */
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