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69 lines
2.3 KiB
C
69 lines
2.3 KiB
C
/* FPU control word definitions. ARM VFP version.
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Copyright (C) 2004-2016 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _FPU_CONTROL_H
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#define _FPU_CONTROL_H
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#if !(defined(_LIBC) && !defined(_LIBC_TEST)) && defined(__SOFTFP__)
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#define _FPU_RESERVED 0xffffffff
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#define _FPU_DEFAULT 0x00000000
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typedef unsigned int fpu_control_t;
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#define _FPU_GETCW(cw) (cw) = 0
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#define _FPU_SETCW(cw) (void) (cw)
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extern fpu_control_t __fpu_control;
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#else
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/* masking of interrupts */
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#define _FPU_MASK_IM 0x00000100 /* invalid operation */
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#define _FPU_MASK_ZM 0x00000200 /* divide by zero */
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#define _FPU_MASK_OM 0x00000400 /* overflow */
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#define _FPU_MASK_UM 0x00000800 /* underflow */
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#define _FPU_MASK_PM 0x00001000 /* inexact */
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#define _FPU_MASK_NZCV 0xf0000000 /* NZCV flags */
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#define _FPU_MASK_RM 0x00c00000 /* rounding mode */
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#define _FPU_MASK_EXCEPT 0x00001f1f /* all exception flags */
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/* Some bits in the FPSCR are not yet defined. They must be preserved when
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modifying the contents. */
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#define _FPU_RESERVED 0x00086060
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#define _FPU_DEFAULT 0x00000000
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/* Default + exceptions enabled. */
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#define _FPU_IEEE (_FPU_DEFAULT | 0x00001f00)
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/* Type of the control word. */
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typedef unsigned int fpu_control_t;
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/* Macros for accessing the hardware control word. */
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/* This is fmrx %0, fpscr. */
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#define _FPU_GETCW(cw) \
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__asm__ __volatile__ ("mrc p10, 7, %0, cr1, cr0, 0" : "=r" (cw))
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/* This is fmxr fpscr, %0. */
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#define _FPU_SETCW(cw) \
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__asm__ __volatile__ ("mcr p10, 7, %0, cr1, cr0, 0" : : "r" (cw))
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/* Default control word set at startup. */
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extern fpu_control_t __fpu_control;
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#endif /* __SOFTFP__ */
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#endif /* _FPU_CONTROL_H */
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