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mirror of https://sourceware.org/git/glibc.git synced 2025-05-30 04:04:54 +03:00
Paul Eggert 5a82c74822 Prefer https to http for gnu.org and fsf.org URLs
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:

sed -ri '
  s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
  s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
  $(find $(git ls-files) -prune -type f \
      ! -name '*.po' \
      ! -name 'ChangeLog*' \
      ! -path COPYING ! -path COPYING.LIB \
      ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
      ! -path manual/texinfo.tex ! -path scripts/config.guess \
      ! -path scripts/config.sub ! -path scripts/install-sh \
      ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
      ! -path INSTALL ! -path  locale/programs/charmap-kw.h \
      ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
      ! '(' -name configure \
            -execdir test -f configure.ac -o -f configure.in ';' ')' \
      ! '(' -name preconfigure \
            -execdir test -f preconfigure.ac ';' ')' \
      -print)

and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:

  chmod a+x sysdeps/unix/sysv/linux/riscv/configure
  # Omit irrelevant whitespace and comment-only changes,
  # perhaps from a slightly-different Autoconf version.
  git checkout -f \
    sysdeps/csky/configure \
    sysdeps/hppa/configure \
    sysdeps/riscv/configure \
    sysdeps/unix/sysv/linux/csky/configure
  # Omit changes that caused a pre-commit check to fail like this:
  # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
  git checkout -f \
    sysdeps/powerpc/powerpc64/ppc-mcount.S \
    sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
  # Omit change that caused a pre-commit check to fail like this:
  # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
  git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
2019-09-07 02:43:31 -07:00

263 lines
5.7 KiB
C

/* Copyright (C) 2001-2019 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#ifndef _SYS_UCONTEXT_H
#define _SYS_UCONTEXT_H 1
#include <features.h>
#include <bits/types.h>
#include <bits/types/sigset_t.h>
#include <bits/types/stack_t.h>
#ifdef __USE_MISC
# define __ctx(fld) fld
#else
# define __ctx(fld) __ ## fld
#endif
#ifdef __x86_64__
/* Type for general register. */
__extension__ typedef long long int greg_t;
/* Number of general registers. */
#define __NGREG 23
#ifdef __USE_MISC
# define NGREG __NGREG
#endif
/* Container for all general registers. */
typedef greg_t gregset_t[__NGREG];
#ifdef __USE_GNU
/* Number of each register in the `gregset_t' array. */
enum
{
REG_R8 = 0,
# define REG_R8 REG_R8
REG_R9,
# define REG_R9 REG_R9
REG_R10,
# define REG_R10 REG_R10
REG_R11,
# define REG_R11 REG_R11
REG_R12,
# define REG_R12 REG_R12
REG_R13,
# define REG_R13 REG_R13
REG_R14,
# define REG_R14 REG_R14
REG_R15,
# define REG_R15 REG_R15
REG_RDI,
# define REG_RDI REG_RDI
REG_RSI,
# define REG_RSI REG_RSI
REG_RBP,
# define REG_RBP REG_RBP
REG_RBX,
# define REG_RBX REG_RBX
REG_RDX,
# define REG_RDX REG_RDX
REG_RAX,
# define REG_RAX REG_RAX
REG_RCX,
# define REG_RCX REG_RCX
REG_RSP,
# define REG_RSP REG_RSP
REG_RIP,
# define REG_RIP REG_RIP
REG_EFL,
# define REG_EFL REG_EFL
REG_CSGSFS, /* Actually short cs, gs, fs, __pad0. */
# define REG_CSGSFS REG_CSGSFS
REG_ERR,
# define REG_ERR REG_ERR
REG_TRAPNO,
# define REG_TRAPNO REG_TRAPNO
REG_OLDMASK,
# define REG_OLDMASK REG_OLDMASK
REG_CR2
# define REG_CR2 REG_CR2
};
#endif
struct _libc_fpxreg
{
unsigned short int __ctx(significand)[4];
unsigned short int __ctx(exponent);
unsigned short int __glibc_reserved1[3];
};
struct _libc_xmmreg
{
__uint32_t __ctx(element)[4];
};
struct _libc_fpstate
{
/* 64-bit FXSAVE format. */
__uint16_t __ctx(cwd);
__uint16_t __ctx(swd);
__uint16_t __ctx(ftw);
__uint16_t __ctx(fop);
__uint64_t __ctx(rip);
__uint64_t __ctx(rdp);
__uint32_t __ctx(mxcsr);
__uint32_t __ctx(mxcr_mask);
struct _libc_fpxreg _st[8];
struct _libc_xmmreg _xmm[16];
__uint32_t __glibc_reserved1[24];
};
/* Structure to describe FPU registers. */
typedef struct _libc_fpstate *fpregset_t;
/* Context to describe whole processor state. */
typedef struct
{
gregset_t __ctx(gregs);
/* Note that fpregs is a pointer. */
fpregset_t __ctx(fpregs);
__extension__ unsigned long long __reserved1 [8];
} mcontext_t;
/* Userlevel context. */
typedef struct ucontext_t
{
unsigned long int __ctx(uc_flags);
struct ucontext_t *uc_link;
stack_t uc_stack;
mcontext_t uc_mcontext;
sigset_t uc_sigmask;
struct _libc_fpstate __fpregs_mem;
__extension__ unsigned long long int __ssp[4];
} ucontext_t;
#else /* !__x86_64__ */
/* Type for general register. */
typedef int greg_t;
/* Number of general registers. */
#define __NGREG 19
#ifdef __USE_MISC
# define NGREG __NGREG
#endif
/* Container for all general registers. */
typedef greg_t gregset_t[__NGREG];
#ifdef __USE_GNU
/* Number of each register is the `gregset_t' array. */
enum
{
REG_GS = 0,
# define REG_GS REG_GS
REG_FS,
# define REG_FS REG_FS
REG_ES,
# define REG_ES REG_ES
REG_DS,
# define REG_DS REG_DS
REG_EDI,
# define REG_EDI REG_EDI
REG_ESI,
# define REG_ESI REG_ESI
REG_EBP,
# define REG_EBP REG_EBP
REG_ESP,
# define REG_ESP REG_ESP
REG_EBX,
# define REG_EBX REG_EBX
REG_EDX,
# define REG_EDX REG_EDX
REG_ECX,
# define REG_ECX REG_ECX
REG_EAX,
# define REG_EAX REG_EAX
REG_TRAPNO,
# define REG_TRAPNO REG_TRAPNO
REG_ERR,
# define REG_ERR REG_ERR
REG_EIP,
# define REG_EIP REG_EIP
REG_CS,
# define REG_CS REG_CS
REG_EFL,
# define REG_EFL REG_EFL
REG_UESP,
# define REG_UESP REG_UESP
REG_SS
# define REG_SS REG_SS
};
#endif
/* Definitions taken from the kernel headers. */
struct _libc_fpreg
{
unsigned short int __ctx(significand)[4];
unsigned short int __ctx(exponent);
};
struct _libc_fpstate
{
unsigned long int __ctx(cw);
unsigned long int __ctx(sw);
unsigned long int __ctx(tag);
unsigned long int __ctx(ipoff);
unsigned long int __ctx(cssel);
unsigned long int __ctx(dataoff);
unsigned long int __ctx(datasel);
struct _libc_fpreg _st[8];
unsigned long int __ctx(status);
};
/* Structure to describe FPU registers. */
typedef struct _libc_fpstate *fpregset_t;
/* Context to describe whole processor state. */
typedef struct
{
gregset_t __ctx(gregs);
/* Due to Linux's history we have to use a pointer here. The SysV/i386
ABI requires a struct with the values. */
fpregset_t __ctx(fpregs);
unsigned long int __ctx(oldmask);
unsigned long int __ctx(cr2);
} mcontext_t;
/* Userlevel context. */
typedef struct ucontext_t
{
unsigned long int __ctx(uc_flags);
struct ucontext_t *uc_link;
stack_t uc_stack;
mcontext_t uc_mcontext;
sigset_t uc_sigmask;
struct _libc_fpstate __fpregs_mem;
unsigned long int __ssp[4];
} ucontext_t;
#endif /* !__x86_64__ */
#undef __ctx
#endif /* sys/ucontext.h */