mirror of
https://sourceware.org/git/glibc.git
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5a82c74822
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
145 lines
3.7 KiB
C
145 lines
3.7 KiB
C
/* Copyright (C) 1998-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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/* System V/ARM ABI compliant context switching support. */
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#ifndef _SYS_UCONTEXT_H
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#define _SYS_UCONTEXT_H 1
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#include <features.h>
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#include <bits/types/sigset_t.h>
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#include <bits/types/stack_t.h>
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#ifdef __USE_MISC
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# define __ctx(fld) fld
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#else
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# define __ctx(fld) __ ## fld
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#endif
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#ifdef __USE_MISC
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typedef int greg_t;
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/* Number of general registers. */
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# define NGREG 18
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/* Container for all general registers. */
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typedef greg_t gregset_t[NGREG];
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/* Number of each register is the `gregset_t' array. */
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enum
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{
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REG_R0 = 0,
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# define REG_R0 REG_R0
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REG_R1 = 1,
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# define REG_R1 REG_R1
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REG_R2 = 2,
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# define REG_R2 REG_R2
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REG_R3 = 3,
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# define REG_R3 REG_R3
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REG_R4 = 4,
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# define REG_R4 REG_R4
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REG_R5 = 5,
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# define REG_R5 REG_R5
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REG_R6 = 6,
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# define REG_R6 REG_R6
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REG_R7 = 7,
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# define REG_R7 REG_R7
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REG_R8 = 8,
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# define REG_R8 REG_R8
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REG_R9 = 9,
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# define REG_R9 REG_R9
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REG_R10 = 10,
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# define REG_R10 REG_R10
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REG_R11 = 11,
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# define REG_R11 REG_R11
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REG_R12 = 12,
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# define REG_R12 REG_R12
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REG_R13 = 13,
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# define REG_R13 REG_R13
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REG_R14 = 14,
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# define REG_R14 REG_R14
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REG_R15 = 15
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# define REG_R15 REG_R15
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};
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struct _libc_fpstate
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{
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struct
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{
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unsigned int sign1:1;
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unsigned int unused:15;
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unsigned int sign2:1;
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unsigned int exponent:14;
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unsigned int j:1;
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unsigned int mantissa1:31;
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unsigned int mantissa0:32;
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} fpregs[8];
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unsigned int fpsr:32;
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unsigned int fpcr:32;
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unsigned char ftype[8];
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unsigned int init_flag;
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};
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/* Structure to describe FPU registers. */
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typedef struct _libc_fpstate fpregset_t;
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#endif
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/* Context to describe whole processor state. This only describes
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the core registers; coprocessor registers get saved elsewhere
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(e.g. in uc_regspace, or somewhere unspecified on the stack
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during non-RT signal handlers). */
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typedef struct
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{
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unsigned long int __ctx(trap_no);
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unsigned long int __ctx(error_code);
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unsigned long int __ctx(oldmask);
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unsigned long int __ctx(arm_r0);
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unsigned long int __ctx(arm_r1);
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unsigned long int __ctx(arm_r2);
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unsigned long int __ctx(arm_r3);
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unsigned long int __ctx(arm_r4);
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unsigned long int __ctx(arm_r5);
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unsigned long int __ctx(arm_r6);
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unsigned long int __ctx(arm_r7);
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unsigned long int __ctx(arm_r8);
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unsigned long int __ctx(arm_r9);
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unsigned long int __ctx(arm_r10);
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unsigned long int __ctx(arm_fp);
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unsigned long int __ctx(arm_ip);
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unsigned long int __ctx(arm_sp);
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unsigned long int __ctx(arm_lr);
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unsigned long int __ctx(arm_pc);
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unsigned long int __ctx(arm_cpsr);
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unsigned long int __ctx(fault_address);
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} mcontext_t;
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/* Userlevel context. */
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typedef struct ucontext_t
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{
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unsigned long __ctx(uc_flags);
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struct ucontext_t *uc_link;
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stack_t uc_stack;
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mcontext_t uc_mcontext;
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sigset_t uc_sigmask;
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unsigned long __ctx(uc_regspace)[128] __attribute__((__aligned__(8)));
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} ucontext_t;
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#undef __ctx
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#endif /* sys/ucontext.h */
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