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All ABIs save for sparcv9 and s390 defines it to __sync_synchronize, which can be mapped to __atomic_thread_fence (__ATOMIC_SEQ_CST). For Sparc, it uses a stricter #StoreStore|#LoadStore|#StoreLoad|#LoadLoad instead of the #StoreLoad generated by __sync_synchronize. For s390x, it defaults to a memory barrier where __sync_synchronize emits a 'bcr 15,0' (which the manual describes as pipeline synchronization). The barrier is used only in one place (pthread_mutex_setprioceiling), and using a stricter barrier for s390 is ok performance-wise. Co-authored-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com> Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>