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c2567b18fd
There is no need for __GI_XXX symbols, like __GI___strcpy_aligned since __strcpy_aligned is used directly. Signed-off-by: H.J. Lu <hjl.tools@gmail.com> Reviewed-by: Sam James <sam@gentoo.org>
212 lines
5.2 KiB
ArmAsm
212 lines
5.2 KiB
ArmAsm
/* Optimized strcpy stpcpy implementation using LoongArch LSX instructions.
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Copyright (C) 2023-2025 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sys/regdef.h>
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#include <sys/asm.h>
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#if IS_IN (libc) && !defined __loongarch_soft_float
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# ifndef STRCPY
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# define STRCPY __strcpy_lsx
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# endif
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LEAF(STRCPY, 6)
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pcalau12i t0, %pc_hi20(L(INDEX))
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andi a4, a1, 0xf
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vld vr1, t0, %pc_lo12(L(INDEX))
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move a2, a0
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beqz a4, L(load_start)
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xor t0, a1, a4
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vld vr0, t0, 0
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vreplgr2vr.b vr2, a4
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vadd.b vr2, vr2, vr1
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vshuf.b vr0, vr2, vr0, vr2
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vsetanyeqz.b fcc0, vr0
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bcnez fcc0, L(end)
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L(load_start):
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vld vr0, a1, 0
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li.d t1, 16
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andi a3, a2, 0xf
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vsetanyeqz.b fcc0, vr0
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sub.d t0, t1, a3
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bcnez fcc0, L(end)
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add.d a1, a1, t0
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vst vr0, a2, 0
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andi a3, a1, 0xf
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add.d a2, a2, t0
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bnez a3, L(unaligned)
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vld vr0, a1, 0
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vsetanyeqz.b fcc0, vr0
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bcnez fcc0, L(al_end)
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L(al_loop):
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vst vr0, a2, 0
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vld vr0, a1, 16
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addi.d a2, a2, 16
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addi.d a1, a1, 16
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vsetanyeqz.b fcc0, vr0
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bceqz fcc0, L(al_loop)
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L(al_end):
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vmsknz.b vr1, vr0
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movfr2gr.s t0, fa1
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cto.w t0, t0
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add.d a1, a1, t0
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vld vr0, a1, -15
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# ifdef USE_AS_STPCPY
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add.d a0, a2, t0
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vst vr0, a0, -15
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# else
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add.d a2, a2, t0
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vst vr0, a2, -15
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# endif
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jr ra
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L(end):
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vmsknz.b vr1, vr0
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movfr2gr.s t0, fa1
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cto.w t0, t0
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addi.d t0, t0, 1
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L(end_16):
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andi t1, t0, 16
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beqz t1, L(end_8)
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vst vr0, a2, 0
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# ifdef USE_AS_STPCPY
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addi.d a0, a2, 15
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# endif
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jr ra
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L(end_8):
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andi t2, t0, 8
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andi t3, t0, 4
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andi t4, t0, 2
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andi t5, t0, 1
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beqz t2, L(end_4)
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vstelm.d vr0, a2, 0, 0
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addi.d a2, a2, 8
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vbsrl.v vr0, vr0, 8
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L(end_4):
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beqz t3, L(end_2)
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vstelm.w vr0, a2, 0, 0
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addi.d a2, a2, 4
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vbsrl.v vr0, vr0, 4
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L(end_2):
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beqz t4, L(end_1)
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vstelm.h vr0, a2, 0, 0
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addi.d a2, a2, 2
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vbsrl.v vr0, vr0, 2
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L(end_1):
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beqz t5, L(out)
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vstelm.b vr0, a2, 0, 0
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addi.d a2, a2, 1
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L(out):
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# ifdef USE_AS_STPCPY
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addi.d a0, a2, -1
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# endif
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jr ra
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.align 4
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L(unaligned):
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bstrins.d a1, zero, 3, 0
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vld vr2, a1, 0
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vreplgr2vr.b vr3, a3
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vslt.b vr4, vr1, vr3
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vor.v vr0, vr2, vr4
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vsetanyeqz.b fcc0, vr0
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bcnez fcc0, L(un_first_end)
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vld vr0, a1, 16
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vadd.b vr3, vr3, vr1
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vshuf.b vr4, vr0, vr2, vr3
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vsetanyeqz.b fcc0, vr0
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bcnez fcc0, L(un_end)
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vor.v vr2, vr0, vr0
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addi.d a1, a1, 16
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L(un_loop):
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vld vr0, a1, 16
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vst vr4, a2, 0
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addi.d a2, a2, 16
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vshuf.b vr4, vr0, vr2, vr3
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vsetanyeqz.b fcc0, vr0
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bcnez fcc0, L(un_end)
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vld vr2, a1, 32
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vst vr4, a2, 0
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addi.d a1, a1, 32
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addi.d a2, a2, 16
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vshuf.b vr4, vr2, vr0, vr3
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vsetanyeqz.b fcc0, vr2
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bceqz fcc0, L(un_loop)
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vor.v vr0, vr2, vr2
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addi.d a1, a1, -16
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L(un_end):
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vsetanyeqz.b fcc0, vr4
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bcnez fcc0, 1f
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vst vr4, a2, 0
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1:
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vmsknz.b vr1, vr0
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movfr2gr.s t0, fa1
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cto.w t0, t0
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add.d a1, a1, t0
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vld vr0, a1, 1
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add.d a2, a2, t0
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sub.d a2, a2, a3
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vst vr0, a2, 1
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# ifdef USE_AS_STPCPY
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addi.d a0, a2, 16
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# endif
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jr ra
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L(un_first_end):
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addi.d a2, a2, -16
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addi.d a1, a1, -16
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b 1b
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END(STRCPY)
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.section .rodata.cst16,"M",@progbits,16
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.align 4
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L(INDEX):
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.dword 0x0706050403020100
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.dword 0x0f0e0d0c0b0a0908
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#endif
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