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* sysdeps/mips/pspinlock.c (__pthread_spin_lock): Implement for
R3K. * sysdeps/mips/pt-machine.h (testandset): Likewise. 2000-07-12 Maciej W. Rozycki <macro@ds2.pg.gda.pl> * sysdeps/mips/pspinlock.c (__pthread_spin_lock): Implement for R3K. * sysdeps/mips/pt-machine.h (testandset): Likewise.
This commit is contained in:
@@ -1,3 +1,9 @@
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2000-07-12 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
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* sysdeps/mips/pspinlock.c (__pthread_spin_lock): Implement for
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R3K.
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* sysdeps/mips/pt-machine.h (testandset): Likewise.
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2000-07-26 Andreas Jaeger <aj@suse.de>
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2000-07-26 Andreas Jaeger <aj@suse.de>
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* pthread.c: Initialize p_sem_avail.
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* pthread.c: Initialize p_sem_avail.
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@@ -19,8 +19,12 @@
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#include <errno.h>
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#include <errno.h>
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#include <pthread.h>
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#include <pthread.h>
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#include <sgidefs.h>
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#include <sys/tas.h>
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#if (_MIPS_ISA >= _MIPS_ISA_MIPS2)
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/* This implementation is similar to the one used in the Linux kernel. */
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/* This implementation is similar to the one used in the Linux kernel. */
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int
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int
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__pthread_spin_lock (pthread_spinlock_t *lock)
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__pthread_spin_lock (pthread_spinlock_t *lock)
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@@ -28,22 +32,34 @@ __pthread_spin_lock (pthread_spinlock_t *lock)
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unsigned int tmp;
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unsigned int tmp;
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asm volatile
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asm volatile
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(".set\tnoreorder\t\t\t# spin_lock\n"
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("\t\t\t# spin_lock\n\t"
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".set\tpush\n"
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"1:\n\t"
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".set\tmips2\n"
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"ll %1,%2\n\t"
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"1:\tll\t%1, %2\n\t"
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".set push\n\t"
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"bnez\t%1, 1b\n\t"
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".set noreorder\n\t"
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" li\t%1, 1\n\t"
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"bnez %1,1b\n\t"
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"sc\t%1, %0\n\t"
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" li %1,1\n\t"
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"beqz\t%1, 1b\n\t"
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".set pop\n\t"
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".set\tpop\n"
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"sc %1,%0\n\t"
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".set\treorder"
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"beqz %1,1b"
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: "=o" (*lock), "=&r" (tmp)
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: "=m" (*lock), "=&r" (tmp)
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: "o" (*lock)
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: "m" (*lock)
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: "memory");
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: "memory");
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return 0;
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return 0;
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}
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}
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#else /* !(_MIPS_ISA >= _MIPS_ISA_MIPS2) */
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int
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__pthread_spin_lock (pthread_spinlock_t *lock)
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{
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while (_test_and_set (lock, 1));
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return 0;
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}
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#endif /* !(_MIPS_ISA >= _MIPS_ISA_MIPS2) */
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weak_alias (__pthread_spin_lock, pthread_spin_lock)
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weak_alias (__pthread_spin_lock, pthread_spin_lock)
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@@ -60,11 +76,10 @@ int
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__pthread_spin_unlock (pthread_spinlock_t *lock)
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__pthread_spin_unlock (pthread_spinlock_t *lock)
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{
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{
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asm volatile
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asm volatile
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(".set\tnoreorder\t\t\t# spin_unlock\n\t"
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("\t\t\t# spin_unlock\n\t"
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"sw\t$0, %0\n\t"
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"sw $0,%0"
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".set\treorder"
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: "=m" (*lock)
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: "=o" (*lock)
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:
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: "o" (*lock)
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: "memory");
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: "memory");
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return 0;
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return 0;
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}
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}
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@@ -18,13 +18,10 @@
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You should have received a copy of the GNU Library General Public
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If
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License along with the GNU C Library; see the file COPYING.LIB. If
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not, write to the Free Software Foundation, Inc.,
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not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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TODO: This version makes use of MIPS ISA 2 features. It won't
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#include <sgidefs.h>
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work on ISA 1. These machines will have to take the overhead of
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#include <sys/tas.h>
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a sysmips(MIPS_ATOMIC_SET, ...) syscall which isn't implemented
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yet correctly. There is however a better solution for R3000
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uniprocessor machines possible. */
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#ifndef PT_EI
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#ifndef PT_EI
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# define PT_EI extern inline
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# define PT_EI extern inline
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@@ -35,30 +32,43 @@
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/* Spinlock implementation; required. */
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/* Spinlock implementation; required. */
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#if (_MIPS_ISA >= _MIPS_ISA_MIPS2)
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PT_EI long int
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PT_EI long int
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testandset (int *spinlock)
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testandset (int *spinlock)
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{
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{
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long int ret, temp;
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long int ret, temp;
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__asm__ __volatile__(
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__asm__ __volatile__
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"# Inline spinlock test & set\n\t"
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("/* Inline spinlock test & set */\n\t"
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".set\tmips2\n"
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"1:\n\t"
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"1:\tll\t%0,%3\n\t"
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"ll %0,%3\n\t"
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"bnez\t%0,2f\n\t"
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".set push\n\t"
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".set\tnoreorder\n\t"
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".set noreorder\n\t"
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"li\t%1,1\n\t"
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"bnez %0,2f\n\t"
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".set\treorder\n\t"
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" li %1,1\n\t"
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"sc\t%1,%2\n\t"
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".set pop\n\t"
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"beqz\t%1,1b\n"
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"sc %1,%2\n\t"
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"2:\t.set\tmips0\n\t"
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"beqz %1,1b\n"
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"/* End spinlock test & set */"
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"2:\n\t"
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: "=&r"(ret), "=&r" (temp), "=m"(*spinlock)
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"/* End spinlock test & set */"
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: "m"(*spinlock)
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: "=&r" (ret), "=&r" (temp), "=m" (*spinlock)
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: "memory");
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: "m" (*spinlock)
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: "memory");
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return ret;
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return ret;
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}
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}
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#else /* !(_MIPS_ISA >= _MIPS_ISA_MIPS2) */
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PT_EI long int
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testandset (int *spinlock)
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{
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return _test_and_set (spinlock, 1);
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}
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#endif /* !(_MIPS_ISA >= _MIPS_ISA_MIPS2) */
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/* Get some notion of the current stack. Need not be exactly the top
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/* Get some notion of the current stack. Need not be exactly the top
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of the stack, just something somewhere in the current frame. */
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of the stack, just something somewhere in the current frame. */
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@@ -68,27 +78,32 @@ register char * stack_pointer __asm__ ("$29");
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/* Compare-and-swap for semaphores. */
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/* Compare-and-swap for semaphores. */
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#if (_MIPS_ISA >= _MIPS_ISA_MIPS2)
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#define HAS_COMPARE_AND_SWAP
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#define HAS_COMPARE_AND_SWAP
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PT_EI int
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PT_EI int
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__compare_and_swap (long int *p, long int oldval, long int newval)
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__compare_and_swap (long int *p, long int oldval, long int newval)
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{
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{
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long ret;
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long int ret;
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__asm__ __volatile__ (
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__asm__ __volatile__
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"/* Inline compare & swap */\n\t"
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("/* Inline compare & swap */\n\t"
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".set\tmips2\n"
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"1:\n\t"
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"1:\tll\t%0,%4\n\t"
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"ll %0,%4\n\t"
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".set\tnoreorder\n\t"
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".set push\n"
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"bne\t%0,%2,2f\n\t"
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".set noreorder\n\t"
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"move\t%0,%3\n\t"
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"bne %0,%2,2f\n\t"
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".set\treorder\n\t"
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" move %0,%3\n\t"
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"sc\t%0,%1\n\t"
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".set pop\n\t"
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"beqz\t%0,1b\n"
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"sc %0,%1\n\t"
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"2:\t.set\tmips0\n\t"
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"beqz %0,1b\n"
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"/* End compare & swap */"
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"2:\n\t"
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: "=&r"(ret), "=m"(*p)
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"/* End compare & swap */"
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: "r"(oldval), "r"(newval), "m"(*p)
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: "=&r" (ret), "=m" (*p)
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: "memory");
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: "r" (oldval), "r" (newval), "m" (*p)
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: "memory");
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return ret;
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return ret;
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}
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}
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#endif /* (_MIPS_ISA >= _MIPS_ISA_MIPS2) */
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