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x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717]

GCC 11 supports -march=x86-64-v[234] to enable x86 micro-architecture ISA
levels:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97250

and -mneeded to emit GNU_PROPERTY_X86_ISA_1_NEEDED property with
GNU_PROPERTY_X86_ISA_1_V[234] marker:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13

Binutils support for GNU_PROPERTY_X86_ISA_1_V[234] marker were added by

commit b0ab06937385e0ae25cebf1991787d64f439bf12
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Oct 30 06:49:57 2020 -0700

    x86: Support GNU_PROPERTY_X86_ISA_1_BASELINE marker

and

commit 32930e4edbc06bc6f10c435dbcc63131715df678
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Oct 9 05:05:57 2020 -0700

    x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker

GNU_PROPERTY_X86_ISA_1_NEEDED property in x86 ELF binaries indicate the
micro-architecture ISA level required to execute the binary.  The marker
must be added by programmers explicitly in one of 3 ways:

1. Pass -mneeded to GCC.
2. Add the marker in the linker inputs as this patch does.
3. Pass -z x86-64-v[234] to the linker.

Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
marker support to ld.so if binutils 2.32 or newer is used to build glibc:

1. Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
markers to elf.h.
2. Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
marker to abi-note.o based on the ISA level used to compile abi-note.o,
assuming that the same ISA level is used to compile the whole glibc.
3. Add isa_1 to cpu_features to record the supported x86 ISA level.
4. Rename _dl_process_cet_property_note to _dl_process_property_note and
add GNU_PROPERTY_X86_ISA_1_V[234] marker detection.
5. Update _rtld_main_check and _dl_open_check to check loaded objects
with the incompatible ISA level.
6. Add a testcase to verify that dlopen an x86-64-v4 shared object fails
on lesser platforms.
7. Use <get-isa-level.h> in dl-hwcaps-subdirs.c and tst-glibc-hwcaps.c.

Tested under i686, x32 and x86-64 modes on x86-64-v2, x86-64-v3 and
x86-64-v4 machines.

Marked elf/tst-isa-level-1 with x86-64-v4, ran it on x86-64-v3 machine
and got:

[hjl@gnu-cfl-2 build-x86_64-linux]$ ./elf/tst-isa-level-1
./elf/tst-isa-level-1: CPU ISA level is lower than required
[hjl@gnu-cfl-2 build-x86_64-linux]$
This commit is contained in:
H.J. Lu
2020-10-09 06:06:56 -07:00
parent 9e97f239ea
commit ecce11aa07
21 changed files with 642 additions and 111 deletions

View File

@ -19,14 +19,54 @@
#ifndef _DL_PROP_H
#define _DL_PROP_H
#include <libintl.h>
extern void _dl_cet_check (struct link_map *, const char *)
attribute_hidden;
extern void _dl_cet_open_check (struct link_map *)
attribute_hidden;
static void
dl_isa_level_check (struct link_map *m, const char *program)
{
const struct cpu_features *cpu_features = __get_cpu_features ();
unsigned int i;
struct link_map *l;
i = m->l_searchlist.r_nlist;
while (i-- > 0)
{
/* Check each shared object to see if ISA level is compatible. */
l = m->l_initfini[i];
/* Skip ISA level check if functions have been executed. */
if (l->l_init_called)
continue;
#ifdef SHARED
/* Skip ISA level check for ld.so since ld.so won't run if its ISA
level is higher than CPU. */
if (l == &GL(dl_rtld_map) || l->l_real == &GL(dl_rtld_map))
continue;
#endif
if ((l->l_x86_isa_1_needed & cpu_features->isa_1)
!= l->l_x86_isa_1_needed)
{
if (program)
_dl_fatal_printf ("%s: CPU ISA level is lower than required\n",
*l->l_name != '\0' ? l->l_name : program);
else
_dl_signal_error (0, l->l_name, "dlopen",
N_("CPU ISA level is lower than required"));
}
}
}
static inline void __attribute__ ((always_inline))
_rtld_main_check (struct link_map *m, const char *program)
{
dl_isa_level_check (m, program);
#if CET_ENABLED
_dl_cet_check (m, program);
#endif
@ -35,20 +75,18 @@ _rtld_main_check (struct link_map *m, const char *program)
static inline void __attribute__ ((always_inline))
_dl_open_check (struct link_map *m)
{
dl_isa_level_check (m, NULL);
#if CET_ENABLED
_dl_cet_open_check (m);
#endif
}
static inline void __attribute__ ((unused))
_dl_process_cet_property_note (struct link_map *l,
const ElfW(Nhdr) *note,
const ElfW(Addr) size,
const ElfW(Addr) align)
_dl_process_property_note (struct link_map *l, const ElfW(Nhdr) *note,
const ElfW(Addr) size, const ElfW(Addr) align)
{
#if CET_ENABLED
/* Skip if we have seen a NT_GNU_PROPERTY_TYPE_0 note before. */
if (l->l_cet != lc_unknown)
if (l->l_property != lc_property_unknown)
return;
/* The NT_GNU_PROPERTY_TYPE_0 note must be aliged to 4 bytes in
@ -59,7 +97,8 @@ _dl_process_cet_property_note (struct link_map *l,
const ElfW(Addr) start = (ElfW(Addr)) note;
unsigned int feature_1 = 0;
unsigned int feature_1_and = 0;
unsigned int isa_1_needed = 0;
unsigned int last_type = 0;
while ((ElfW(Addr)) (note + 1) - start < size)
@ -71,11 +110,11 @@ _dl_process_cet_property_note (struct link_map *l,
{
/* Stop if we see more than one GNU property note which may
be generated by the older linker. */
if (l->l_cet != lc_unknown)
if (l->l_property != lc_property_unknown)
return;
/* Check CET status now. */
l->l_cet = lc_none;
/* Check CET status and ISA levels now. */
l->l_property = lc_property_none;
/* Check for invalid property. */
if (note->n_descsz < 8
@ -101,26 +140,37 @@ _dl_process_cet_property_note (struct link_map *l,
last_type = type;
if (type == GNU_PROPERTY_X86_FEATURE_1_AND)
if (type == GNU_PROPERTY_X86_FEATURE_1_AND
|| type == GNU_PROPERTY_X86_ISA_1_NEEDED)
{
/* The size of GNU_PROPERTY_X86_FEATURE_1_AND is 4
bytes. When seeing GNU_PROPERTY_X86_FEATURE_1_AND,
we stop the search regardless if its size is correct
or not. There is no point to continue if this note
is ill-formed. */
/* The sizes of types which we are searching for are
4 bytes. There is no point to continue if this
note is ill-formed. */
if (datasz != 4)
return;
feature_1 = *(unsigned int *) ptr;
/* NB: Stop the scan only after seeing all types which
we are searching for. */
_Static_assert ((GNU_PROPERTY_X86_ISA_1_NEEDED >
GNU_PROPERTY_X86_FEATURE_1_AND),
"GNU_PROPERTY_X86_ISA_1_NEEDED > "
"GNU_PROPERTY_X86_FEATURE_1_AND");
if (type == GNU_PROPERTY_X86_FEATURE_1_AND)
feature_1_and = *(unsigned int *) ptr;
else
{
isa_1_needed = *(unsigned int *) ptr;
/* Keep searching for the next GNU property note
generated by the older linker. */
break;
/* Keep searching for the next GNU property note
generated by the older linker. */
break;
}
}
else if (type > GNU_PROPERTY_X86_FEATURE_1_AND)
else if (type > GNU_PROPERTY_X86_ISA_1_NEEDED)
{
/* Stop since property type is in ascending order. */
return;
/* Stop the scan since property type is in ascending
order. */
break;
}
/* Check the next property item. */
@ -137,18 +187,21 @@ _dl_process_cet_property_note (struct link_map *l,
}
/* We get here only if there is one or no GNU property note. */
if ((feature_1 & GNU_PROPERTY_X86_FEATURE_1_IBT))
l->l_cet |= lc_ibt;
if ((feature_1 & GNU_PROPERTY_X86_FEATURE_1_SHSTK))
l->l_cet |= lc_shstk;
#endif
if (isa_1_needed != 0 || feature_1_and != 0)
{
l->l_property = lc_property_valid;
l->l_x86_isa_1_needed = isa_1_needed;
l->l_x86_feature_1_and = feature_1_and;
}
else
l->l_property = lc_property_none;
}
static inline void __attribute__ ((unused))
_dl_process_pt_note (struct link_map *l, int fd, const ElfW(Phdr) *ph)
{
const ElfW(Nhdr) *note = (const void *) (ph->p_vaddr + l->l_addr);
_dl_process_cet_property_note (l, note, ph->p_memsz, ph->p_align);
_dl_process_property_note (l, note, ph->p_memsz, ph->p_align);
}
static inline int __attribute__ ((always_inline))