mirror of
https://sourceware.org/git/glibc.git
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* sysdeps/sh/bits/atomic.h: Moved to ...
* sysdeps/unix/sysv/linux/sh/bits/atomic.h: ... here. Add comments.
(__arch_compare_and_exchange_val_*_acq): Add parens around macro
arguments.
(atomic_bit_set, atomic_bit_test_set): Likewise.
(atomic_exchange_and_add): Likewise. Don't evaluate VALUE argument
twice.
(atomic_add, atomic_add_negative, atomic_add_zero): Likewise.
This commit is contained in:
Roland McGrath
419
sysdeps/unix/sysv/linux/sh/bits/atomic.h
Normal file
419
sysdeps/unix/sysv/linux/sh/bits/atomic.h
Normal file
@@ -0,0 +1,419 @@
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/* Atomic operations used inside libc. Linux/SH version.
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Copyright (C) 2003 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
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Lesser General Public License for more details.
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|
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <stdint.h>
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int16_t atomic16_t;
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typedef uint16_t uatomic16_t;
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typedef int_fast16_t atomic_fast16_t;
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typedef uint_fast16_t uatomic_fast16_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef int64_t atomic64_t;
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typedef uint64_t uatomic64_t;
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typedef int_fast64_t atomic_fast64_t;
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typedef uint_fast64_t uatomic_fast64_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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/* SH kernel has implemented a gUSA ("g" User Space Atomicity) support
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for the user space atomicity. The atomicity macros use this scheme.
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Reference:
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Niibe Yutaka, "gUSA: Simple and Efficient User Space Atomicity
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Emulation with Little Kernel Modification", Linux Conference 2002,
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Japan. http://lc.linux.or.jp/lc2002/papers/niibe0919h.pdf (in
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Japanese).
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B.N. Bershad, D. Redell, and J. Ellis, "Fast Mutual Exclusion for
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Uniprocessors", Proceedings of the Fifth Architectural Support for
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Programming Languages and Operating Systems (ASPLOS), pp. 223-233,
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October 1992. http://www.cs.washington.edu/homes/bershad/Papers/Rcs.ps
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SuperH ABI:
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r15: -(size of atomic instruction sequence) < 0
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r0: end point
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r1: saved stack pointer
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*/
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#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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({ __typeof (*(mem)) __result; \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.b @%1,%0\n\
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cmp/eq %0,%3\n\
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bf 1f\n\
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mov.b %2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__result) : "r" (mem), "r" (newval), "r" (oldval) \
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: "r0", "r1", "t", "memory"); \
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__result; })
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#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
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({ __typeof (*(mem)) __result; \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.w @%1,%0\n\
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cmp/eq %0,%3\n\
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bf 1f\n\
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mov.w %2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__result) : "r" (mem), "r" (newval), "r" (oldval) \
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: "r0", "r1", "t", "memory"); \
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__result; })
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ __typeof (*(mem)) __result; \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.l @%1,%0\n\
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cmp/eq %0,%3\n\
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bf 1f\n\
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mov.l %2,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__result) : "r" (mem), "r" (newval), "r" (oldval) \
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: "r0", "r1", "t", "memory"); \
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__result; })
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/* XXX We do not really need 64-bit compare-and-exchange. At least
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not in the moment. Using it would mean causing portability
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problems since not many other 32-bit architectures have support for
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such an operation. So don't define any code for now. */
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# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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(abort (), 0)
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#define atomic_exchange_and_add(mem, value) \
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({ __typeof (*(mem)) __result, __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%2,%0\n\
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add %0,%1\n\
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mov.b %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
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: "r0", "r1", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%2,%0\n\
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add %0,%1\n\
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mov.w %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
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: "r0", "r1", "memory"); \
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%2,%0\n\
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add %0,%1\n\
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mov.l %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
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: "r0", "r1", "memory"); \
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else \
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{ \
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__typeof (mem) memp = (mem); \
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do \
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__result = *memp; \
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while (__arch_compare_and_exchange_val_64_acq \
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(memp, __result + __value, __result) == __result); \
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(void) __value; \
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} \
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__result; })
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#define atomic_add(mem, value) \
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(void) ({ __typeof (*(mem)) __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%1,r2\n\
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add r2,%0\n\
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mov.b %0,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__tmp) : "r" (mem), "0" (__value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*(mem)) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%1,r2\n\
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add r2,%0\n\
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mov.w %0,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__tmp) : "r" (mem), "0" (__value) \
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: "r0", "r1", "r2", "memory"); \
|
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else if (sizeof (*(mem)) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%1,r2\n\
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add r2,%0\n\
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mov.l %0,@%1\n\
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1: mov r1,r15"\
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: "=&r" (__tmp) : "r" (mem), "0" (__value) \
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: "r0", "r1", "r2", "memory"); \
|
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else \
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{ \
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__typeof (*(mem)) oldval; \
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__typeof (mem) memp = (mem); \
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do \
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oldval = *memp; \
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while (__arch_compare_and_exchange_val_64_acq \
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(memp, oldval + __value, oldval) == oldval); \
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(void) __value; \
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} \
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})
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#define atomic_add_negative(mem, value) \
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({ unsigned char __result; \
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__typeof (*(mem)) __tmp, __value = (value); \
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if (sizeof (*(mem)) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%2,r2\n\
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add r2,%1\n\
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mov.b %1,@%2\n\
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1: mov r1,r15\n\
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shal %1\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*(mem)) == 2) \
|
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__asm __volatile ("\
|
||||
.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%2,r2\n\
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add r2,%1\n\
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mov.w %1,@%2\n\
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1: mov r1,r15\n\
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shal %1\n\
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movt %0"\
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: "=r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
|
||||
: "r0", "r1", "r2", "t", "memory"); \
|
||||
else if (sizeof (*(mem)) == 4) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%2,r2\n\
|
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add r2,%1\n\
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||||
mov.l %1,@%2\n\
|
||||
1: mov r1,r15\n\
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||||
shal %1\n\
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||||
movt %0"\
|
||||
: "=r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
|
||||
: "r0", "r1", "r2", "t", "memory"); \
|
||||
else \
|
||||
abort (); \
|
||||
__result; })
|
||||
|
||||
#define atomic_add_zero(mem, value) \
|
||||
({ unsigned char __result; \
|
||||
__typeof (*(mem)) __tmp, __value = (value); \
|
||||
if (sizeof (*(mem)) == 1) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
|
||||
mov #-6,r15\n\
|
||||
0: mov.b @%2,r2\n\
|
||||
add r2,%1\n\
|
||||
mov.b %1,@%2\n\
|
||||
1: mov r1,r15\n\
|
||||
tst %1,%1\n\
|
||||
movt %0"\
|
||||
: "=r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
|
||||
: "r0", "r1", "r2", "t", "memory"); \
|
||||
else if (sizeof (*(mem)) == 2) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
|
||||
mov #-6,r15\n\
|
||||
0: mov.w @%2,r2\n\
|
||||
add r2,%1\n\
|
||||
mov.w %1,@%2\n\
|
||||
1: mov r1,r15\n\
|
||||
tst %1,%1\n\
|
||||
movt %0"\
|
||||
: "=r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
|
||||
: "r0", "r1", "r2", "t", "memory"); \
|
||||
else if (sizeof (*(mem)) == 4) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
|
||||
mov #-6,r15\n\
|
||||
0: mov.l @%2,r2\n\
|
||||
add r2,%1\n\
|
||||
mov.l %1,@%2\n\
|
||||
1: mov r1,r15\n\
|
||||
tst %1,%1\n\
|
||||
movt %0"\
|
||||
: "=r" (__result), "=&r" (__tmp) : "r" (mem), "1" (__value) \
|
||||
: "r0", "r1", "r2", "t", "memory"); \
|
||||
else \
|
||||
abort (); \
|
||||
__result; })
|
||||
|
||||
#define atomic_increment_and_test(mem) atomic_add_zero((mem), 1)
|
||||
#define atomic_decrement_and_test(mem) atomic_add_zero((mem), -1)
|
||||
|
||||
#define atomic_bit_set(mem, bit) \
|
||||
(void) ({ unsigned int __mask = 1 << (bit); \
|
||||
if (sizeof (*(mem)) == 1) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
|
||||
mov #-6,r15\n\
|
||||
0: mov.b @%0,r2\n\
|
||||
or %1,r2\n\
|
||||
mov.b r2,@%0\n\
|
||||
1: mov r1,r15"\
|
||||
: : "r" (mem), "r" (__mask) \
|
||||
: "r0", "r1", "r2", "memory"); \
|
||||
else if (sizeof (*(mem)) == 2) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
|
||||
mov #-6,r15\n\
|
||||
0: mov.w @%0,r2\n\
|
||||
or %1,r2\n\
|
||||
mov.w r2,@%0\n\
|
||||
1: mov r1,r15"\
|
||||
: : "r" (mem), "r" (__mask) \
|
||||
: "r0", "r1", "r2", "memory"); \
|
||||
else if (sizeof (*(mem)) == 4) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
mov r15,r1\n\
|
||||
mov #-6,r15\n\
|
||||
0: mov.l @%0,r2\n\
|
||||
or %1,r2\n\
|
||||
mov.l r2,@%0\n\
|
||||
1: mov r1,r15"\
|
||||
: : "r" (mem), "r" (__mask) \
|
||||
: "r0", "r1", "r2", "memory"); \
|
||||
else \
|
||||
abort (); \
|
||||
})
|
||||
|
||||
#define atomic_bit_test_set(mem, bit) \
|
||||
({ unsigned int __mask = 1 << (bit); \
|
||||
unsigned int __result = __mask; \
|
||||
if (sizeof (*(mem)) == 1) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
nop\n\
|
||||
mov r15,r1\n\
|
||||
mov #-8,r15\n\
|
||||
0: mov.b @%2,r2\n\
|
||||
or r2,%1\n\
|
||||
and r2,%0\n\
|
||||
mov.b %1,@%2\n\
|
||||
1: mov r1,r15"\
|
||||
: "=&r" (__result), "=&r" (__mask) \
|
||||
: "r" (mem), "0" (__result), "1" (__mask) \
|
||||
: "r0", "r1", "r2", "memory"); \
|
||||
else if (sizeof (*(mem)) == 2) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
nop\n\
|
||||
mov r15,r1\n\
|
||||
mov #-8,r15\n\
|
||||
0: mov.w @%2,r2\n\
|
||||
or r2,%1\n\
|
||||
and r2,%0\n\
|
||||
mov.w %1,@%2\n\
|
||||
1: mov r1,r15"\
|
||||
: "=&r" (__result), "=&r" (__mask) \
|
||||
: "r" (mem), "0" (__result), "1" (__mask) \
|
||||
: "r0", "r1", "r2", "memory"); \
|
||||
else if (sizeof (*(mem)) == 4) \
|
||||
__asm __volatile ("\
|
||||
.align 2\n\
|
||||
mova 1f,r0\n\
|
||||
nop\n\
|
||||
mov r15,r1\n\
|
||||
mov #-8,r15\n\
|
||||
0: mov.l @%2,r2\n\
|
||||
or r2,%1\n\
|
||||
and r2,%0\n\
|
||||
mov.l %1,@%2\n\
|
||||
1: mov r1,r15"\
|
||||
: "=&r" (__result), "=&r" (__mask) \
|
||||
: "r" (mem), "0" (__result), "1" (__mask) \
|
||||
: "r0", "r1", "r2", "memory"); \
|
||||
else \
|
||||
abort (); \
|
||||
__result; })
|
||||
Reference in New Issue
Block a user