lib/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2025-08-08 17:42:12 +03:00
Code Activity

Fix %fp/%sp typo in new sparc ceil{,f} assembler.

Browse Source 
* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Fix accidental use of
	frame pointer instead of stack pointer relative arg slot.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_ceil.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_ceilf.S: Likewise.
This commit is contained in:
David S. Miller
2012-02-27 20:33:25 -08:00
parent 433f48bf3b
commit d6b5aa5879
5 changed files with 16 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
ChangeLog
View File

@@ -1,3 +1,11 @@
2012-02-27 David S. Miller <davem@davemloft.net>
* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Fix accidental use of
frame pointer instead of stack pointer relative arg slot.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise.
* sysdeps/sparc/sparc64/fpu/s_ceil.S: Likewise.
* sysdeps/sparc/sparc64/fpu/s_ceilf.S: Likewise.
2012-02-27 Carlos O'Donell <carlos_odonell@mentor.com>
[BZ #3992]

4
sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S
View File

@@ -75,9 +75,9 @@ ENTRY (__ceil)
faddd %f0, %f16, %f18
fsubd %f18, %f16, %f18
fcmpd %fcc2, %f18, %f0
stx %o3, [%fp + 72]
stx %o3, [%sp + 72]
ldd [%fp + 72], %f20
ldd [%sp + 72], %f20
fmovduge %fcc2, ZERO, %f20
faddd %f18, %f20, %f0
fabsd %f0, %f0

4
sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S
View File

@@ -71,9 +71,9 @@ ENTRY (__ceilf)
fadds %f0, %f16, %f1
fsubs %f1, %f16, %f1
fcmps %fcc2, %f1, %f0
st %o3, [%fp + 68]
st %o3, [%sp + 68]
ld [%fp + 68], %f9
ld [%sp + 68], %f9
fmovsuge %fcc2, ZERO, %f9
fadds %f1, %f9, %f0
fabss %f0, %f0

4
sysdeps/sparc/sparc64/fpu/s_ceil.S
View File

@@ -71,9 +71,9 @@ ENTRY (__ceil)
faddd %f0, %f16, %f18
fsubd %f18, %f16, %f18
fcmpd %fcc2, %f18, %f0
stx %o3, [%fp + STACK_BIAS + 128]
stx %o3, [%sp + STACK_BIAS + 128]
ldd [%fp + STACK_BIAS + 128], %f20
ldd [%sp + STACK_BIAS + 128], %f20
fmovduge %fcc2, ZERO, %f20
faddd %f18, %f20, %f0
fabsd %f0, %f0

4
sysdeps/sparc/sparc64/fpu/s_ceilf.S
View File

@@ -69,9 +69,9 @@ ENTRY (__ceilf)
fadds %f1, %f16, %f5
fsubs %f5, %f16, %f5
fcmps %fcc2, %f5, %f1
st %o3, [%fp + STACK_BIAS + 128]
st %o3, [%sp + STACK_BIAS + 128]
ld [%fp + STACK_BIAS + 128], %f9
ld [%sp + STACK_BIAS + 128], %f9
fmovsuge %fcc2, ZERO, %f9
fadds %f5, %f9, %f0
fabss %f0, %f0