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mips: Remove ununsed atomic macros

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These are already provided by the generic include/atomic.h.

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
This commit is contained in:
Adhemerval Zanella
2025-09-11 10:49:30 -03:00
parent ba69286641
commit c787f0ec3e
1 changed files with 0 additions and 120 deletions
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120
sysdeps/mips/atomic-machine.h
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@@ -42,8 +42,6 @@
#define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X) #define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
#define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC) #define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
#define USE_ATOMIC_COMPILER_BUILTINS 1
/* MIPS is an LL/SC machine. However, XLP has a direct atomic exchange /* MIPS is an LL/SC machine. However, XLP has a direct atomic exchange
instruction which will be used by __atomic_exchange_n. */ instruction which will be used by __atomic_exchange_n. */
#ifdef _MIPS_ARCH_XLP #ifdef _MIPS_ARCH_XLP
@@ -52,124 +50,6 @@
# define ATOMIC_EXCHANGE_USES_CAS 1 # define ATOMIC_EXCHANGE_USES_CAS 1
#endif #endif
/* Compare and exchange.
For all "bool" routines, we return FALSE if exchange successful. */
#define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
(abort (), 0)
#define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
(abort (), 0)
#define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
({ \
typeof (*mem) __oldval = (oldval); \
!__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
model, __ATOMIC_RELAXED); \
})
#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
(abort (), (typeof(*mem)) 0)
#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
(abort (), (typeof(*mem)) 0)
#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
({ \
typeof (*mem) __oldval = (oldval); \
__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
model, __ATOMIC_RELAXED); \
__oldval; \
})
#if _MIPS_SIM == _ABIO32
/* We can't do an atomic 64-bit operation in O32. */
# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
(abort (), 0)
# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
(abort (), (typeof(*mem)) 0)
#else
# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
__arch_compare_and_exchange_bool_32_int (mem, newval, oldval, model)
# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
__arch_compare_and_exchange_val_32_int (mem, newval, oldval, model)
#endif
/* Compare and exchange with "acquire" semantics, ie barrier after. */
#define atomic_compare_and_exchange_bool_acq(mem, new, old) \
__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
mem, new, old, __ATOMIC_ACQUIRE)
#define atomic_compare_and_exchange_val_acq(mem, new, old) \
__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
mem, new, old, __ATOMIC_ACQUIRE)
/* Compare and exchange with "release" semantics, ie barrier before. */
#define atomic_compare_and_exchange_val_rel(mem, new, old) \
__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
mem, new, old, __ATOMIC_RELEASE)
/* Atomic exchange (without compare). */
#define __arch_exchange_8_int(mem, newval, model) \
(abort (), (typeof(*mem)) 0)
#define __arch_exchange_16_int(mem, newval, model) \
(abort (), (typeof(*mem)) 0)
#define __arch_exchange_32_int(mem, newval, model) \
__atomic_exchange_n (mem, newval, model)
#if _MIPS_SIM == _ABIO32
/* We can't do an atomic 64-bit operation in O32. */
# define __arch_exchange_64_int(mem, newval, model) \
(abort (), (typeof(*mem)) 0)
#else
# define __arch_exchange_64_int(mem, newval, model) \
__atomic_exchange_n (mem, newval, model)
#endif
#define atomic_exchange_acq(mem, value) \
__atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE)
#define atomic_exchange_rel(mem, value) \
__atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE)
/* Atomically add value and return the previous (unincremented) value. */
#define __arch_exchange_and_add_8_int(mem, value, model) \
(abort (), (typeof(*mem)) 0)
#define __arch_exchange_and_add_16_int(mem, value, model) \
(abort (), (typeof(*mem)) 0)
#define __arch_exchange_and_add_32_int(mem, value, model) \
__atomic_fetch_add (mem, value, model)
#if _MIPS_SIM == _ABIO32
/* We can't do an atomic 64-bit operation in O32. */
# define __arch_exchange_and_add_64_int(mem, value, model) \
(abort (), (typeof(*mem)) 0)
#else
# define __arch_exchange_and_add_64_int(mem, value, model) \
__atomic_fetch_add (mem, value, model)
#endif
#define atomic_exchange_and_add_acq(mem, value) \
__atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \
__ATOMIC_ACQUIRE)
#define atomic_exchange_and_add_rel(mem, value) \
__atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \
__ATOMIC_RELEASE)
/* TODO: More atomic operations could be implemented efficiently; only the
basic requirements are done. */
#ifdef __mips16 #ifdef __mips16
# define atomic_full_barrier() __sync_synchronize () # define atomic_full_barrier() __sync_synchronize ()