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mirror of https://sourceware.org/git/glibc.git synced 2025-08-01 10:06:57 +03:00
2002-01-09  Richard Henderson  <rth@redhat.com>

	* sysdeps/unix/sysv/linux/alpha/sysdep-cancel.h: Assume only
	ret follows pseudo, and thus avoid branch-to-branch in cancel
	case.  Use SYSCALL_ERROR_LABEL.
This commit is contained in:
Ulrich Drepper
2003-01-12 19:29:11 +00:00
parent 76426e0247
commit addb5f3176
5 changed files with 263 additions and 222 deletions

View File

@ -72,192 +72,11 @@
? __syscall_##name(args) \
: INLINE_SYSCALL1(name, nr, args))
#define INLINE_SYSCALL1(name, nr, args...) \
({ \
long _sc_ret, _sc_err; \
inline_syscall##nr(name, args); \
if (_sc_err) \
{ \
__set_errno (_sc_ret); \
_sc_ret = -1L; \
} \
_sc_ret; \
#undef INTERNAL_SYSCALL
#define INTERNAL_SYSCALL(name, err_out, nr, args...) \
({ \
extern char ChEcK[__NR_##name == __NR_rt_sigaction ? -1 : 1]; \
INTERNAL_SYSCALL1(name, err_out, nr, args); \
})
#define inline_syscall_clobbers \
"$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
"$22", "$23", "$24", "$25", "$27", "$28", "memory"
/* If TLS is in use, we have a conflict between the PAL_rduniq primitive,
as modeled within GCC, and explicit use of the R0 register. If we use
the register via the asm, the scheduler may place the PAL_rduniq insn
before we've copied the data from R0 into _sc_ret. If this happens
we'll get a reload abort, since R0 is live at the same time it is
needed for the PAL_rduniq.
Solve this by using the "v" constraint instead of an asm for the syscall
output. We don't do this unconditionally to allow compilation with
older compilers. */
#ifdef USE_TLS
#define inline_syscall_r0_asm
#define inline_syscall_r0_out_constraint "=v"
#else
#define inline_syscall_r0_asm __asm__("$0")
#define inline_syscall_r0_out_constraint "=r"
#endif
/* It is moderately important optimization-wise to limit the lifetime
of the hard-register variables as much as possible. Thus we copy
in/out as close to the asm as possible. */
#define inline_syscall0(name, args...) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_19 __asm__("$19"); \
\
_sc_0 = __NR_##name; \
__asm__("callsys # %0 %1 <= %2" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19) \
: "0"(_sc_0) \
: inline_syscall_clobbers, \
"$16", "$17", "$18", "$20", "$21"); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#define inline_syscall1(name,arg1) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_16 __asm__("$16"); \
register long _sc_19 __asm__("$19"); \
\
_sc_0 = __NR_##name; \
_sc_16 = (long) (arg1); \
__asm__("callsys # %0 %1 <= %2 %3" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19), "=r"(_sc_16) \
: "0"(_sc_0), "2"(_sc_16) \
: inline_syscall_clobbers, \
"$17", "$18", "$20", "$21"); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#define inline_syscall2(name,arg1,arg2) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_16 __asm__("$16"); \
register long _sc_17 __asm__("$17"); \
register long _sc_19 __asm__("$19"); \
\
_sc_0 = __NR_##name; \
_sc_16 = (long) (arg1); \
_sc_17 = (long) (arg2); \
__asm__("callsys # %0 %1 <= %2 %3 %4" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17) \
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17) \
: inline_syscall_clobbers, \
"$18", "$20", "$21"); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#define inline_syscall3(name,arg1,arg2,arg3) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_16 __asm__("$16"); \
register long _sc_17 __asm__("$17"); \
register long _sc_18 __asm__("$18"); \
register long _sc_19 __asm__("$19"); \
\
_sc_0 = __NR_##name; \
_sc_16 = (long) (arg1); \
_sc_17 = (long) (arg2); \
_sc_18 = (long) (arg3); \
__asm__("callsys # %0 %1 <= %2 %3 %4 %5" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
"=r"(_sc_18) \
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
"4"(_sc_18) \
: inline_syscall_clobbers, "$20", "$21"); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#define inline_syscall4(name,arg1,arg2,arg3,arg4) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_16 __asm__("$16"); \
register long _sc_17 __asm__("$17"); \
register long _sc_18 __asm__("$18"); \
register long _sc_19 __asm__("$19"); \
\
_sc_0 = __NR_##name; \
_sc_16 = (long) (arg1); \
_sc_17 = (long) (arg2); \
_sc_18 = (long) (arg3); \
_sc_19 = (long) (arg4); \
__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
"=r"(_sc_18) \
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
"4"(_sc_18), "1"(_sc_19) \
: inline_syscall_clobbers, "$20", "$21"); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_16 __asm__("$16"); \
register long _sc_17 __asm__("$17"); \
register long _sc_18 __asm__("$18"); \
register long _sc_19 __asm__("$19"); \
register long _sc_20 __asm__("$20"); \
\
_sc_0 = __NR_##name; \
_sc_16 = (long) (arg1); \
_sc_17 = (long) (arg2); \
_sc_18 = (long) (arg3); \
_sc_19 = (long) (arg4); \
_sc_20 = (long) (arg5); \
__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
"=r"(_sc_18), "=r"(_sc_20) \
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
"4"(_sc_18), "1"(_sc_19), "5"(_sc_20) \
: inline_syscall_clobbers, "$21"); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \
{ \
register long _sc_0 inline_syscall_r0_asm; \
register long _sc_16 __asm__("$16"); \
register long _sc_17 __asm__("$17"); \
register long _sc_18 __asm__("$18"); \
register long _sc_19 __asm__("$19"); \
register long _sc_20 __asm__("$20"); \
register long _sc_21 __asm__("$21"); \
\
_sc_0 = __NR_##name; \
_sc_16 = (long) (arg1); \
_sc_17 = (long) (arg2); \
_sc_18 = (long) (arg3); \
_sc_19 = (long) (arg4); \
_sc_20 = (long) (arg5); \
_sc_21 = (long) (arg6); \
__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8" \
: inline_syscall_r0_out_constraint (_sc_0), \
"=r"(_sc_19) "=r"(_sc_16), "=r"(_sc_17), \
"=r"(_sc_18), "=r"(_sc_20), "=r"(_sc_21) \
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
"4"(_sc_18), "1"(_sc_19), "5"(_sc_20), \
"6"(_sc_21) \
: inline_syscall_clobbers); \
_sc_ret = _sc_0, _sc_err = _sc_19; \
}
#endif /* _LINUX_ALPHA_SYSDEP_H */