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hppa: Optimize atomic_compare_and_exchange_val_acq

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Changelog:
	* sysdeps/unix/sysv/linux/hppa/atomic-machine.h: Don't include
	abort-instr.h.
	(EFAULT): Remove conditional define.
	(ENOSYS): Likewise.
	(atomic_compare_and_exchange_val_acq): Use instruction nullification
	instead of conditional branch instructions.
This commit is contained in:
John David Anglin
2016-10-15 19:22:00 +02:00
committed by Aurelien Jarno
parent cc6a8d7457
commit 7cfde84069
2 changed files with 14 additions and 17 deletions
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22
sysdeps/unix/sysv/linux/hppa/atomic-machine.h
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@ -17,13 +17,6 @@
<http://www.gnu.org/licenses/>. */
#include <stdint.h> /* Required for type definitions e.g. uint8_t. */
#include <abort-instr.h> /* Required for ABORT_INSTRUCTIUON. */
/* We need EFAULT, ENONSYS */
#if !defined EFAULT && !defined ENOSYS
#define EFAULT 14
#define ENOSYS 251
#endif
#ifndef _ATOMIC_MACHINE_H
#define _ATOMIC_MACHINE_H 1
@ -62,7 +55,7 @@ typedef uintmax_t uatomic_max_t;
#define _ASM_EDEADLOCK "-45"
/* The only basic operation needed is compare and exchange. The mem
pointer must be word aligned. */
pointer must be word aligned. We no longer loop on deadlock. */
#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
({ \
register long lws_errno asm("r21"); \
@ -74,20 +67,15 @@ typedef uintmax_t uatomic_max_t;
"0: \n\t" \
"ble " _LWS "(%%sr2, %%r0) \n\t" \
"ldi " _LWS_CAS ", %%r20 \n\t" \
"ldi " _ASM_EAGAIN ", %%r20 \n\t" \
"cmpb,=,n %%r20, %%r21, 0b \n\t" \
"nop \n\t" \
"ldi " _ASM_EDEADLOCK ", %%r20 \n\t" \
"cmpb,=,n %%r20, %%r21, 0b \n\t" \
"nop \n\t" \
"cmpiclr,<> " _ASM_EAGAIN ", %%r21, %%r0\n\t" \
"b,n 0b \n\t" \
"cmpclr,= %%r0, %%r21, %%r0 \n\t" \
"iitlbp %%r0,(%%sr0, %%r0) \n\t" \
: "=r" (lws_ret), "=r" (lws_errno) \
: "r" (lws_mem), "r" (lws_old), "r" (lws_new) \
: _LWS_CLOBBER \
); \
\
if (lws_errno == -EFAULT || lws_errno == -ENOSYS) \
ABORT_INSTRUCTION; \
\
(__typeof (oldval)) lws_ret; \
})