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Update.
2002-10-02 Ulrich Drepper <drepper@redhat.com> * sysdeps/s390/s390-32/initfini.c: Avoid unterminated string literals. * sysdeps/sh/elf/initfini.c: Likewise. * sysdeps/mach/hurd/mips/init-first.c: Likewise. * sysdeps/hppa/elf/initfini.c: Likewise. * sysdeps/sparc/sparc32/soft-fp/sfp-machine.h: Likewise.
This commit is contained in:
@@ -1,6 +1,6 @@
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/* Machine-dependent software floating-point definitions.
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Sparc userland (_Q_*) version.
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Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
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Copyright (C) 1997,1998,1999, 2002 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Richard Henderson (rth@cygnus.com),
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Jakub Jelinek (jj@ultra.linux.cz) and
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@@ -20,7 +20,7 @@
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <fpu_control.h>
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#define _FP_W_TYPE_SIZE 32
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@@ -73,8 +73,8 @@
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/* Some assembly to speed things up. */
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#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
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__asm__ ("addcc %r7,%8,%2
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addxcc %r5,%6,%1
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__asm__ ("addcc %r7,%8,%2\n\
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addxcc %r5,%6,%1\n\
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addx %r3,%4,%0" \
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: "=r" ((USItype)(r2)), \
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"=&r" ((USItype)(r1)), \
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@@ -88,8 +88,8 @@
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: "cc")
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#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
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__asm__ ("subcc %r7,%8,%2
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subxcc %r5,%6,%1
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__asm__ ("subcc %r7,%8,%2\n\
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subxcc %r5,%6,%1\n\
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subx %r3,%4,%0" \
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: "=r" ((USItype)(r2)), \
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"=&r" ((USItype)(r1)), \
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@@ -107,10 +107,10 @@
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/* We need to fool gcc, as we need to pass more than 10 \
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input/outputs. */ \
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register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \
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__asm__ __volatile__ ("
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addcc %r8,%9,%1
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addxcc %r6,%7,%0
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addxcc %r4,%5,%%g2
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__asm__ __volatile__ ("\
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addcc %r8,%9,%1\n\
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addxcc %r6,%7,%0\n\
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addxcc %r4,%5,%%g2\n\
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addx %r2,%3,%%g1" \
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: "=&r" ((USItype)(r1)), \
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"=&r" ((USItype)(r0)) \
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@@ -132,10 +132,10 @@
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/* We need to fool gcc, as we need to pass more than 10 \
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input/outputs. */ \
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register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \
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__asm__ __volatile__ ("
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subcc %r8,%9,%1
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subxcc %r6,%7,%0
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subxcc %r4,%5,%%g2
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__asm__ __volatile__ ("\
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subcc %r8,%9,%1\n\
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subxcc %r6,%7,%0\n\
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subxcc %r4,%5,%%g2\n\
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subx %r2,%3,%%g1" \
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: "=&r" ((USItype)(r1)), \
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"=&r" ((USItype)(r0)) \
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@@ -157,9 +157,9 @@
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#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
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#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \
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__asm__ ("addcc %3,%4,%3
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addxcc %2,%%g0,%2
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addxcc %1,%%g0,%1
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__asm__ ("addcc %3,%4,%3\n\
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addxcc %2,%%g0,%2\n\
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addxcc %1,%%g0,%1\n\
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addx %0,%%g0,%0" \
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: "=&r" ((USItype)(x3)), \
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"=&r" ((USItype)(x2)), \
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@@ -202,18 +202,18 @@ do { \
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* We need to clear cexc bits if any. \
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*/ \
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extern unsigned long long ___Q_numbers[]; \
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__asm__ __volatile__("
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ldd [%0], %%f30
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faddd %%f30, %%f30, %%f30
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__asm__ __volatile__("\
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ldd [%0], %%f30\n\
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faddd %%f30, %%f30, %%f30\
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" : : "r" (___Q_numbers) : "f30"); \
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} \
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else \
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{ \
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__asm__ __volatile__("
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mov %0, %%o0
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mov %%o7, %%g1
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call ___Q_simulate_exceptions
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mov %%g1, %%o7
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__asm__ __volatile__("\
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mov %0, %%o0\n\
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mov %%o7, %%g1\n\
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call ___Q_simulate_exceptions\n\
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mov %%g1, %%o7\
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" : : "r" (_fex) : \
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"g1", "g2", "g3", "g4", "g5", "o0", \
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"o1", "o2", "o3", "o4", "o5", "cc"); \
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