mips: fix testsuite build for O32 FPXX ABI on pre-R2 CPU

On MIPS when the toolchain is using the O32 FPXX ABI, the testsuite
fails to build for pre-R2 CPU.

It assumes that it is possible to use the -mfp64 option to build
tst-abi-fp64amod and tst-abi-fp64mod, while this requires a CPU which
supports the mfhc1 and mthc1 instructions, ie at least a R2 CPU:

  error: '-mgp32' and '-mfp64' can only be combined if the target
  supports the mfhc1 and mthc1 instructions

The same way it assumes that it is possible to use the -modd-spreg option
to build tst-abi-fpxxomod and tst-abi-fp64mod, while this requires at
least a R1 CPU:

  warning: the 'mips2' architecture does not support odd
  single-precision registers

This patches changes that by checking the usability of -mfp64 and
-modd-spreg options in configure, and disable those tests when they can
not be used.

sysdeps/unix/sysv/linux/mips/configure.ac

@@ -45,6 +45,8 @@ if test -z "$libc_mips_float"; then
 fi
 
 libc_mips_o32_fp=
+libc_cv_mips_fp64=
+libc_cv_mips_modd_spreg=
 
 if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then
   AC_COMPILE_IFELSE(
@@ -84,8 +86,13 @@ if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then
               [libc_mips_o32_fp=64],
               [])])])])])],
     [])
+
+  LIBC_TRY_CC_OPTION([-mfp64], [libc_cv_mips_fp64=yes], [libc_cv_mips_fp64=no])
+  LIBC_TRY_CC_OPTION([-Werror -modd-spreg], [libc_cv_mips_modd_spreg=yes], [libc_cv_mips_modd_spreg=no])
 fi
 LIBC_CONFIG_VAR([o32-fpabi],[${libc_mips_o32_fp}])
+LIBC_CONFIG_VAR([has-mpf64],[${libc_cv_mips_fp64}])
+LIBC_CONFIG_VAR([has-modd-spreg],[${libc_cv_mips_modd_spreg}])
 
 AC_COMPILE_IFELSE(
   [AC_LANG_PROGRAM([