lib/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2025-08-08 17:42:12 +03:00
Code Activity

S390: Add new s390 platform z17.

Browse Source 
The glibc-hwcaps subdirectories are extended by "z17".  Libraries are loaded if
the z17 facility bits are active:
- Miscellaneous-instruction-extensions facility 4
- Vector-enhancements-facility 3
- Vector-Packed-Decimal-Enhancement Facility 3
- CPU: Concurrent-Functions Facility

tst-glibc-hwcaps.c is extended in order to test z17 via new marker6.
In case of running on a z17 with a kernel not recognizing z17 yet,
AT_PLATFORM will be z900 but vector-bit in AT_HWCAP is set.  This situation
is now recognized and this testcase does not fail.

A fatal glibc error is dumped if glibc was build with architecture
level set for z17, but run on an older machine (See dl-hwcap-check.h).
Note, you might get an SIGILL before this check if you don't use:
configure --with-rtld-early-cflags=-march=<older-machine>

ld.so --list-diagnostics now also dumps information about s390.cpu_features.

Independent from z17, the s390x kernel won't introduce new HWCAP-Bits if there
is no special handling needed in kernel itself.  For z17, we don't have new
HWCAP flags, but have to check the facility bits retrieved by
stfle-instruction.

Instead of storing all the stfle-bits (currently four 64bit values) in the
cpu_features struct, we now only store those bits, which are needed within
glibc itself.  Note that we have this list twice, one with original values and
the other one which can be filtered with GLIBC_TUNABLES=glibc.cpu.hwcaps.
Those new fields are stored in so far reserved space in cpu_features struct.
Thus processes started in between the update of glibc package and we e.g. have
a new ld.so and an old libc.so, won't crash. The glibc internal ifunc-resolvers
would not select the best optimized variant.

The users of stfle-bits are also updated:
- parsing of GLIBC_TUNABLES=glibc.cpu.hwcaps
- glibc internal ifunc-resolvers
- __libc_ifunc_impl_list
- sysconf
This commit is contained in:
Stefan Liebler
2025-04-29 13:28:58 +02:00
parent 59f64a1f4f
commit 4f6dae2195
12 changed files with 249 additions and 56 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
sysdeps/s390/cpu-features.c
View File

@@ -27,7 +27,7 @@
#define S390_COPY_CPU_FEATURES(SRC_PTR, DEST_PTR) \
(DEST_PTR)->hwcap = (SRC_PTR)->hwcap; \
(DEST_PTR)->stfle_bits[0] = (SRC_PTR)->stfle_bits[0];
(DEST_PTR)->stfle_filtered = (SRC_PTR)->stfle_filtered;
static void
TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
@@ -77,7 +77,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
disable = true;
hwcap_mask = HWCAP_S390_VXRS | HWCAP_S390_VXRS_EXT
| HWCAP_S390_VXRS_EXT2;
stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3;
stfle_bits0_mask = S390_STFLE_BIT61_ARCH13_MIE3;
}
else if (tunable_str_comma_strcmp_cte (&t, "z13")
|| tunable_str_comma_strcmp_cte (&t, "arch11"))
@@ -85,7 +85,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
reset_features = true;
disable = true;
hwcap_mask = HWCAP_S390_VXRS_EXT | HWCAP_S390_VXRS_EXT2;
stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3;
stfle_bits0_mask = S390_STFLE_BIT61_ARCH13_MIE3;
}
else if (tunable_str_comma_strcmp_cte (&t, "z14")
|| tunable_str_comma_strcmp_cte (&t, "arch12"))
@@ -93,12 +93,14 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
reset_features = true;
disable = true;
hwcap_mask = HWCAP_S390_VXRS_EXT2;
stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3;
stfle_bits0_mask = S390_STFLE_BIT61_ARCH13_MIE3;
}
else if (tunable_str_comma_strcmp_cte (&t, "z15")
|| tunable_str_comma_strcmp_cte (&t, "z16")
|| tunable_str_comma_strcmp_cte (&t, "z17")
|| tunable_str_comma_strcmp_cte (&t, "arch13")
|| tunable_str_comma_strcmp_cte (&t, "arch14"))
|| tunable_str_comma_strcmp_cte (&t, "arch14")
|| tunable_str_comma_strcmp_cte (&t, "arch15"))
{
/* For z15 or newer we don't have to disable something, but we have
to reset to the original values. */
@@ -125,7 +127,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
hwcap_mask |= HWCAP_S390_VXRS | HWCAP_S390_VXRS_EXT;
}
else if (tunable_str_comma_strcmp_cte (&t, "STFLE_MIE3"))
stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3;
stfle_bits0_mask = S390_STFLE_BIT61_ARCH13_MIE3;
/* Perform the actions determined above. */
if (reset_features)
@@ -144,22 +146,26 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
if (stfle_bits0_mask != 0ULL)
{
if (disable)
cpu_features_curr.stfle_bits[0] &= ~stfle_bits0_mask;
cpu_features_curr.stfle_filtered &= ~stfle_bits0_mask;
else
cpu_features_curr.stfle_bits[0] |= stfle_bits0_mask;
cpu_features_curr.stfle_filtered |= stfle_bits0_mask;
}
}
/* Copy back the features after checking that no unsupported features were
enabled by user. */
cpu_features->hwcap = cpu_features_curr.hwcap & cpu_features_orig.hwcap;
cpu_features->stfle_bits[0] = cpu_features_curr.stfle_bits[0]
& cpu_features_orig.stfle_bits[0];
cpu_features->stfle_filtered = cpu_features_curr.stfle_filtered
& cpu_features_orig.stfle_filtered;
}
static inline void
init_cpu_features (struct cpu_features *cpu_features)
init_cpu_features_no_tunables (struct cpu_features *cpu_features)
{
/* Only initialize once. */
if (cpu_features->hwcap != 0)
return;
/* Fill cpu_features as passed by kernel and machine. */
cpu_features->hwcap = GLRO(dl_hwcap);
@@ -168,20 +174,57 @@ init_cpu_features (struct cpu_features *cpu_features)
&& (cpu_features->hwcap & HWCAP_S390_ZARCH)
&& (cpu_features->hwcap & HWCAP_S390_HIGH_GPRS)))
{
register unsigned long reg0 __asm__("0") = 0;
unsigned long long stfle_bits[4] = { 0 };
register unsigned long reg0 __asm__("0") = 3;
__asm__ __volatile__(".machine push" "\n\t"
".machine \"z9-109\"" "\n\t"
".machinemode \"zarch_nohighgprs\"\n\t"
"stfle %0" "\n\t"
".machine pop" "\n"
: "=QS" (cpu_features->stfle_bits[0]),
: "=QS" (stfle_bits[0]),
"+d" (reg0)
: : "cc");
unsigned long long internal_stfle_bits = 0;
/* Facility bit 34: z10: General instructions extension. */
if ((stfle_bits[0] & (1ULL << (63 - 34))) != 0)
internal_stfle_bits |= S390_STFLE_BIT34_Z10;
/* Facility bit 45: z196: Distinct operands, popcount, ... */
if ((stfle_bits[0] & (1ULL << (63 - 45))) != 0)
internal_stfle_bits |= S390_STFLE_BIT45_Z196;
/* Facility bit 61: arch13/z15: Miscellaneous-Instruction-Extensions
Facility 3, e.g. mvcrl. */
if ((stfle_bits[0] & (1ULL << (63 - 61))) != 0)
internal_stfle_bits |= S390_STFLE_BIT61_ARCH13_MIE3;
/* Facility bit 84: arch15/z17: Miscellaneous-instruction-extensions 4 */
if ((stfle_bits[1] & (1ULL << (127 - 84))) != 0)
internal_stfle_bits |= S390_STFLE_BIT84_ARCH15_MIE4;
/* Facility bit 198: arch15/z17: Vector-enhancements-facility 3 */
if ((stfle_bits[3] & (1ULL << (255 - 198))) != 0)
internal_stfle_bits |= S390_STFLE_BIT198_ARCH15_VXRS_EXT3;
/* Facility bit 199: arch15/z17: Vector-Packed-Decimal-Enhancement 3 */
if ((stfle_bits[3] & (1ULL << (255 - 199))) != 0)
internal_stfle_bits |= S390_STFLE_BIT199_ARCH15_VXRS_PDE3;
/* Facility bit 201: arch15/z17: CPU: Concurrent-Functions Facility */
if ((stfle_bits[3] & (1ULL << (255 - 201))) != 0)
internal_stfle_bits |= S390_STFLE_BIT201_ARCH15_CON;
cpu_features->stfle_orig = internal_stfle_bits;
cpu_features->stfle_filtered = internal_stfle_bits;
}
else
{
cpu_features->stfle_bits[0] = 0ULL;
}
}
static inline void
init_cpu_features (struct cpu_features *cpu_features)
{
init_cpu_features_no_tunables (cpu_features);
TUNABLE_GET (glibc, cpu, hwcaps, tunable_val_t *, TUNABLE_CALLBACK (set_hwcaps));
}