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powerpc: Enforce compiler barriers on hardware transactions

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Work around a GCC behavior with hardware transactional memory built-ins.
GCC doesn't treat the PowerPC transactional built-ins as compiler
barriers, moving instructions past the transaction boundaries and
altering their atomicity.
This commit is contained in:
Tulio Magno Quites Machado Filho
2015-12-28 12:24:43 -02:00
parent bc49a7afd3
commit 42bf1c8971
7 changed files with 58 additions and 15 deletions
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6
sysdeps/unix/sysv/linux/powerpc/elision-trylock.c
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@@ -31,7 +31,7 @@ int
__lll_trylock_elision (int *futex, short *adapt_count)
{
/* Implement POSIX semantics by forbiding nesting elided trylocks. */
__builtin_tabort (_ABORT_NESTED_TRYLOCK);
__libc_tabort (_ABORT_NESTED_TRYLOCK);
/* Only try a transaction if it's worth it. */
if (*adapt_count > 0)
@@ -39,14 +39,14 @@ __lll_trylock_elision (int *futex, short *adapt_count)
goto use_lock;
}
if (__builtin_tbegin (0))
if (__libc_tbegin (0))
{
if (*futex == 0)
return 0;
/* Lock was busy. This is never a nested transaction.
End it, and set the adapt count. */
__builtin_tend (0);
__libc_tend (0);
if (aconf.skip_lock_busy > 0)
*adapt_count = aconf.skip_lock_busy;