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powerpc: Enforce compiler barriers on hardware transactions
Work around a GCC behavior with hardware transactional memory built-ins. GCC doesn't treat the PowerPC transactional built-ins as compiler barriers, moving instructions past the transaction boundaries and altering their atomicity.
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@ -52,12 +52,12 @@ __lll_lock_elision (int *lock, short *adapt_count, EXTRAARG int pshared)
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for (int i = aconf.try_tbegin; i > 0; i--)
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{
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if (__builtin_tbegin (0))
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if (__libc_tbegin (0))
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{
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if (*lock == 0)
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return 0;
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/* Lock was busy. Fall back to normal locking. */
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__builtin_tabort (_ABORT_LOCK_BUSY);
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__libc_tabort (_ABORT_LOCK_BUSY);
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}
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else
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{
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