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sparc: remove ceil, floor, trunc sparc specific implementations

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The ceil, floor and trunc functions on sparc do not fully follow the
standard and trigger an inexact exception when presented a value which
is not an integer. Since glibc 2.24 this causes a few tests to fail,
for instance:

  testing double (without inline functions)
  Failure: ceil (lit_pi): Exception "Inexact" set
  Failure: ceil (-lit_pi): Exception "Inexact" set
  Failure: ceil (min_subnorm_value): Exception "Inexact" set
  Failure: ceil (min_value): Exception "Inexact" set
  Failure: ceil (0.1): Exception "Inexact" set
  Failure: ceil (0.25): Exception "Inexact" set
  Failure: ceil (0.625): Exception "Inexact" set
  Failure: ceil (-min_subnorm_value): Exception "Inexact" set
  Failure: ceil (-min_value): Exception "Inexact" set
  Failure: ceil (-0.1): Exception "Inexact" set
  Failure: ceil (-0.25): Exception "Inexact" set
  Failure: ceil (-0.625): Exception "Inexact" set

I tried to fix that by using the same strategy than used on other
architectures, that is by saving the FSR register at the beginning
and restoring it at the end of the function. When doing so I noticed
a comment that this operation might be very costly, so I decided to
do some benchmarks.

The benchmarks below represent the time required to run each of the
function 60 millions of times with different input value. I have done
that in the basic V9 code, the VIS2 code, and using the default C
implementation of the libc, for both sparc32 and sparc64, on a Niagara
T1 based machine and an UltraSparc IIIi. Given I don't have access to a
more recent machine), I haven't been able to test the VIS3 version. Also
it should be noted that it doesn't make sense to do this benchmark for
V8 or earlier as in that case we use the default C implementation. The
results are available in the table below, the "+ fix" version correspond
to the one saving and restoring the FSR.

  Niagara T1 / sparc32
  --------------------
              ceilf    ceil     floorf   floor    truncf   trunc
  V9          19.10    22.48    19.10    22.48    16.59    19.27
  V9 + fix    19.77    23.34    19.77    23.33    17.27    20.12
  VIS2        16.87    19.62    16.87    19.62
  VIS2 + fix  17.55    20.47    17.55    20.47
  C impl      11.39    13.80    11.40    13.80    10.88    10.84

  Niagara T1 / sparc64
  --------------------
              ceilf    ceil     floorf   floor    truncf   trunc
  V9          18.14    22.23    18.14    22.23    15.64    19.02
  V9 + fix    18.82    23.08    18.82    23.08    16.32    19.87
  VIS2        15.92    19.37    15.92    19.37
  VIS2 + fix  16.59    20.22    16.59    20.22
  C impl      11.39    13.60    11.39    15.36    10.88    12.65

  UltraSparc IIIi / sparc32
  -------------------------
              ceilf    ceil     floorf   floor    truncf   trunc
  V9           4.81     7.09     6.61    11.64     4.91     7.05
  V9 + fix     7.20    10.42     7.14    10.54     6.76     9.47
  VIS2         4.81     7.03     4.76     7.13
  VIS2 + fix   6.76     9.51     6.71     9.63
  C impl       3.88     8.62     3.90     9.45     3.57     6.62

  UltraSparc IIIi / sparc64
  -------------------------
              ceilf    ceil     floorf   floor    truncf   trunc
  V9           3.48     4.39     3.48     4.41     3.01     3.85
  V9 + fix     4.76     5.90     4.76     5.90     4.86     6.26
  VIS2         2.95     3.61     2.95     3.61
  VIS2 + fix   4.24     5.37     4.30     7.97
  C impl       3.63     4.89     3.62     6.38     3.33     4.03

The first thing that should be noted is that the C implementation is
always faster on the Niagara T1 based machine. On the UltraSparc IIIi
the float version on sparc32 is also faster.

Coming back about the fix saving and restoring the FSR, it appears
it has a big impact as expected. In that case the C implementation is
always faster than the fixed implementations.

This patch therefore removes the sparc specific implementations in
favor of the generic ones.

Changelog:
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
	[$(subdir) = math] (libm-sysdep_routines): Remove.
	[$(subdir) = math && $(have-as-vis3) = yes] (libm-sysdep_routines):
	Remove s_ceilf-vis3, s_ceil-vis3, s_floorf-vis3, s_floor-vis3,
	s_truncf-vis3, s_trunc-vis3.
	* sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis2.S: Delete
	file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis3.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis2.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis3.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis2.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis3.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis2.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis3.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc-vis3.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf-vis3.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_trunc.S: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_truncf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_ceil.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_ceilf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_floor.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_floorf.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_trunc.S: Likewise.
	* sysdeps/sparc/sparc64/fpu/s_truncf.S: Likewise.
This commit is contained in:
Aurelien Jarno
2016-07-31 23:17:47 +02:00
parent fab382315a
commit 33ae5b17cd
47 changed files with 64 additions and 2245 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
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@ -1,15 +1,11 @@
ifeq ($(subdir),math)
libm-sysdep_routines += s_ceil-vis2 s_ceilf-vis2 \
s_floor-vis2 s_floorf-vis2
ifeq ($(have-as-vis3),yes)
libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_ceilf-vis3 \
s_ceil-vis3 s_fabs-vis3 s_fabsf-vis3 s_floor-vis3 \
s_floorf-vis3 s_llrintf-vis3 s_llrint-vis3 \
libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \
s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 w_sqrt-vis3 w_sqrtf-vis3 \
s_fminf-vis3 s_fmin-vis3 s_fmaxf-vis3 s_fmax-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fdimf-vis3 s_fdim-vis3 \
s_nearbyint-vis3 s_nearbyintf-vis3 s_truncf-vis3 \
s_trunc-vis3
s_nearbyint-vis3 s_nearbyintf-vis3
sysdep_routines += s_copysignf-vis3 s_copysign-vis3
endif
endif

61
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis2.S
View File

@ -1,61 +0,0 @@
/* ceil function, sparc32 v9 vis2 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceil_vis2)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
or %o0, %o1, %o0
stx %o0, [%sp + 72]
sllx %o2, 32, %o2
fzero ZERO
ldd [%sp + 72], %f0
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + 72]
fabsd %f0, %f14
ldd [%sp + 72], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__ceil_vis2)

62
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis3.S
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@ -1,62 +0,0 @@
/* ceil function, sparc32 v9 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceil_vis3)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
sllx %o2, 32, %o2
or %o0, %o1, %o0
movxtod %o0, %f0
fzero ZERO
fnegd ZERO, SIGN_BIT
movxtod %o2, %f16
fabsd %f0, %f14
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__ceil_vis3)

19
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil.S
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@ -1,19 +0,0 @@
#include <sparc-ifunc.h>
#include <math_ldbl_opt.h>
SPARC_ASM_VIS3_VIS2_IFUNC(ceil)
weak_alias (__ceil, ceil)
#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
compat_symbol (libm, __ceil, ceill, GLIBC_2_0)
#endif
# undef weak_alias
# define weak_alias(a, b)
# undef compat_symbol
# define compat_symbol(a, b, c, d)
#define __ceil __ceil_generic
#include "../s_ceil.S"

58
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis2.S
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@ -1,58 +0,0 @@
/* Float ceil function, sparc32 v9 vis2 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceilf_vis2)
st %o0, [%sp + 68]
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
ld [%sp + 68], %f0
fnegs ZERO, SIGN_BIT
st %o2, [%sp + 68]
fabss %f0, %f14
ld [%sp + 68], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f0, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
fadds %f0, %f16, %f1
siam (1 << 2) | 0
fsubs %f1, %f16, %f1
siam (0 << 2)
retl
fors %f1, SIGN_BIT, %f0
END (__ceilf_vis2)

59
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis3.S
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@ -1,59 +0,0 @@
/* Float ceil function, sparc32 v9 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceilf_vis3)
movwtos %o0, %f0
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
movwtos %o2, %f16
fabss %f0, %f14
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f0, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
fadds %f0, %f16, %f1
siam (1 << 2) | 0
fsubs %f1, %f16, %f1
siam (0 << 2)
retl
fors %f1, SIGN_BIT, %f0
END (__ceilf_vis3)

12
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf.S
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@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_VIS2_IFUNC(ceilf)
weak_alias (__ceilf, ceilf)
# undef weak_alias
# define weak_alias(a, b)
#define __ceilf __ceilf_generic
#include "../s_ceilf.S"

61
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis2.S
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@ -1,61 +0,0 @@
/* floor function, sparc32 v9 vis2 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floor_vis2)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
or %o0, %o1, %o0
stx %o0, [%sp + 72]
sllx %o2, 32, %o2
fzero ZERO
ldd [%sp + 72], %f0
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + 72]
fabsd %f0, %f14
ldd [%sp + 72], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__floor_vis2)

62
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis3.S
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@ -1,62 +0,0 @@
/* floor function, sparc32 v9 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floor_vis3)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
sllx %o2, 32, %o2
or %o0, %o1, %o0
movxtod %o0, %f0
fzero ZERO
fnegd ZERO, SIGN_BIT
movxtod %o2, %f16
fabsd %f0, %f14
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__floor_vis3)

19
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor.S
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@ -1,19 +0,0 @@
#include <sparc-ifunc.h>
#include <math_ldbl_opt.h>
SPARC_ASM_VIS3_VIS2_IFUNC(floor)
weak_alias (__floor, floor)
#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
compat_symbol (libm, __floor, floorl, GLIBC_2_0)
#endif
# undef weak_alias
# define weak_alias(a, b)
# undef compat_symbol
# define compat_symbol(a, b, c, d)
#define __floor __floor_generic
#include "../s_floor.S"

58
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis2.S
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@ -1,58 +0,0 @@
/* Float floor function, sparc32 v9 vis2 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floorf_vis2)
st %o0, [%sp + 68]
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
ld [%sp + 68], %f0
fnegs ZERO, SIGN_BIT
st %o2, [%sp + 68]
fabss %f0, %f14
ld [%sp + 68], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f0, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
fadds %f0, %f16, %f1
siam (1 << 2) | 0
fsubs %f1, %f16, %f1
siam (0 << 2)
retl
fors %f1, SIGN_BIT, %f0
END (__floorf_vis2)

59
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis3.S
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@ -1,59 +0,0 @@
/* Float floor function, sparc32 v9 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floorf_vis3)
movwtos %o0, %f0
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
movwtos %o2, %f16
fabss %f0, %f14
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f0, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
fadds %f0, %f16, %f1
siam (1 << 2) | 0
fsubs %f1, %f16, %f1
siam (0 << 2)
retl
fors %f1, SIGN_BIT, %f0
END (__floorf_vis3)

12
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf.S
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@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_VIS2_IFUNC(floorf)
weak_alias (__floorf, floorf)
# undef weak_alias
# define weak_alias(a, b)
#define __floorf __floorf_generic
#include "../s_floorf.S"

57
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc-vis3.S
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@ -1,57 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc32 v9 vis3 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
#include <math_ldbl_opt.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__trunc_vis3)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
or %o0, %o1, %o0
fzero ZERO
movxtod %o0, %f0
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
movxtod %o2, %f16
fabsd %f0, %f14
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f14
fand %f0, SIGN_BIT, SIGN_BIT
fdtox %f14, %f14
fxtod %f14, %f14
faddd %f0, ZERO, %f18
fmovduge %fcc3, %f18, %f14
retl
for %f14, SIGN_BIT, %f0
END (__trunc_vis3)

19
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc.S
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@ -1,19 +0,0 @@
#include <sparc-ifunc.h>
#include <math_ldbl_opt.h>
SPARC_ASM_VIS3_IFUNC(trunc)
weak_alias (__trunc, trunc)
#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
compat_symbol (libm, __trunc, truncl, GLIBC_2_1)
#endif
# undef weak_alias
# define weak_alias(a, b)
# undef compat_symbol
# define compat_symbol(a, b, c, d)
#define __trunc __trunc_generic
#include "../s_trunc.S"

53
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf-vis3.S
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@ -1,53 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc32 v9 vis3 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__truncf_vis3)
movwtos %o0, %f1
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
movwtos %o2, %f16
fabss %f1, %f14
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f14
fands %f1, SIGN_BIT, SIGN_BIT
fstoi %f14, %f14
fitos %f14, %f14
fadds %f1, ZERO, %f18
fmovsuge %fcc3, %f18, %f14
retl
fors %f14, SIGN_BIT, %f0
END (__truncf_vis3)

12
sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf.S
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@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_IFUNC(truncf)
weak_alias (__truncf, truncf)
# undef weak_alias
# define weak_alias(a, b)
#define __truncf __truncf_generic
#include "../s_truncf.S"

92
sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S
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@ -1,92 +0,0 @@
/* ceil function, sparc32 v9 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
#include <math_ldbl_opt.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceil)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
sethi %hi(ONE_DOT_ZERO), %o3
or %o0, %o1, %o0
stx %o0, [%sp + 72]
sllx %o2, 32, %o2
fzero ZERO
sllx %o3, 32, %o3
ldd [%sp + 72], %f0
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + 72]
fabsd %f0, %f14
ldd [%sp + 72], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
faddd %f0, %f16, %f18
fsubd %f18, %f16, %f18
fcmpd %fcc2, %f18, %f0
stx %o3, [%sp + 72]
ldd [%sp + 72], %f20
fmovduge %fcc2, ZERO, %f20
faddd %f18, %f20, %f0
fabsd %f0, %f0
retl
for %f0, SIGN_BIT, %f0
END (__ceil)
weak_alias (__ceil, ceil)
#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
compat_symbol (libm, __ceil, ceill, GLIBC_2_0)
#endif

83
sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S
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@ -1,83 +0,0 @@
/* Float ceil function, sparc32 v9 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceilf)
st %o0, [%sp + 68]
sethi %hi(TWO_TWENTYTHREE), %o2
sethi %hi(ONE_DOT_ZERO), %o3
fzeros ZERO
ld [%sp + 68], %f0
fnegs ZERO, SIGN_BIT
st %o2, [%sp + 68]
fabss %f0, %f14
ld [%sp + 68], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f0, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
fadds %f0, %f16, %f1
fsubs %f1, %f16, %f1
fcmps %fcc2, %f1, %f0
st %o3, [%sp + 68]
ld [%sp + 68], %f9
fmovsuge %fcc2, ZERO, %f9
fadds %f1, %f9, %f0
fabss %f0, %f0
retl
fors %f0, SIGN_BIT, %f0
END (__ceilf)
weak_alias (__ceilf, ceilf)

92
sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S
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@ -1,92 +0,0 @@
/* floor function, sparc32 v9 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
#include <math_ldbl_opt.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floor)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
sethi %hi(ONE_DOT_ZERO), %o3
or %o0, %o1, %o0
stx %o0, [%sp + 72]
sllx %o2, 32, %o2
fzero ZERO
sllx %o3, 32, %o3
ldd [%sp + 72], %f0
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + 72]
fabsd %f0, %f14
ldd [%sp + 72], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
faddd %f0, %f16, %f18
fsubd %f18, %f16, %f18
fcmpd %fcc2, %f18, %f0
stx %o3, [%sp + 72]
ldd [%sp + 72], %f20
fmovdule %fcc2, ZERO, %f20
fsubd %f18, %f20, %f0
fabsd %f0, %f0
retl
for %f0, SIGN_BIT, %f0
END (__floor)
weak_alias (__floor, floor)
#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
compat_symbol (libm, __floor, floorl, GLIBC_2_0)
#endif

83
sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S
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@ -1,83 +0,0 @@
/* Float floor function, sparc32 v9 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floorf)
st %o0, [%sp + 68]
sethi %hi(TWO_TWENTYTHREE), %o2
sethi %hi(ONE_DOT_ZERO), %o3
fzeros ZERO
ld [%sp + 68], %f0
fnegs ZERO, SIGN_BIT
st %o2, [%sp + 68]
fabss %f0, %f14
ld [%sp + 68], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f0, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
fadds %f0, %f16, %f1
fsubs %f1, %f16, %f1
fcmps %fcc2, %f1, %f0
st %o3, [%sp + 68]
ld [%sp + 68], %f9
fmovsule %fcc2, ZERO, %f9
fsubs %f1, %f9, %f0
fabss %f0, %f0
retl
fors %f0, SIGN_BIT, %f0
END (__floorf)
weak_alias (__floorf, floorf)

64
sysdeps/sparc/sparc32/sparcv9/fpu/s_trunc.S
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@ -1,64 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc32 v9 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
#include <math_ldbl_opt.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__trunc)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o0, 32, %o0
or %o0, %o1, %o0
fzero ZERO
stx %o0, [%sp + 72]
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
ldd [%sp + 72], %f0
stx %o2, [%sp + 72]
fabsd %f0, %f14
ldd [%sp + 72], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f14
fand %f0, SIGN_BIT, SIGN_BIT
fdtox %f14, %f14
fxtod %f14, %f14
faddd %f0, ZERO, %f18
fmovduge %fcc3, %f18, %f14
retl
for %f14, SIGN_BIT, %f0
END (__trunc)
weak_alias (__trunc, trunc)
#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
compat_symbol (libm, __trunc, truncl, GLIBC_2_1)
#endif

56
sysdeps/sparc/sparc32/sparcv9/fpu/s_truncf.S
View File

@ -1,56 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc32 v9 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__truncf)
st %o0, [%sp + 68]
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
ld [%sp + 68], %f1
fnegs ZERO, SIGN_BIT
st %o2, [%sp + 68]
fabss %f1, %f14
ld [%sp + 68], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f14
fands %f1, SIGN_BIT, SIGN_BIT
fstoi %f14, %f14
fitos %f14, %f14
fadds %f1, ZERO, %f18
fmovsuge %fcc3, %f18, %f14
retl
fors %f14, SIGN_BIT, %f0
END (__truncf)
weak_alias (__truncf, truncf)

18
sysdeps/sparc/sparc64/fpu/multiarch/Makefile
View File

@ -1,16 +1,12 @@
ifeq ($(subdir),math)
libm-sysdep_routines += s_ceil-vis2 s_ceilf-vis2 \
s_floor-vis2 s_floorf-vis2
ifeq ($(have-as-vis3),yes)
libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 s_ceilf-vis3 \
s_ceil-vis3 m_finitef-vis3 m_finite-vis3 \
s_floorf-vis3 s_floor-vis3 m_isinff-vis3 \
m_isinf-vis3 m_isnanf-vis3 m_isnan-vis3 \
s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 \
s_rint-vis3 s_fminf-vis3 s_fmin-vis3 \
s_fmaxf-vis3 s_fmax-vis3 s_fmaf-vis3 \
s_fma-vis3 s_nearbyint-vis3 s_nearbyintf-vis3 \
s_truncf-vis3 s_trunc-vis3
libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \
m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \
m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \
s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
s_fminf-vis3 s_fmin-vis3 s_fmaxf-vis3 \
s_fmax-vis3 s_fmaf-vis3 s_fma-vis3 \
s_nearbyint-vis3 s_nearbyintf-vis3
sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \
s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
s_isnanf-vis3 s_isnan-vis3

57
sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S
View File

@ -1,57 +0,0 @@
/* ceil function, sparc64 vis2 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceil_vis2)
sethi %hi(TWO_FIFTYTWO), %o2
fzero ZERO
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + STACK_BIAS + 128]
fabsd %f0, %f14
ldd [%sp + STACK_BIAS + 128], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__ceil_vis2)

59
sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S
View File

@ -1,59 +0,0 @@
/* ceil function, sparc64 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceil_vis3)
sethi %hi(TWO_FIFTYTWO), %o2
fzero ZERO
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
movxtod %o2, %f16
fabsd %f0, %f14
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__ceil_vis3)

12
sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S
View File

@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_VIS2_IFUNC(ceil)
weak_alias (__ceil, ceil)
# undef weak_alias
# define weak_alias(a, b)
#define __ceil __ceil_generic
#include "../s_ceil.S"

56
sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S
View File

@ -1,56 +0,0 @@
/* Float ceil function, sparc64 vis2 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceilf_vis2)
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
st %o2, [%sp + STACK_BIAS + 128]
fabss %f1, %f14
ld [%sp + STACK_BIAS + 128], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f1, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
fadds %f1, %f16, %f5
siam (1 << 2) | 0
fsubs %f5, %f16, %f5
siam (0 << 2)
retl
fors %f5, SIGN_BIT, %f0
END (__ceilf_vis2)

58
sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S
View File

@ -1,58 +0,0 @@
/* Float ceil function, sparc64 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceilf_vis3)
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
movwtos %o2, %f16
fabss %f1, %f14
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f1, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 2
fadds %f1, %f16, %f5
siam (1 << 2) | 0
fsubs %f5, %f16, %f5
siam (0 << 2)
retl
fors %f5, SIGN_BIT, %f0
END (__ceilf_vis3)

12
sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S
View File

@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_VIS2_IFUNC(ceilf)
weak_alias (__ceilf, ceilf)
# undef weak_alias
# define weak_alias(a, b)
#define __ceilf __ceilf_generic
#include "../s_ceilf.S"

57
sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S
View File

@ -1,57 +0,0 @@
/* floor function, sparc64 vis2 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floor_vis2)
sethi %hi(TWO_FIFTYTWO), %o2
fzero ZERO
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + STACK_BIAS + 128]
fabsd %f0, %f14
ldd [%sp + STACK_BIAS + 128], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__floor_vis2)

59
sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S
View File

@ -1,59 +0,0 @@
/* floor function, sparc64 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floor_vis3)
sethi %hi(TWO_FIFTYTWO), %o2
fzero ZERO
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
movxtod %o2, %f16
fabsd %f0, %f14
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
faddd %f0, %f16, %f18
siam (1 << 2) | 0
fsubd %f18, %f16, %f18
siam (0 << 2)
retl
for %f18, SIGN_BIT, %f0
END (__floor_vis3)

12
sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S
View File

@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_VIS2_IFUNC(floor)
weak_alias (__floor, floor)
# undef weak_alias
# define weak_alias(a, b)
#define __floor __floor_generic
#include "../s_floor.S"

56
sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S
View File

@ -1,56 +0,0 @@
/* Float floor function, sparc64 vis2 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floorf_vis2)
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
st %o2, [%sp + STACK_BIAS + 128]
fabss %f1, %f14
ld [%sp + STACK_BIAS + 128], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f1, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
fadds %f1, %f16, %f5
siam (1 << 2) | 0
fsubs %f5, %f16, %f5
siam (0 << 2)
retl
fors %f5, SIGN_BIT, %f0
END (__floorf_vis2)

58
sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S
View File

@ -1,58 +0,0 @@
/* Float floor function, sparc64 vis3 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* 'siam' (Set Interval Arithmetic Mode) is used to quickly override
the rounding mode during this routine.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value and,
with suitable 'siam' initiated rouding mode settings, round
the final result in the proper direction.
We also use VIS3 moves to avoid using the stack to transfer
values between float and integer registers. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floorf_vis3)
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
movwtos %o2, %f16
fabss %f1, %f14
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f1, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
siam (1 << 2) | 3
fadds %f1, %f16, %f5
siam (1 << 2) | 0
fsubs %f5, %f16, %f5
siam (0 << 2)
retl
fors %f5, SIGN_BIT, %f0
END (__floorf_vis3)

12
sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S
View File

@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_VIS2_IFUNC(floorf)
weak_alias (__floorf, floorf)
# undef weak_alias
# define weak_alias(a, b)
#define __floorf __floorf_generic
#include "../s_floorf.S"

53
sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S
View File

@ -1,53 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc64 vis3 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__trunc_vis3)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o2, 32, %o2
fzero ZERO
fnegd ZERO, SIGN_BIT
movxtod %o2, %f16
fabsd %f0, %f14
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f14
fand %f0, SIGN_BIT, SIGN_BIT
fdtox %f14, %f14
fxtod %f14, %f14
faddd %f0, ZERO, %f18
fmovduge %fcc3, %f18, %f14
retl
for %f14, SIGN_BIT, %f0
END (__trunc_vis3)

12
sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S
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@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_IFUNC(trunc)
weak_alias (__trunc, trunc)
# undef weak_alias
# define weak_alias(a, b)
#define __trunc __trunc_generic
#include "../s_trunc.S"

52
sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S
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@ -1,52 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc64 vis3 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__truncf_vis3)
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
movwtos %o2,%f16
fabss %f1, %f14
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f14
fands %f1, SIGN_BIT, SIGN_BIT
fstoi %f14, %f14
fitos %f14, %f14
fadds %f1, ZERO, %f18
fmovsuge %fcc3, %f18, %f14
retl
fors %f14, SIGN_BIT, %f0
END (__truncf_vis3)

12
sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S
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@ -1,12 +0,0 @@
#include <sparc-ifunc.h>
SPARC_ASM_VIS3_IFUNC(truncf)
weak_alias (__truncf, truncf)
# undef weak_alias
# define weak_alias(a, b)
#define __truncf __truncf_generic
#include "../s_truncf.S"

83
sysdeps/sparc/sparc64/fpu/s_ceil.S
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@ -1,83 +0,0 @@
/* ceil function, sparc64 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceil)
sethi %hi(TWO_FIFTYTWO), %o2
sethi %hi(ONE_DOT_ZERO), %o3
fzero ZERO
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
sllx %o3, 32, %o3
stx %o2, [%sp + STACK_BIAS + 128]
fabsd %f0, %f14
ldd [%sp + STACK_BIAS + 128], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
faddd %f0, %f16, %f18
fsubd %f18, %f16, %f18
fcmpd %fcc2, %f18, %f0
stx %o3, [%sp + STACK_BIAS + 128]
ldd [%sp + STACK_BIAS + 128], %f20
fmovduge %fcc2, ZERO, %f20
faddd %f18, %f20, %f0
fabsd %f0, %f0
retl
for %f0, SIGN_BIT, %f0
END (__ceil)
weak_alias (__ceil, ceil)

81
sysdeps/sparc/sparc64/fpu/s_ceilf.S
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@ -1,81 +0,0 @@
/* Float ceil function, sparc64 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__ceilf)
sethi %hi(TWO_TWENTYTHREE), %o2
sethi %hi(ONE_DOT_ZERO), %o3
fzeros ZERO
fnegs ZERO, SIGN_BIT
st %o2, [%sp + STACK_BIAS + 128]
fabss %f1, %f14
ld [%sp + STACK_BIAS + 128], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f1, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
fadds %f1, %f16, %f5
fsubs %f5, %f16, %f5
fcmps %fcc2, %f5, %f1
st %o3, [%sp + STACK_BIAS + 128]
ld [%sp + STACK_BIAS + 128], %f9
fmovsuge %fcc2, ZERO, %f9
fadds %f5, %f9, %f0
fabss %f0, %f0
retl
fors %f0, SIGN_BIT, %f0
END (__ceilf)
weak_alias (__ceilf, ceilf)

83
sysdeps/sparc/sparc64/fpu/s_floor.S
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@ -1,83 +0,0 @@
/* floor function, sparc64 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floor)
sethi %hi(TWO_FIFTYTWO), %o2
sethi %hi(ONE_DOT_ZERO), %o3
fzero ZERO
sllx %o2, 32, %o2
fnegd ZERO, SIGN_BIT
sllx %o3, 32, %o3
stx %o2, [%sp + STACK_BIAS + 128]
fabsd %f0, %f14
ldd [%sp + STACK_BIAS + 128], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f16
fand %f0, SIGN_BIT, SIGN_BIT
for %f16, SIGN_BIT, %f16
faddd %f0, %f16, %f18
fsubd %f18, %f16, %f18
fcmpd %fcc2, %f18, %f0
stx %o3, [%sp + STACK_BIAS + 128]
ldd [%sp + STACK_BIAS + 128], %f20
fmovdule %fcc2, ZERO, %f20
fsubd %f18, %f20, %f0
fabsd %f0, %f0
retl
for %f0, SIGN_BIT, %f0
END (__floor)
weak_alias (__floor, floor)

81
sysdeps/sparc/sparc64/fpu/s_floorf.S
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@ -1,81 +0,0 @@
/* Float floor function, sparc64 version.
Copyright (C) 2012-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2012.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* Since changing the rounding mode is extremely expensive, we
try to round up using a method that is rounding mode
agnostic.
We add then subtract (or subtract than add if the initial
value was negative) 2**23 to the value, then subtract it
back out.
This will clear out the fractional portion of the value.
One of two things will happen for non-whole initial values.
Either the rounding mode will round it up, or it will be
rounded down. If the value started out whole, it will be
equal after the addition and subtraction. This means we
can accurately detect with one test whether we need to add
another 1.0 to round it up properly.
We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any
PIC references. We also thus avoid having to allocate a
register window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__floorf)
sethi %hi(TWO_TWENTYTHREE), %o2
sethi %hi(ONE_DOT_ZERO), %o3
fzeros ZERO
fnegs ZERO, SIGN_BIT
st %o2, [%sp + STACK_BIAS + 128]
fabss %f1, %f14
ld [%sp + STACK_BIAS + 128], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f16
fands %f1, SIGN_BIT, SIGN_BIT
fors %f16, SIGN_BIT, %f16
fadds %f1, %f16, %f5
fsubs %f5, %f16, %f5
fcmps %fcc2, %f5, %f1
st %o3, [%sp + STACK_BIAS + 128]
ld [%sp + STACK_BIAS + 128], %f9
fmovsule %fcc2, ZERO, %f9
fsubs %f5, %f9, %f0
fabss %f0, %f0
retl
fors %f0, SIGN_BIT, %f0
END (__floorf)
weak_alias (__floorf, floorf)

55
sysdeps/sparc/sparc64/fpu/s_trunc.S
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@ -1,55 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc64 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__trunc)
sethi %hi(TWO_FIFTYTWO), %o2
sllx %o2, 32, %o2
fzero ZERO
fnegd ZERO, SIGN_BIT
stx %o2, [%sp + STACK_BIAS + 128]
fabsd %f0, %f14
ldd [%sp + STACK_BIAS + 128], %f16
fcmpd %fcc3, %f14, %f16
fmovduge %fcc3, ZERO, %f14
fand %f0, SIGN_BIT, SIGN_BIT
fdtox %f14, %f14
fxtod %f14, %f14
faddd %f0, ZERO, %f18
fmovduge %fcc3, %f18, %f14
retl
for %f14, SIGN_BIT, %f0
END (__trunc)
weak_alias (__trunc, trunc)

54
sysdeps/sparc/sparc64/fpu/s_truncf.S
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@ -1,54 +0,0 @@
/* Truncate argument to nearest integral value not larger than
the argument, sparc64 version.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by David S. Miller <davem@davemloft.net>, 2013.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
/* We pop constants into the FPU registers using the incoming
argument stack slots, since this avoid having to use any PIC
references. We also thus avoid having to allocate a register
window.
VIS instructions are used to facilitate the formation of
easier constants, and the propagation of the sign bit. */
#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
#define ZERO %f10 /* 0.0 */
#define SIGN_BIT %f12 /* -0.0 */
ENTRY (__truncf)
sethi %hi(TWO_TWENTYTHREE), %o2
fzeros ZERO
fnegs ZERO, SIGN_BIT
st %o2, [%sp + STACK_BIAS + 128]
fabss %f1, %f14
ld [%sp + STACK_BIAS + 128], %f16
fcmps %fcc3, %f14, %f16
fmovsuge %fcc3, ZERO, %f14
fands %f1, SIGN_BIT, SIGN_BIT
fstoi %f14, %f14
fitos %f14, %f14
fadds %f1, ZERO, %f18
fmovsuge %fcc3, %f18, %f14
retl
fors %f14, SIGN_BIT, %f0
END (__truncf)
weak_alias (__truncf, truncf)