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MIPS: soft-fp NaN representation corrections
[BZ #15442] This adds support for the inverse interpretation of the quiet bit of IEEE 754 floating-point NaN data that some processors use. This includes in particular MIPS architecture processors; the payload used for the canonical qNaN encoding is updated accordingly so as not to interfere with the quiet bit.
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@ -200,17 +200,17 @@ double gen_special_double(int i)
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case 0:
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X_c = FP_CLS_NAN;
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#if _FP_W_TYPE_SIZE < _FP_FRACBITS_D
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__FP_FRAC_SET_2(X, _FP_QNANBIT_D, 0x1234);
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__FP_FRAC_SET_2(X, _FP_QNANNEGATEDP ? 0 : _FP_QNANBIT_D, 0x1234);
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#else
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_FP_FRAC_SET_1(X, _FP_QNANBIT_D | 0x1234);
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_FP_FRAC_SET_1(X, (_FP_QNANNEGATEDP ? 0 : _FP_QNANBIT_D) | 0x1234);
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#endif
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break;
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case 2:
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X_c = FP_CLS_NAN;
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#if _FP_W_TYPE_SIZE < _FP_FRACBITS_D
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__FP_FRAC_SET_2(X, _FP_QNANBIT_D, 0x1);
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__FP_FRAC_SET_2(X, _FP_QNANNEGATEDP ? 0 : _FP_QNANBIT_D, 0x1);
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#else
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_FP_FRAC_SET_1(X, _FP_QNANBIT_D | 0x1);
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_FP_FRAC_SET_1(X, (_FP_QNANNEGATEDP ? 0 : _FP_QNANBIT_D) | 0x1);
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#endif
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break;
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case 4:
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