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Add arch-specific configuration for C11 atomics support.

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This sets __HAVE_64B_ATOMICS if provided.  It also sets
USE_ATOMIC_COMPILER_BUILTINS to true if the existing atomic ops use the
__atomic* builtins (aarch64, mips partially) or if this has been
tested (x86_64); otherwise, this is set to false so that C11 atomics will
be based on the existing atomic operations.
This commit is contained in:
Torvald Riegel
2014-10-18 01:02:59 +02:00
parent d960211ff5
commit 1ea339b697
22 changed files with 119 additions and 0 deletions
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10
sysdeps/mips/bits/atomic.h
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@ -44,6 +44,12 @@ typedef uintmax_t uatomic_max_t;
#define MIPS_PUSH_MIPS2
#endif
#if _MIPS_SIM == _ABIO32
#define __HAVE_64B_ATOMICS 0
#else
#define __HAVE_64B_ATOMICS 1
#endif
/* See the comments in <sys/asm.h> about the use of the sync instruction. */
#ifndef MIPS_SYNC
# define MIPS_SYNC sync
@ -86,6 +92,8 @@ typedef uintmax_t uatomic_max_t;
have no assembly alternative available and want to avoid the __sync_*
builtins if at all possible. */
#define USE_ATOMIC_COMPILER_BUILTINS 1
/* Compare and exchange.
For all "bool" routines, we return FALSE if exchange succesful. */
@ -234,6 +242,8 @@ typedef uintmax_t uatomic_max_t;
/* This implementation using inline assembly will be removed once glibc
requires GCC 4.8 or later to build. */
#define USE_ATOMIC_COMPILER_BUILTINS 0
/* Compare and exchange. For all of the "xxx" routines, we expect a
"__prev" and a "__cmp" variable to be provided by the enclosing scope,
in which values are returned. */