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* sysdeps/mips/sgidefs.h (_MIPS_ISA_MIPS32, _MIPS_ISA_MIPS64): Define. * sysdeps/mips/sys/asm.h: Test _MIPS_ISA against them on all ISA tests. (ALSZ, ALMASK, SZREG, REG_S, REG_L): Define based on ABI, not ISA. (PTR_ADD, etc): Test _MIPS_SZPTR instead of _MIPS_SZLONG. * sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR to decide whether to add padding. * sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR to decide whether to add padding. * sysdeps/unix/sysv/linux/mips/kernel_sigaction.h (struct old_kernel_sigaction): Likewise.

Browse Source 
2003-03-25  Alexandre Oliva  <aoliva@redhat.com>

	* sysdeps/mips/sgidefs.h (_MIPS_ISA_MIPS32, _MIPS_ISA_MIPS64):
	Define.
	* sysdeps/mips/sys/asm.h: Test _MIPS_ISA against them on all
	ISA tests.
	(ALSZ, ALMASK, SZREG, REG_S, REG_L): Define based on ABI, not ISA.
	(PTR_ADD, etc): Test _MIPS_SZPTR instead of _MIPS_SZLONG.
	* sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR
	to decide whether to add padding.
	* sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR
	to decide whether to add padding.
	* sysdeps/unix/sysv/linux/mips/kernel_sigaction.h (struct
	old_kernel_sigaction): Likewise.
This commit is contained in:
Alexandre Oliva
2003-03-25 21:51:53 +00:00
parent 09402f5bc1
commit 1b12060c5e
5 changed files with 37 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
ChangeLog
View File

@@ -1,3 +1,18 @@
2003-03-25 Alexandre Oliva <aoliva@redhat.com>
* sysdeps/mips/sgidefs.h (_MIPS_ISA_MIPS32, _MIPS_ISA_MIPS64):
Define.
* sysdeps/mips/sys/asm.h: Test _MIPS_ISA against them on all
ISA tests.
(ALSZ, ALMASK, SZREG, REG_S, REG_L): Define based on ABI, not ISA.
(PTR_ADD, etc): Test _MIPS_SZPTR instead of _MIPS_SZLONG.
* sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR
to decide whether to add padding.
* sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR
to decide whether to add padding.
* sysdeps/unix/sysv/linux/mips/kernel_sigaction.h (struct
old_kernel_sigaction): Likewise.
2003-03-25 Ulrich Drepper <drepper@redhat.com> 2003-03-25 Ulrich Drepper <drepper@redhat.com>
* csu/tst-atomic.c: Adjust tests to what atomic_add_negative and * csu/tst-atomic.c: Adjust tests to what atomic_add_negative and

4
sysdeps/mips/sgidefs.h
View File

@@ -1,4 +1,4 @@
/* Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. /* Copyright (C) 1996, 1997, 1998, 2003 Free Software Foundation, Inc.
This file is part of the GNU C Library. This file is part of the GNU C Library.
Contributed by Ralf Baechle <ralf@gnu.org>. Contributed by Ralf Baechle <ralf@gnu.org>.
@@ -28,6 +28,8 @@
#define _MIPS_ISA_MIPS3 3 #define _MIPS_ISA_MIPS3 3
#define _MIPS_ISA_MIPS4 4 #define _MIPS_ISA_MIPS4 4
#define _MIPS_ISA_MIPS5 5 #define _MIPS_ISA_MIPS5 5
#define _MIPS_ISA_MIPS32 6
#define _MIPS_ISA_MIPS64 7
/* /*
* Subprogram calling convention * Subprogram calling convention

29
sysdeps/mips/sys/asm.h
View File

@@ -230,7 +230,8 @@ symbol = value
* MIPS IV implementations are free to treat this as a nop. The R5000 * MIPS IV implementations are free to treat this as a nop. The R5000
* is one of them. So we should have an option not to use this instruction. * is one of them. So we should have an option not to use this instruction.
*/ */
#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
(_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
# define PREF(hint,addr) \ # define PREF(hint,addr) \
pref hint,addr pref hint,addr
# define PREFX(hint,addr) \ # define PREFX(hint,addr) \
@@ -275,7 +276,8 @@ symbol = value
.set pop; \ .set pop; \
9: 9:
#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */ #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
(_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
# define MOVN(rd,rs,rt) \ # define MOVN(rd,rs,rt) \
movn rd,rs,rt movn rd,rs,rt
# define MOVZ(rd,rs,rt) \ # define MOVZ(rd,rs,rt) \
@@ -285,20 +287,18 @@ symbol = value
/* /*
* Stack alignment * Stack alignment
*/ */
#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) #if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
# define ALSZ 7
# define ALMASK ~7
#endif
#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
(_MIPS_ISA == _MIPS_ISA_MIPS5)
# define ALSZ 15 # define ALSZ 15
# define ALMASK ~15 # define ALMASK ~15
#else
# define ALSZ 7
# define ALMASK ~7
#endif #endif
/* /*
* Size of a register * Size of a register
*/ */
#ifdef __mips64 #if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
# define SZREG 8 # define SZREG 8
#else #else
# define SZREG 4 # define SZREG 4
@@ -308,7 +308,7 @@ symbol = value
* Use the following macros in assemblercode to load/store registers, * Use the following macros in assemblercode to load/store registers,
* pointers etc. * pointers etc.
*/ */
#if (_MIPS_SIM == _MIPS_SIM_ABI32) #if (SZREG == 4)
# define REG_S sw # define REG_S sw
# define REG_L lw # define REG_L lw
#else #else
@@ -389,7 +389,7 @@ symbol = value
/* /*
* How to add/sub/load/store/shift pointers. * How to add/sub/load/store/shift pointers.
*/ */
#if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZLONG == 32) #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 32)
# define PTR_ADD add # define PTR_ADD add
# define PTR_ADDI addi # define PTR_ADDI addi
# define PTR_ADDU addu # define PTR_ADDU addu
@@ -433,7 +433,7 @@ symbol = value
# define PTR_SCALESHIFT 2 # define PTR_SCALESHIFT 2
#endif #endif
#if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZLONG == 64) \ #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 64 /* o64??? */) \
|| _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_ABI64
# define PTR_ADD dadd # define PTR_ADD dadd
# define PTR_ADDI daddi # define PTR_ADDI daddi
@@ -459,12 +459,13 @@ symbol = value
/* /*
* Some cp0 registers were extended to 64bit for MIPS III. * Some cp0 registers were extended to 64bit for MIPS III.
*/ */
#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
(_MIPS_ISA == _MIPS_ISA_MIPS32)
# define MFC0 mfc0 # define MFC0 mfc0
# define MTC0 mtc0 # define MTC0 mtc0
#endif #endif
#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
(_MIPS_ISA == _MIPS_ISA_MIPS5) (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
# define MFC0 dmfc0 # define MFC0 dmfc0
# define MTC0 dmtc0 # define MTC0 dmtc0
#endif #endif

5
sysdeps/unix/sysv/linux/mips/bits/sigaction.h
View File

@@ -1,5 +1,6 @@
/* The proper definitions for Linux/MIPS's sigaction. /* The proper definitions for Linux/MIPS's sigaction.
Copyright (C) 1993,94,95,97,98,99,2000 Free Software Foundation, Inc. Copyright (C) 1993, 1994, 1995, 1997, 1998, 1999, 2000, 2003
Free Software Foundation, Inc.
This file is part of the GNU C Library. This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or The GNU C Library is free software; you can redistribute it and/or
@@ -49,7 +50,7 @@ struct sigaction
/* Restore handler. */ /* Restore handler. */
void (*sa_restorer) (void); void (*sa_restorer) (void);
#if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 #if _MIPS_SZPTR < 64
int sa_resv[1]; int sa_resv[1];
#endif #endif
}; };

2
sysdeps/unix/sysv/linux/mips/kernel_sigaction.h
View File

@@ -12,7 +12,7 @@ struct old_kernel_sigaction {
/* Abi says here follows reserved int[2] */ /* Abi says here follows reserved int[2] */
void (*sa_restorer)(void); void (*sa_restorer)(void);
#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) #if (_MIPS_SZPTR < 64)
/* /*
* For 32 bit code we have to pad struct sigaction to get * For 32 bit code we have to pad struct sigaction to get
* constant size for the ABI * constant size for the ABI