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Vector expf for x86_64 and tests.
Here is implementation of vectorized expf containing SSE, AVX, AVX2 and AVX512 versions according to Vector ABI <https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>. * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added. * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm redirections for expf. * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files. * sysdeps/x86_64/fpu/Versions: New versions added. * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated. * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added build of SSE, AVX2 and AVX512 IFUNC versions. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: New file. * sysdeps/x86_64/fpu/svml_s_expf16_core.S: New file. * sysdeps/x86_64/fpu/svml_s_expf4_core.S: New file. * sysdeps/x86_64/fpu/svml_s_expf8_core.S: New file. * sysdeps/x86_64/fpu/svml_s_expf8_core_avx.S: New file. * sysdeps/x86_64/fpu/svml_s_expf_data.S: New file. * sysdeps/x86_64/fpu/svml_s_expf_data.h: New file. * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector expf tests. * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise. * NEWS: Mention addition of x86_64 vector expf.
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@ -42,6 +42,8 @@
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# define __DECL_SIMD_logf __DECL_SIMD_x86_64
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# undef __DECL_SIMD_exp
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# define __DECL_SIMD_exp __DECL_SIMD_x86_64
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# undef __DECL_SIMD_expf
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# define __DECL_SIMD_expf __DECL_SIMD_x86_64
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/* Workaround to exclude unnecessary symbol aliases in libmvec
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while GCC creates the vector names based on scalar asm name.
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@ -59,6 +61,10 @@ __asm__ ("_ZGVbN2v___exp_finite = _ZGVbN2v_exp");
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__asm__ ("_ZGVcN4v___exp_finite = _ZGVcN4v_exp");
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__asm__ ("_ZGVdN4v___exp_finite = _ZGVdN4v_exp");
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__asm__ ("_ZGVeN8v___exp_finite = _ZGVeN8v_exp");
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__asm__ ("_ZGVbN4v___expf_finite = _ZGVbN4v_expf");
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__asm__ ("_ZGVcN8v___expf_finite = _ZGVcN8v_expf");
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__asm__ ("_ZGVdN8v___expf_finite = _ZGVdN8v_expf");
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__asm__ ("_ZGVeN16v___expf_finite = _ZGVeN16v_expf");
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# endif
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#endif
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