mirror of
https://git.code.sf.net/p/fuse-emulator/fuse
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To avoid clashes with any similarly named system files (thanks, BogDan Vatra and Sergio Baldoví).
296 lines
8.1 KiB
C
296 lines
8.1 KiB
C
/* speccyboot.c: SpeccyBoot Ethernet emulation
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See http://patrikpersson.github.io/speccyboot/
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Copyright (c) 2009-2016 Patrik Persson, Philip Kendall
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Copyright (c) 2015 Stuart Brady
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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Author contact information:
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E-mail: philip-fuse@shadowmagic.org.uk
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*/
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#include <config.h>
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#include "compat.h"
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#include "debugger/debugger.h"
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#include "infrastructure/startup_manager.h"
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#include "machine.h"
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#include "memory_pages.h"
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#include "nic/enc28j60.h"
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#include "module.h"
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#include "periph.h"
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#include "settings.h"
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#include "unittests/unittests.h"
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#include "speccyboot.h"
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#ifdef BUILD_SPECCYBOOT
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/* Determine whether a bit has gone from high to low (or low to high) */
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#define GONE_LO(prev, curr, mask) (((prev) & (mask)) && !((curr) & (mask)))
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#define GONE_HI(prev, curr, mask) (((curr) & (mask)) && !((prev) & (mask)))
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static nic_enc28j60_t *nic;
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/* ---------------------------------------------------------------------------
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* Spectrum I/O register state (IN/OUT from/to 0x9f)
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* ------------------------------------------------------------------------ */
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/* Individual bits when writing the register (OUT instructions) */
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#define OUT_BIT_SPI_SCK (0x01)
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#define OUT_BIT_ETH_CS (0x08)
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#define OUT_BIT_ROM_CS (0x20)
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#define OUT_BIT_ETH_RST (0x40)
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#define OUT_BIT_SPI_MOSI (0x80)
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static libspectrum_byte out_register_state;
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static libspectrum_byte in_register_state;
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static void
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speccyboot_reset( int hard_reset GCC_UNUSED );
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static void
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speccyboot_memory_map( void );
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static libspectrum_byte
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speccyboot_register_read( libspectrum_word port GCC_UNUSED, libspectrum_byte *attached );
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static void
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speccyboot_register_write( libspectrum_word port GCC_UNUSED,
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libspectrum_byte val );
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static module_info_t speccyboot_module_info = {
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/* .reset = */ speccyboot_reset,
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/* .romcs = */ speccyboot_memory_map,
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/* .snapshot_enabled = */ NULL,
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/* .snapshot_from = */ NULL,
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/* .snapshot_to = */ NULL,
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};
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static const periph_port_t speccyboot_ports[] = {
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{ 0x00e0, 0x0080, speccyboot_register_read, speccyboot_register_write },
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{ 0, 0, NULL, NULL }
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};
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static const periph_t speccyboot_periph = {
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/* .option = */ &settings_current.speccyboot,
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/* .ports = */ speccyboot_ports,
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/* .hard_reset = */ 1,
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/* .activate = */ NULL,
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};
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/* Debugger events */
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static const char * const event_type_string = "speccyboot";
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static int page_event, unpage_event;
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/* ---------------------------------------------------------------------------
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* ROM paging state
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* ------------------------------------------------------------------------ */
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static int speccyboot_rom_active = 0; /* SpeccyBoot ROM paged in? */
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static int speccyboot_memory_source;
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static memory_page speccyboot_memory_map_romcs[ MEMORY_PAGES_IN_8K ];
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static void
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speccyboot_page( void )
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{
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speccyboot_rom_active = 1;
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machine_current->ram.romcs = 1;
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machine_current->memory_map();
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debugger_event( page_event );
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}
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static void
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speccyboot_unpage( void )
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{
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speccyboot_rom_active = 0;
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machine_current->ram.romcs = 0;
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machine_current->memory_map();
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debugger_event( unpage_event );
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}
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static void
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speccyboot_memory_map( void )
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{
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if( !speccyboot_rom_active ) return;
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memory_map_romcs_8k( 0x0000, speccyboot_memory_map_romcs );
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}
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static void
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speccyboot_reset( int hard_reset GCC_UNUSED )
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{
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static int tap_opened = 0;
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speccyboot_rom_active = 0;
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if( !periph_is_active( PERIPH_TYPE_SPECCYBOOT ) )
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return;
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if( machine_load_rom_bank( speccyboot_memory_map_romcs, 0,
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settings_current.rom_speccyboot,
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settings_default.rom_speccyboot, 0x2000 ) )
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return;
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out_register_state = 0xff; /* force transitions to low */
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speccyboot_register_write( 0, 0 );
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/*
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* Open TAP. If this fails, SpeccyBoot emulation won't work.
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*
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* This is done here rather than in speccyboot_init() to ensure any
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* error messages are only displayed if SpeccyBoot emulation is
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* actually requested.
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*/
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if( !tap_opened ) {
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nic_enc28j60_init( nic );
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tap_opened = 1;
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}
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}
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static libspectrum_byte
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speccyboot_register_read( libspectrum_word port GCC_UNUSED, libspectrum_byte *attached )
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{
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*attached = 0xff; /* TODO: check this */
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return in_register_state;
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}
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static void
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speccyboot_register_write( libspectrum_word port GCC_UNUSED,
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libspectrum_byte val )
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{
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nic_enc28j60_poll( nic );
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if( GONE_LO( out_register_state, val, OUT_BIT_ETH_RST ) )
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nic_enc28j60_reset( nic );
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if( !(val & OUT_BIT_ETH_CS) ) {
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if( GONE_LO( out_register_state, val, OUT_BIT_ETH_CS ) )
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nic_enc28j60_set_spi_state( nic, SPI_CMD );
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/*
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* NOTE: the ENC28J60 data sheet (figure 4-2) specifies that MISO
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* is updated when SCK goes low, but we instead set it on the
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* subsequent transition to high. This is to simplify the internal
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* state logic for SPI RBM commands.
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*
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* In this design, we ignore the final SCK transition to low at
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* the end of a transaction. That SCK transition, if occurring at
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* the end of a RBM transaction, would otherwise trigger another
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* read operation, and ERDPT would be increased one time too many.
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*
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* The SpeccyBoot stack reads MISO just after setting SCK high, so
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* it works fine with this simplification.
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*/
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if( GONE_HI( out_register_state, val, OUT_BIT_SPI_SCK ) ) {
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in_register_state = 0xfe | nic_enc28j60_spi_produce_bit( nic );
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nic_enc28j60_spi_consume_bit( nic, (out_register_state & OUT_BIT_SPI_MOSI) ? 1 : 0 );
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}
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}
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/* Update ROM paging status when the ROM_CS bit is cleared or set */
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if( GONE_LO( out_register_state, val, OUT_BIT_ROM_CS ) ) {
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speccyboot_page();
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} else if( GONE_HI( out_register_state, val, OUT_BIT_ROM_CS ) ) {
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speccyboot_unpage();
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}
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out_register_state = val;
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}
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static int
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speccyboot_init( void *context )
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{
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int i;
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nic = nic_enc28j60_alloc();
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module_register( &speccyboot_module_info );
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speccyboot_memory_source = memory_source_register( "SpeccyBoot" );
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for( i = 0; i < MEMORY_PAGES_IN_8K; i++ )
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speccyboot_memory_map_romcs[i].source = speccyboot_memory_source;
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periph_register( PERIPH_TYPE_SPECCYBOOT, &speccyboot_periph );
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periph_register_paging_events( event_type_string, &page_event,
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&unpage_event );
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return 0;
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}
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static void
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speccyboot_end( void )
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{
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nic_enc28j60_free( nic );
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}
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void
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speccyboot_register_startup( void )
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{
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startup_manager_module dependencies[] = {
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STARTUP_MANAGER_MODULE_DEBUGGER,
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STARTUP_MANAGER_MODULE_MEMORY,
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STARTUP_MANAGER_MODULE_SETUID,
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};
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startup_manager_register( STARTUP_MANAGER_MODULE_SPECCYBOOT, dependencies,
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ARRAY_SIZE( dependencies ), speccyboot_init, NULL,
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speccyboot_end );
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}
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int
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speccyboot_unittest( void )
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{
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int r = 0;
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speccyboot_page();
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r += unittests_assert_8k_page( 0x0000, speccyboot_memory_source, 0 );
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r += unittests_assert_8k_page( 0x2000, memory_source_rom, 0 );
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r += unittests_assert_16k_ram_page( 0x4000, 5 );
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r += unittests_assert_16k_ram_page( 0x8000, 2 );
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r += unittests_assert_16k_ram_page( 0xc000, 0 );
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speccyboot_unpage();
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r += unittests_paging_test_48( 2 );
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return r;
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}
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#else /* #ifdef BUILD_SPECCYBOOT */
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/* No speccyboot support */
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void
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speccyboot_register_startup( void )
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{
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}
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int
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speccyboot_unittest( void )
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{
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return 0;
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}
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#endif /* #ifdef BUILD_SPECCYBOOT */
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