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9adb58a3cc
Commit e2809e3a10 added code to a header which assigns a pointer
to void to a pointer to unsigned char. This causes build errors for
extensions written in C++. Fix by adding an explicit cast.
Reviewed-by: Tom Lane <tgl@sss.pgh.pa.us>
Discussion: https://postgr.es/m/CANWCAZaCq9AHBuhs%3DMx7Gg_0Af9oRU7iAqr0itJCtfmsWwVmnQ%40mail.gmail.com
Backpatch-through: 18
166 lines
5.3 KiB
C
166 lines
5.3 KiB
C
/*-------------------------------------------------------------------------
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*
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* pg_crc32c.h
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* Routines for computing CRC-32C checksums.
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*
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* The speed of CRC-32C calculation has a big impact on performance, so we
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* jump through some hoops to get the best implementation for each
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* platform. Some CPU architectures have special instructions for speeding
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* up CRC calculations (e.g. Intel SSE 4.2), on other platforms we use the
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* Slicing-by-8 algorithm which uses lookup tables.
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*
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* The public interface consists of four macros:
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*
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* INIT_CRC32C(crc)
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* Initialize a CRC accumulator
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*
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* COMP_CRC32C(crc, data, len)
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* Accumulate some (more) bytes into a CRC
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*
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* FIN_CRC32C(crc)
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* Finish a CRC calculation
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*
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* EQ_CRC32C(c1, c2)
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* Check for equality of two CRCs.
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*
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* Portions Copyright (c) 1996-2025, PostgreSQL Global Development Group
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* Portions Copyright (c) 1994, Regents of the University of California
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*
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* src/include/port/pg_crc32c.h
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*
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*-------------------------------------------------------------------------
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*/
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#ifndef PG_CRC32C_H
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#define PG_CRC32C_H
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#include "port/pg_bswap.h"
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typedef uint32 pg_crc32c;
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/* The INIT and EQ macros are the same for all implementations. */
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#define INIT_CRC32C(crc) ((crc) = 0xFFFFFFFF)
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#define EQ_CRC32C(c1, c2) ((c1) == (c2))
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#if defined(USE_SSE42_CRC32C)
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/*
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* Use either Intel SSE 4.2 or AVX-512 instructions. We don't need a runtime check
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* for SSE 4.2, so we can inline those in some cases.
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*/
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#include <nmmintrin.h>
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c_dispatch((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c (*pg_comp_crc32c) (pg_crc32c crc, const void *data, size_t len);
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extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t len);
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#ifdef USE_AVX512_CRC32C_WITH_RUNTIME_CHECK
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extern pg_crc32c pg_comp_crc32c_avx512(pg_crc32c crc, const void *data, size_t len);
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#endif
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/*
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* We can only get here if the host compiler targets SSE 4.2, but on some
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* systems gcc and clang don't have the same built-in targets, so we still
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* must use a function attribute here to accommodate "--with-llvm" builds.
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*/
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pg_attribute_no_sanitize_alignment()
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pg_attribute_target("sse4.2")
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static inline
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pg_crc32c
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pg_comp_crc32c_dispatch(pg_crc32c crc, const void *data, size_t len)
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{
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if (__builtin_constant_p(len) && len < 32)
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{
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const unsigned char *p = (const unsigned char *) data;
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/*
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* For small constant inputs, inline the computation to avoid a
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* function call and allow the compiler to unroll loops.
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*/
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#if SIZEOF_VOID_P >= 8
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for (; len >= 8; p += 8, len -= 8)
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crc = _mm_crc32_u64(crc, *(const uint64 *) p);
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#endif
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for (; len >= 4; p += 4, len -= 4)
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crc = _mm_crc32_u32(crc, *(const uint32 *) p);
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for (; len > 0; --len)
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crc = _mm_crc32_u8(crc, *p++);
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return crc;
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}
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else
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/* Otherwise, use a runtime check for AVX-512 instructions. */
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return pg_comp_crc32c(crc, data, len);
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}
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#elif defined(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK)
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/*
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* Use Intel SSE 4.2 or AVX-512 instructions, but perform a runtime check first
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* to check that they are available.
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*/
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len);
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extern PGDLLIMPORT pg_crc32c (*pg_comp_crc32c) (pg_crc32c crc, const void *data, size_t len);
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extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t len);
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#ifdef USE_AVX512_CRC32C_WITH_RUNTIME_CHECK
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extern pg_crc32c pg_comp_crc32c_avx512(pg_crc32c crc, const void *data, size_t len);
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#endif
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#elif defined(USE_ARMV8_CRC32C)
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/* Use ARMv8 CRC Extension instructions. */
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c_armv8((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c pg_comp_crc32c_armv8(pg_crc32c crc, const void *data, size_t len);
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#elif defined(USE_LOONGARCH_CRC32C)
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/* Use LoongArch CRCC instructions. */
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c_loongarch((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c pg_comp_crc32c_loongarch(pg_crc32c crc, const void *data, size_t len);
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#elif defined(USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK)
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/*
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* Use ARMv8 instructions, but perform a runtime check first
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* to check that they are available.
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*/
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len);
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extern pg_crc32c (*pg_comp_crc32c) (pg_crc32c crc, const void *data, size_t len);
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extern pg_crc32c pg_comp_crc32c_armv8(pg_crc32c crc, const void *data, size_t len);
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#else
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/*
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* Use slicing-by-8 algorithm.
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*
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* On big-endian systems, the intermediate value is kept in reverse byte
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* order, to avoid byte-swapping during the calculation. FIN_CRC32C reverses
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* the bytes to the final order.
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*/
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c_sb8((crc), (data), (len)))
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#ifdef WORDS_BIGENDIAN
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#define FIN_CRC32C(crc) ((crc) = pg_bswap32(crc) ^ 0xFFFFFFFF)
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#else
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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#endif
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extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len);
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#endif
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#endif /* PG_CRC32C_H */
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