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Remove configurability of PPC spinlock assembly code.

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Assume that we can use LWARX hint flags and the LWSYNC instruction
on any PPC machine.  The check on the assembler's behavior was only
needed for Apple's old assembler, which is no longer of interest
now that we've de-supported all PPC-era versions of macOS (thanks
to them not having clock_gettime()).  Also, given an up-to-date
assembler these instructions work even on Apple's old hardware.
It seems quite unlikely that anyone would be interested in running
current Postgres on PPC hardware that's so old as to not have
these instructions.

Hence, rip out associated configure test and manual configuration
options, and just use the modernized instructions all the time.
Also, update atomics/arch-ppc.h to use these instructions as well.
(It was already using LWSYNC unconditionally in another place,
providing further proof that nobody is using PG on hardware old
enough to have a problem with that.)

Discussion: https://postgr.es/m/166622.1660323391@sss.pgh.pa.us
This commit is contained in:
Tom Lane
2022-08-13 13:36:39 -04:00
parent adee0df127
commit 8ded65682b
7 changed files with 26 additions and 115 deletions
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26
src/include/pg_config_manual.h
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@@ -227,32 +227,6 @@
*/
#define DEFAULT_EVENT_SOURCE "PostgreSQL"
/*
* On PPC machines, decide whether to use the mutex hint bit in LWARX
* instructions. Setting the hint bit will slightly improve spinlock
* performance on POWER6 and later machines, but does nothing before that,
* and will result in illegal-instruction failures on some pre-POWER4
* machines. By default we use the hint bit when building for 64-bit PPC,
* which should be safe in nearly all cases. You might want to override
* this if you are building 32-bit code for a known-recent PPC machine.
*/
#ifdef HAVE_PPC_LWARX_MUTEX_HINT /* must have assembler support in any case */
#if defined(__ppc64__) || defined(__powerpc64__)
#define USE_PPC_LWARX_MUTEX_HINT
#endif
#endif
/*
* On PPC machines, decide whether to use LWSYNC instructions in place of
* ISYNC and SYNC. This provides slightly better performance, but will
* result in illegal-instruction failures on some pre-POWER4 machines.
* By default we use LWSYNC when building for 64-bit PPC, which should be
* safe in nearly all cases.
*/
#if defined(__ppc64__) || defined(__powerpc64__)
#define USE_PPC_LWSYNC
#endif
/*
* Assumed cache line size. This doesn't affect correctness, but can be used
* for low-level optimizations. Currently, this is used to pad some data