database/postgres
1
0
Fork 0
mirror of https://github.com/postgres/postgres.git synced 2025-08-14 02:22:38 +03:00
Code Activity

Fix typos and grammar in the code

Browse Source 
The large majority of these have been introduced by recent commits done
in the v18 development cycle.

Author: Alexander Lakhin <exclusion@gmail.com>
Discussion: https://postgr.es/m/9a7763ab-5252-429d-a943-b28941e0e28b@gmail.com
This commit is contained in:
Michael Paquier
2025-04-19 19:17:42 +09:00
parent 114f7fa81c
commit 88e947136b
45 changed files with 68 additions and 69 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/backend/access/transam/xlog.c
View File

@@ -473,7 +473,7 @@ typedef struct XLogCtlData
XLogRecPtr InitializedFrom;
/*
* Latest reserved for inititalization page in the cache (last byte
* Latest reserved for initialization page in the cache (last byte
* position + 1).
*
* To change the identity of a buffer, you need to advance
@@ -2221,7 +2221,7 @@ AdvanceXLInsertBuffer(XLogRecPtr upto, TimeLineID tli, bool opportunistic)
* m must observe f[k] == false. Otherwise, it will later attempt
* CAS(v, k, k + 1) with success.
* 4. Therefore, corresponding read_barrier() (while j == k) on
* process m happend before write_barrier() of process k. But then
* process m reached before write_barrier() of process k. But then
* process k attempts CAS(v, k, k + 1) after process m successfully
* incremented v to k, and that CAS operation must succeed.
* That leads to a contradiction. So, there is no such k (k < n)
@@ -2253,7 +2253,7 @@ AdvanceXLInsertBuffer(XLogRecPtr upto, TimeLineID tli, bool opportunistic)
if (pg_atomic_read_u64(&XLogCtl->xlblocks[nextidx]) != NewPageEndPtr)
{
/*
* Page at nextidx wasn't initialized yet, so we cann't move
* Page at nextidx wasn't initialized yet, so we can't move
* InitializedUpto further. It will be moved by backend which
* will initialize nextidx.
*/