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Use native CRC instructions on 64-bit LoongArch
As with the Intel and Arm CRC instructions, compiler intrinsics for them must be supported by the compiler. In contrast, no runtime check is needed. Aligned memory access is faster, so use the Arm coding as a model. YANG Xudong Discussion: https://postgr.es/m/b522a0c5-e3b2-99cc-6387-58134fb88cbe%40ymatrix.cn
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@ -661,3 +661,36 @@ if test x"$Ac_cachevar" = x"yes"; then
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fi
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undefine([Ac_cachevar])dnl
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])# PGAC_ARMV8_CRC32C_INTRINSICS
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# PGAC_LOONGARCH_CRC32C_INTRINSICS
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# ---------------------------
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# Check if the compiler supports the LoongArch CRCC instructions, using
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# __builtin_loongarch_crcc_w_b_w, __builtin_loongarch_crcc_w_h_w,
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# __builtin_loongarch_crcc_w_w_w and __builtin_loongarch_crcc_w_d_w
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# intrinsic functions.
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#
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# We test for the 8-byte variant since platforms capable of running
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# Postgres are 64-bit only (as of PG17), and we know CRC instructions
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# are available there without a runtime check.
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#
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# If the intrinsics are supported, sets pgac_loongarch_crc32c_intrinsics.
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AC_DEFUN([PGAC_LOONGARCH_CRC32C_INTRINSICS],
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[define([Ac_cachevar], [AS_TR_SH([pgac_cv_loongarch_crc32c_intrinsics])])dnl
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AC_CACHE_CHECK(
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[for __builtin_loongarch_crcc_w_b_w, __builtin_loongarch_crcc_w_h_w, __builtin_loongarch_crcc_w_w_w and __builtin_loongarch_crcc_w_d_w],
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[Ac_cachevar],
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[AC_LINK_IFELSE([AC_LANG_PROGRAM([],
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[unsigned int crc = 0;
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crc = __builtin_loongarch_crcc_w_b_w(0, crc);
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crc = __builtin_loongarch_crcc_w_h_w(0, crc);
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crc = __builtin_loongarch_crcc_w_w_w(0, crc);
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crc = __builtin_loongarch_crcc_w_d_w(0, crc);
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/* return computed value, to prevent the above being optimized away */
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return crc == 0;])],
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[Ac_cachevar=yes],
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[Ac_cachevar=no])])
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if test x"$Ac_cachevar" = x"yes"; then
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pgac_loongarch_crc32c_intrinsics=yes
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fi
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undefine([Ac_cachevar])dnl
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])# PGAC_LOONGARCH_CRC32C_INTRINSICS
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