diff --git a/include/my_cpu.h b/include/my_cpu.h
index 05fa937c98d..1f562dc700c 100644
--- a/include/my_cpu.h
+++ b/include/my_cpu.h
@@ -24,6 +24,7 @@
 */
 
 #ifdef _ARCH_PWR8
+#ifdef __GLIBC__
 #include <sys/platform/ppc.h>
 /* Very low priority */
 #define HMT_very_low() __ppc_set_ppr_very_low()
@@ -37,6 +38,18 @@
 #define HMT_medium_high() __ppc_set_ppr_med_high()
 /* High priority */
 #define HMT_high() asm volatile("or 3,3,3")
+#else /* GLIBC */
+#if defined(__FreeBSD__)
+#include <sys/types.h>
+#include <sys/sysctl.h>
+#endif
+#define HMT_very_low() __asm__ volatile ("or 31,31,31")
+#define HMT_low() __asm__ volatile ("or 1,1,1")
+#define HMT_medium_low() __asm__ volatile ("or 6,6,6")
+#define HMT_medium() __asm__ volatile ("or 2,2,2")
+#define HMT_medium_high() __asm__ volatile ("or 5,5,5")
+#define HMT_high() asm volatile("or 3,3,3")
+#endif /* GLIBC */
 #else
 #define HMT_very_low()
 #define HMT_low()
@@ -81,7 +94,13 @@ static inline void MY_RELAX_CPU(void)
   __asm__ __volatile__ ("pause");
 #endif
 #elif defined(_ARCH_PWR8)
-  __ppc_get_timebase();
+#ifdef __FreeBSD__
+  uint64_t __tb;
+  __asm__ volatile ("mfspr %0, 268" : "=r" (__tb));
+#else
+  /* Changed from __ppc_get_timebase for musl compatibility */
+  __builtin_ppc_get_timebase();
+#endif
 #elif defined __GNUC__ && (defined __arm__ || defined __aarch64__)
   /* Mainly, prevent the compiler from optimizing away delay loops */
 #ifdef _aarch64_