Don't ignore null or empty in calculation

primitives/linux-port/column.cpp

@@ -22,6 +22,7 @@
 #include <cassert>
 #include <cmath>
 #include <functional>
+#include <bit>
 #include <type_traits>
 #ifndef _MSC_VER
 #include <pthread.h>
@@ -118,6 +119,24 @@ inline int compareBlock(const void* a, const void* b)
   return ((*(T*)a) - (*(T*)b));
 }
 
+template <class To, class From>
+std::enable_if_t<
+    sizeof(To) == sizeof(From) &&
+    std::is_trivially_copyable_v<From> &&
+    std::is_trivially_copyable_v<To>,
+    To>
+// constexpr support needs compiler magic
+bitCast(const From& src) noexcept
+{
+    static_assert(std::is_trivially_constructible_v<To>,
+        "This implementation additionally requires "
+        "destination type to be trivially constructible");
+
+    To dst;
+    std::memcpy(&dst, &src, sizeof(To));
+    return dst;
+}
+
 // this function is out-of-band, we don't need to inline it
 void logIt(int mid, int arg1, const string& arg2 = string())
 {
@@ -1277,13 +1296,19 @@ inline SIMD_WRAPPER_TYPE simdSwapedOrderDataLoad(const ColRequestHeaderDataType
 }
 
 template <typename VT, typename SimdType>
-void vectorizedUpdateMinMax(const bool validMinMax, const MT nonNullOrEmptyMask, VT& simdProcessor,
+void vectorizedUpdateMinMax(const bool validMinMax, const MT nonNullOrEmptyMask, VT simdProcessor,
                             SimdType& dataVec, SimdType& simdMin, SimdType& simdMax)
 {
-  if (validMinMax && nonNullOrEmptyMask)
+  if (validMinMax)
   {
-    simdMin = simdProcessor.min(simdMin, dataVec);
-    simdMax = simdProcessor.max(simdMax, dataVec);
+    simdMin = simdProcessor.blend(
+        simdMin, dataVec,
+        simdProcessor.bwAnd(simdProcessor.cmpGt2(simdMin, dataVec),
+                            bitCast<SimdType>(simd::bitMaskToByteMask16(nonNullOrEmptyMask))));
+    simdMax = simdProcessor.blend(
+        simdMax, dataVec,
+        simdProcessor.bwAnd(simdProcessor.cmpGt2(dataVec, simdMax),
+                            bitCast<SimdType>(simd::bitMaskToByteMask16(nonNullOrEmptyMask))));
   }
 }
 
@@ -1304,7 +1329,7 @@ void scalarUpdateMinMax(const bool validMinMax, const MT nonNullOrEmptyMask, VT&
 }
 
 template<typename T, typename VT, typename SimdType>
-void extractMinMax(VT& simdProcessor, SimdType& simdMin, SimdType& simdMax, T& min, T& max)
+void extractMinMax(VT& simdProcessor, SimdType simdMin, SimdType simdMax, T& min, T& max)
 {
   constexpr const uint16_t size = VT::vecByteSize / sizeof(T);
   T* simdMinVec = reinterpret_cast<T*>(&simdMin);
@@ -1312,6 +1337,13 @@ void extractMinMax(VT& simdProcessor, SimdType& simdMin, SimdType& simdMax, T& m
   max = *std::max_element(simdMaxVec, simdMaxVec + size);
   min = *std::min_element(simdMinVec, simdMinVec + size);
 }
+
+template <typename T, typename VT, typename SimdType>
+void getInitialSimdMinMax(VT& simdProcessor, SimdType& simdMin, SimdType& simdMax, T min, T max)
+{
+  simdMin = simdProcessor.loadValue(min);
+  simdMax = simdProcessor.loadValue(max);
+}
 // This routine filters input block in a vectorized manner.
 // It supports all output types, all input types.
 // It doesn't support KIND==TEXT so upper layers filters this KIND out beforehand.
@@ -1447,9 +1479,12 @@ void vectorizedFiltering(NewColRequestHeader* in, ColResultHeader* out, const T*
       }
     }
   }
-  [[maybe_unused]] SimdType simdMin = simdDataLoad<VT, SimdWrapperType, HAS_INPUT_RIDS, T>(simdProcessor, srcArray,
-      origSrcArray, ridArray, 0).v;;
-  [[maybe_unused]] SimdType simdMax = simdMin;
+  [[maybe_unused]] SimdType simdMin;
+  [[maybe_unused]] SimdType simdMax;
+  if constexpr (KIND != KIND_TEXT)
+  {
+    getInitialSimdMinMax(simdProcessor, simdMin, simdMax, min, max);
+  }
   // main loop
   // writeMask tells which values must get into the result. Includes values that matches filters. Can have
   // NULLs. nonEmptyMask tells which vector coords are not EMPTY magics. nonNullMask tells which vector coords

tests/col1block.h

@@ -500,5 +500,5 @@ unsigned char __col1block_cdf[] = {
     0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, 0xf0,
     0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff};
 unsigned int __col1block_cdf_len = 8192;
-constexpr int __col1block_cdf_umin = -128;
+constexpr int __col1block_cdf_umin = -126;
 constexpr int __col1block_cdf_umax = 127;

tests/simd_processors.cpp

@@ -37,19 +37,22 @@
 using namespace std;
 
 template <typename T>
-class SimdProcessorTypedTest : public testing::Test {
-public:
+class SimdProcessorTypedTest : public testing::Test
+{
+ public:
   using IntegralType = T;
-  #if TESTS_USING_SSE
-    using SimdType = std::conditional_t<std::is_same<T, float>::value,
-                                        simd::vi128f_wr,
-                                        std::conditional_t<std::is_same<T, double>::value,
-                                                           simd::vi128d_wr,
-                                                           simd::vi128_wr>>;
-    using Proc = typename simd::SimdFilterProcessor<SimdType, T>;
-    #else
-    using Proc = typename simd::SimdFilterProcessor<typename simd::TypeToVecWrapperType<T>::WrapperType, T>;
-  #endif
+#if TESTS_USING_SSE
+  using SimdType =
+      std::conditional_t<std::is_same<T, float>::value, simd::vi128f_wr,
+                         std::conditional_t<std::is_same<T, double>::value, simd::vi128d_wr, simd::vi128_wr>>;
+  using Proc = typename simd::SimdFilterProcessor<SimdType, T>;
+#else
+  using SimdType =
+      std::conditional_t<std::is_same<T, float>::value, simd::vi128f_wr,
+                         std::conditional_t<std::is_same<T, double>::value, simd::vi128d_wr,
+                                            typename simd::TypeToVecWrapperType<T>::WrapperType>>;
+  using Proc = typename simd::SimdFilterProcessor<SimdType, T>;
+#endif
   void SetUp() override
   {
   }