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Don't ignore null or empty in calculation
This commit is contained in:
@ -22,6 +22,7 @@
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#include <cassert>
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#include <cmath>
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#include <functional>
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#include <bit>
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#include <type_traits>
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#ifndef _MSC_VER
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#include <pthread.h>
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@ -1295,13 +1296,19 @@ inline SIMD_WRAPPER_TYPE simdSwapedOrderDataLoad(const ColRequestHeaderDataType
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}
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template <typename VT, typename SimdType>
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void vectorizedUpdateMinMax(const bool validMinMax, const MT nonNullOrEmptyMask, VT& simdProcessor,
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void vectorizedUpdateMinMax(const bool validMinMax, const MT nonNullOrEmptyMask, VT simdProcessor,
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SimdType& dataVec, SimdType& simdMin, SimdType& simdMax)
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{
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if (validMinMax && nonNullOrEmptyMask)
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if (validMinMax)
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{
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simdMin = simdProcessor.min(simdMin, dataVec);
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simdMax = simdProcessor.max(simdMax, dataVec);
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simdMin = simdProcessor.blend(
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simdMin, dataVec,
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simdProcessor.bwAnd(simdProcessor.cmpGt2(simdMin, dataVec),
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bitCast<SimdType>(simd::bitMaskToByteMask16(nonNullOrEmptyMask))));
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simdMax = simdProcessor.blend(
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simdMax, dataVec,
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simdProcessor.bwAnd(simdProcessor.cmpGt2(dataVec, simdMax),
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bitCast<SimdType>(simd::bitMaskToByteMask16(nonNullOrEmptyMask))));
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}
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}
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@ -1322,7 +1329,7 @@ void scalarUpdateMinMax(const bool validMinMax, const MT nonNullOrEmptyMask, VT&
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}
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template<typename T, typename VT, typename SimdType>
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void extractMinMax(VT& simdProcessor, SimdType& simdMin, SimdType& simdMax, T& min, T& max)
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void extractMinMax(VT& simdProcessor, SimdType simdMin, SimdType simdMax, T& min, T& max)
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{
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constexpr const uint16_t size = VT::vecByteSize / sizeof(T);
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T* simdMinVec = reinterpret_cast<T*>(&simdMin);
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@ -1330,6 +1337,13 @@ void extractMinMax(VT& simdProcessor, SimdType& simdMin, SimdType& simdMax, T& m
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max = *std::max_element(simdMaxVec, simdMaxVec + size);
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min = *std::min_element(simdMinVec, simdMinVec + size);
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}
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template <typename T, typename VT, typename SimdType>
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void getInitialSimdMinMax(VT& simdProcessor, SimdType& simdMin, SimdType& simdMax, T min, T max)
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{
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simdMin = simdProcessor.loadValue(min);
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simdMax = simdProcessor.loadValue(max);
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}
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// This routine filters input block in a vectorized manner.
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// It supports all output types, all input types.
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// It doesn't support KIND==TEXT so upper layers filters this KIND out beforehand.
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@ -1465,9 +1479,12 @@ void vectorizedFiltering(NewColRequestHeader* in, ColResultHeader* out, const T*
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}
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}
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}
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[[maybe_unused]] SimdType simdMin = simdDataLoad<VT, SimdWrapperType, HAS_INPUT_RIDS, T>(simdProcessor, srcArray,
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origSrcArray, ridArray, 0).v;;
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[[maybe_unused]] SimdType simdMax = simdMin;
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[[maybe_unused]] SimdType simdMin;
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[[maybe_unused]] SimdType simdMax;
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if constexpr (KIND != KIND_TEXT)
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{
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getInitialSimdMinMax(simdProcessor, simdMin, simdMax, min, max);
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}
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// main loop
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// writeMask tells which values must get into the result. Includes values that matches filters. Can have
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// NULLs. nonEmptyMask tells which vector coords are not EMPTY magics. nonNullMask tells which vector coords
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@ -500,5 +500,5 @@ unsigned char __col1block_cdf[] = {
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0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, 0xf0,
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0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff};
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unsigned int __col1block_cdf_len = 8192;
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constexpr int __col1block_cdf_umin = -128;
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constexpr int __col1block_cdf_umin = -126;
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constexpr int __col1block_cdf_umax = 127;
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@ -37,19 +37,22 @@
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using namespace std;
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template <typename T>
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class SimdProcessorTypedTest : public testing::Test {
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public:
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class SimdProcessorTypedTest : public testing::Test
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{
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public:
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using IntegralType = T;
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#if TESTS_USING_SSE
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using SimdType = std::conditional_t<std::is_same<T, float>::value,
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simd::vi128f_wr,
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std::conditional_t<std::is_same<T, double>::value,
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simd::vi128d_wr,
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simd::vi128_wr>>;
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#if TESTS_USING_SSE
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using SimdType =
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std::conditional_t<std::is_same<T, float>::value, simd::vi128f_wr,
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std::conditional_t<std::is_same<T, double>::value, simd::vi128d_wr, simd::vi128_wr>>;
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using Proc = typename simd::SimdFilterProcessor<SimdType, T>;
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#else
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using Proc = typename simd::SimdFilterProcessor<typename simd::TypeToVecWrapperType<T>::WrapperType, T>;
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#endif
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#else
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using SimdType =
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std::conditional_t<std::is_same<T, float>::value, simd::vi128f_wr,
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std::conditional_t<std::is_same<T, double>::value, simd::vi128d_wr,
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typename simd::TypeToVecWrapperType<T>::WrapperType>>;
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using Proc = typename simd::SimdFilterProcessor<SimdType, T>;
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#endif
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void SetUp() override
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{
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}
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@ -250,17 +250,30 @@ class SimdFilterProcessor<
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return x;
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return x;
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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return x;
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return reinterpret_cast<SimdType>(std::min(reinterpret_cast<int128_t>(x), reinterpret_cast<int128_t>(y)));
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return reinterpret_cast<SimdType>(std::max(reinterpret_cast<int128_t>(x), reinterpret_cast<int128_t>(y)));
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}
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};
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template <typename VT, typename T>
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@ -376,15 +389,30 @@ class SimdFilterProcessor<
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_mm_storeu_pd(reinterpret_cast<T*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return _mm_min_pd(x, y);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return _mm_max_pd(x, y);
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}
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_pd(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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return _mm_cmpgt_pd(x, y);
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_and_pd(x, y);
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}
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};
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template <typename VT, typename T>
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@ -500,15 +528,30 @@ class SimdFilterProcessor<
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_mm_storeu_ps(reinterpret_cast<T*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return _mm_min_ps(x, y);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return _mm_max_ps(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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return _mm_cmpgt_ps(x, y);
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}
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_ps(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_and_ps(x, y);
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}
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};
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template <typename VT, typename CHECK_T>
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@ -617,14 +660,29 @@ class SimdFilterProcessor<VT, CHECK_T,
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_epi8(x, y, _mm_cmpgt_epi64(x,y));
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return _mm_blendv_epi8(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_blendv_epi8(x, y, _mm_cmpgt_epi64(y,x));
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return _mm_and_si128(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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return _mm_cmpgt_epi64(x, y);
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return blend(x, y, cmpGt2(x,y));
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}
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return blend(x, y, cmpGt2(y,x));
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}
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};
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@ -737,14 +795,32 @@ class SimdFilterProcessor<VT, CHECK_T,
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_epi8(x, y, _mm_cmpgt_epi64(x,y));
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return _mm_blendv_epi8(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_blendv_epi8(x, y, _mm_cmpgt_epi64(y,x));
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return _mm_and_si128(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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SimdType signVec = constant4i<0,(int32_t)0x80000000,0,(int32_t)0x80000000>();
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SimdType xFlip = _mm_xor_si128(x, signVec);
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SimdType yFlip = _mm_xor_si128(y, signVec);
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return _mm_cmpgt_epi64(xFlip, yFlip);
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return blend(x, y, cmpGt2(x,y));
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}
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return blend(x, y, cmpGt2(y,x));
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}
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};
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@ -854,12 +930,27 @@ class SimdFilterProcessor<VT, CHECK_T,
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_epi8(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_and_si128(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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return _mm_cmpgt_epi32(x, y);
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return _mm_min_epi32(x, y);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return _mm_max_epi32(x, y);
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}
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@ -974,12 +1065,30 @@ class SimdFilterProcessor<VT, CHECK_T,
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_epi8(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_and_si128(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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SimdType signVec = constant4i<(int32_t)0x80000000,(int32_t)0x80000000,(int32_t)0x80000000,(int32_t)0x80000000>();
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SimdType xFlip = _mm_xor_si128(x, signVec);
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SimdType yFlip = _mm_xor_si128(y, signVec);
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return _mm_cmpgt_epi32(xFlip, yFlip);
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return _mm_min_epu32(x, y);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return _mm_max_epu32(x, y);
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}
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@ -1090,12 +1199,27 @@ class SimdFilterProcessor<
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_epi8(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_and_si128(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
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{
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return _mm_cmpgt_epi16(x, y);
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return _mm_min_epi16(x, y);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
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{
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return _mm_max_epi16(x, y);
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}
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@ -1207,12 +1331,30 @@ class SimdFilterProcessor<
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_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
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}
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MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
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MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
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{
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return _mm_blendv_epi8(x, y, mask);
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}
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MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
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{
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return _mm_and_si128(x, y);
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}
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MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y)
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{
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SimdType ones =
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constant4i<(int32_t)0xFFFFFFFF, (int32_t)0xFFFFFFFF, (int32_t)0xFFFFFFFF, (int32_t)0xFFFFFFFF>();
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SimdType maxOfTwo = _mm_max_epu16(x, y);
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return _mm_xor_si128(_mm_cmpeq_epi16(y, maxOfTwo), ones);
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}
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MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
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{
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return _mm_min_epu16(x, y);
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}
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MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
|
||||
MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_max_epu16(x, y);
|
||||
}
|
||||
@ -1330,12 +1472,27 @@ class SimdFilterProcessor<
|
||||
_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
|
||||
MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
|
||||
{
|
||||
return _mm_blendv_epi8(x, y, mask);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_and_si128(x, y);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_cmpgt_epi8(x, y);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_min_epi8(x, y);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
|
||||
MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_max_epi8(x, y);
|
||||
}
|
||||
@ -1454,12 +1611,30 @@ class SimdFilterProcessor<
|
||||
_mm_storeu_si128(reinterpret_cast<SimdType*>(dst), x);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType min(SimdType& x, SimdType& y)
|
||||
MCS_FORCE_INLINE SimdType blend(SimdType x, SimdType y, SimdType mask) const
|
||||
{
|
||||
return _mm_blendv_epi8(x, y, mask);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType bwAnd(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_and_si128(x, y);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType cmpGt2(SimdType x, SimdType y)
|
||||
{
|
||||
SimdType ones =
|
||||
constant4i<(int32_t)0xFFFFFFFF, (int32_t)0xFFFFFFFF, (int32_t)0xFFFFFFFF, (int32_t)0xFFFFFFFF>();
|
||||
SimdType maxOfTwo = _mm_max_epu8(x, y);
|
||||
return _mm_xor_si128(_mm_cmpeq_epi8(y, maxOfTwo), ones);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType min(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_min_epu8(x, y);
|
||||
}
|
||||
|
||||
MCS_FORCE_INLINE SimdType max(SimdType& x, SimdType& y)
|
||||
MCS_FORCE_INLINE SimdType max(SimdType x, SimdType y) const
|
||||
{
|
||||
return _mm_max_epu8(x, y);
|
||||
}
|
||||
|
Reference in New Issue
Block a user