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Update .hex and .lst files for pre-built targets

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This commit is contained in:
westfw
2014-08-14 02:00:36 -07:00
parent c51c792997
commit 452fdbedf8
15 changed files with 2446 additions and 2393 deletions
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79
optiboot/bootloaders/optiboot/optiboot_atmega1280.hex
View File

@@ -1,42 +1,43 @@
:020000021000EC :020000021000EC
:10FC0000112484B714BE81FD01C00CD185E080931E :10FC0000112494B714BE892F8D7011F0892F0ED155
:10FC1000810082E08093C00088E18093C10086E08B :10FC100085E08093810082E08093C00088E180933A
:10FC20008093C20080E18093C4008EE0E5D0279AE3 :10FC2000C10086E08093C20080E18093C4008EE032
:10FC300086E020E33CEF91E0309385002093840040 :10FC3000E7D0279A86E020E33CEF91E030938500FF
:10FC400096BBB09BFECF1F9AA8958150A9F7CC24F4 :10FC40002093840096BBB09BFECF1F9AA89581504D
:10FC5000DD248824839425E0A22E91E1992EC0D042 :10FC5000A9F7CC24DD248824839425E0A22E91E109
:10FC6000813461F4BDD0182FCDD0123851F1113844 :10FC6000992EC2D0813471F4BFD0182FCFD0123862
:10FC700011F486E001C083E0ABD0A7C0823411F458 :10FC700011F481E005C0113811F486E001C083E081
:10FC800084E103C0853419F485E0C4D09EC0853575 :10FC8000ABD0A7C0823411F484E103C0853419F4E9
:10FC9000A1F4A6D0082F10E0A3D0E82EFF24FE2C5C :10FC900085E0C4D09EC08535A1F4A6D0082F10E021
:10FCA000EE24E02AF12A8F2D881F8827881F8BBF1A :10FCA000A3D0E82EFF24FE2CEE24E02AF12A8F2D8B
:10FCB000EE0CFF1CA7D0670188C0863521F484E0D4 :10FCB000881F8827881F8BBFEE0CFF1CA7D0670109
:10FCC000A9D080E0D9CF843609F052C089D090E025 :10FCC00088C0863521F484E0A9D080E0D9CF84367D
:10FCD000182F002785D090E0082B192B81D0B82E43 :10FCD00009F052C089D090E0182F002785D090E01D
:10FCE000E801E12CA2E0FA2E7BD0F70181937F019D :10FCE000082B192B81D0B82EE801E12CA2E0FA2EC6
:10FCF0002197D1F787D0F5E4BF1689F4E601E12C0E :10FCF0007BD0F70181937F012197D1F787D0F5E47D
:10FD0000F2E0FF2E08C0CE012196F70161917F013C :10FD0000BF1689F4E601E12CF2E0FF2E08C0CE0117
:10FD100097D00150104001151105A9F756C083E096 :10FD10002196F70161917F0197D0015010400115A4
:10FD2000F60187BFE89507B600FCFDCFB801A60134 :10FD20001105A9F756C083E0F60187BFE89507B62D
:10FD3000A0E0B2E02C9130E011968C91119790E008 :10FD300000FCFDCFB801A601A0E0B2E02C9130E0BC
:10FD4000982F8827822B932B1296FA010C0187BEDD :10FD400011968C91119790E0982F8827822B932BF6
:10FD5000E89511244E5F5F4F6250704059F7F601ED :10FD50001296FA010C0187BEE89511244E5F5F4FA1
:10FD6000A7BEE89507B600FCFDCF97BEE8952DC06D :10FD60006250704059F7F601A7BEE89507B600FC4F
:10FD70008437F1F435D090E0D82FCC2731D090E003 :10FD7000FDCF97BEE8952DC08437F1F435D090E0E3
:10FD8000C82BD92B2DD0182F3DD0153449F486011E :10FD8000D82FCC2731D090E0C82BD92B2DD0182FCD
:10FD9000C8010F5F1F4F4CD01BD02197C9F715C06A :10FD90003DD0153449F48601C8010F5F1F4F4CD088
:10FDA0008601F80187918F0113D02197D1F70DC0FB :10FDA0001BD02197C9F715C08601F80187918F01F3
:10FDB000853731F427D08EE10BD087E909D05BCFAE :10FDB00013D02197D1F70DC0853731F427D08EE1CC
:10FDC000813511F488E018D01DD080E101D047CFF3 :10FDC0000BD087E909D05BCF813511F488E018D0DA
:10FDD000982F8091C00085FFFCCF9093C6000895B6 :10FDD0001DD080E101D045CF982F8091C00085FFD4
:10FDE0008091C00087FFFCCF8091C00084FD01C0DE :10FDE000FCCF9093C60008958091C00087FFFCCFA0
:10FDF000A8958091C6000895E0E6F0E098E1908330 :10FDF0008091C00084FD01C0A8958091C60008953F
:10FE000080830895EDDF803219F088E0F5DFFFCFC1 :10FE0000E0E6F0E098E1908380830895EDDF8032B2
:10FE100084E1DECF1F93182FE3DF1150E9F7F2DF03 :10FE100019F088E0F5DFFFCF84E1DECF1F93182FC4
:10FE20001F910895282E80E0E7DFEE27FF27099431 :10FE2000E3DF1150E9F7F2DF1F910895282E80E0FB
:10FE3000F999FECF92BD81BDF89A992780B50895B2 :10FE3000E7DFEE27FF270994F999FECF92BD81BD38
:10FE4000262FF999FECF1FBA92BD81BD20BD0FB6F6 :10FE4000F89A992780B50895262FF999FECF1FBA01
:0CFE5000F894FA9AF99A0FBE01960895F2 :10FE500092BD81BD20BD0FB6F894FA9AF99A0FBEF3
:02FFFE000006FB :04FE6000019608956A
:02FFFE000106FA
:040000031000FC00ED :040000031000FC00ED
:00000001FF :00000001FF

648
optiboot/bootloaders/optiboot/optiboot_atmega1280.lst
View File

@@ -3,31 +3,31 @@ optiboot_atmega1280.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 0000025c 0001fc00 0001fc00 00000074 2**1 0 .text 00000264 0001fc00 0001fc00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 0001fffe 0001fffe 000002d0 2**0 1 .version 00000002 0001fffe 0001fffe 000002d8 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .stab 00000180 00000000 00000000 000002d4 2**2 2 .stab 00000180 00000000 00000000 000002dc 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .stabstr 000000bb 00000000 00000000 00000454 2**0 3 .stabstr 000000bb 00000000 00000000 0000045c 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_aranges 00000028 00000000 00000000 0000050f 2**0 4 .debug_aranges 00000028 00000000 00000000 00000517 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_pubnames 00000074 00000000 00000000 00000537 2**0 5 .debug_pubnames 00000074 00000000 00000000 0000053f 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_info 000003df 00000000 00000000 000005ab 2**0 6 .debug_info 000003e4 00000000 00000000 000005b3 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_abbrev 000001ea 00000000 00000000 0000098a 2**0 7 .debug_abbrev 000001f1 00000000 00000000 00000997 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_line 0000044b 00000000 00000000 00000b74 2**0 8 .debug_line 0000045b 00000000 00000000 00000b88 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_frame 00000080 00000000 00000000 00000fc0 2**2 9 .debug_frame 00000080 00000000 00000000 00000fe4 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_str 00000172 00000000 00000000 00001040 2**0 10 .debug_str 00000172 00000000 00000000 00001064 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
11 .debug_loc 000003b3 00000000 00000000 000011b2 2**0 11 .debug_loc 000003b3 00000000 00000000 000011d6 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 000000d0 00000000 00000000 00001565 2**0 12 .debug_ranges 000000d0 00000000 00000000 00001589 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -40,640 +40,646 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
1fc00: 11 24 eor r1, r1 1fc00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
1fc02: 84 b7 in r24, 0x34 ; 52 1fc02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
1fc04: 14 be out 0x34, r1 ; 52 1fc04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
1fc06: 81 fd sbrc r24, 1 1fc06: 89 2f mov r24, r25
1fc08: 01 c0 rjmp .+2 ; 0x1fc0c <main+0xc> 1fc08: 8d 70 andi r24, 0x0D ; 13
1fc0a: 0c d1 rcall .+536 ; 0x1fe24 <appStart> 1fc0a: 11 f0 breq .+4 ; 0x1fc10 <main+0x10>
appStart(ch);
1fc0c: 89 2f mov r24, r25
1fc0e: 0e d1 rcall .+540 ; 0x1fe2c <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
1fc0c: 85 e0 ldi r24, 0x05 ; 5 1fc10: 85 e0 ldi r24, 0x05 ; 5
1fc0e: 80 93 81 00 sts 0x0081, r24 1fc12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
1fc12: 82 e0 ldi r24, 0x02 ; 2 1fc16: 82 e0 ldi r24, 0x02 ; 2
1fc14: 80 93 c0 00 sts 0x00C0, r24 1fc18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
1fc18: 88 e1 ldi r24, 0x18 ; 24 1fc1c: 88 e1 ldi r24, 0x18 ; 24
1fc1a: 80 93 c1 00 sts 0x00C1, r24 1fc1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
1fc1e: 86 e0 ldi r24, 0x06 ; 6 1fc22: 86 e0 ldi r24, 0x06 ; 6
1fc20: 80 93 c2 00 sts 0x00C2, r24 1fc24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
1fc24: 80 e1 ldi r24, 0x10 ; 16 1fc28: 80 e1 ldi r24, 0x10 ; 16
1fc26: 80 93 c4 00 sts 0x00C4, r24 1fc2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
1fc2a: 8e e0 ldi r24, 0x0E ; 14 1fc2e: 8e e0 ldi r24, 0x0E ; 14
1fc2c: e5 d0 rcall .+458 ; 0x1fdf8 <watchdogConfig> 1fc30: e7 d0 rcall .+462 ; 0x1fe00 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
1fc2e: 27 9a sbi 0x04, 7 ; 4 1fc32: 27 9a sbi 0x04, 7 ; 4
1fc30: 86 e0 ldi r24, 0x06 ; 6 1fc34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
1fc32: 20 e3 ldi r18, 0x30 ; 48 1fc36: 20 e3 ldi r18, 0x30 ; 48
1fc34: 3c ef ldi r19, 0xFC ; 252 1fc38: 3c ef ldi r19, 0xFC ; 252
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
1fc36: 91 e0 ldi r25, 0x01 ; 1 1fc3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
1fc38: 30 93 85 00 sts 0x0085, r19 1fc3c: 30 93 85 00 sts 0x0085, r19
1fc3c: 20 93 84 00 sts 0x0084, r18 1fc40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
1fc40: 96 bb out 0x16, r25 ; 22 1fc44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
1fc42: b0 9b sbis 0x16, 0 ; 22 1fc46: b0 9b sbis 0x16, 0 ; 22
1fc44: fe cf rjmp .-4 ; 0x1fc42 <main+0x42> 1fc48: fe cf rjmp .-4 ; 0x1fc46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
1fc46: 1f 9a sbi 0x03, 7 ; 3 1fc4a: 1f 9a sbi 0x03, 7 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
1fc48: a8 95 wdr 1fc4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
1fc4a: 81 50 subi r24, 0x01 ; 1 1fc4e: 81 50 subi r24, 0x01 ; 1
1fc4c: a9 f7 brne .-22 ; 0x1fc38 <main+0x38> 1fc50: a9 f7 brne .-22 ; 0x1fc3c <main+0x3c>
1fc4e: cc 24 eor r12, r12 1fc52: cc 24 eor r12, r12
1fc50: dd 24 eor r13, r13 1fc54: dd 24 eor r13, r13
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
1fc52: 88 24 eor r8, r8 1fc56: 88 24 eor r8, r8
1fc54: 83 94 inc r8 1fc58: 83 94 inc r8
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
1fc56: 25 e0 ldi r18, 0x05 ; 5 1fc5a: 25 e0 ldi r18, 0x05 ; 5
1fc58: a2 2e mov r10, r18 1fc5c: a2 2e mov r10, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
1fc5a: 91 e1 ldi r25, 0x11 ; 17 1fc5e: 91 e1 ldi r25, 0x11 ; 17
1fc5c: 99 2e mov r9, r25 1fc60: 99 2e mov r9, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
1fc5e: c0 d0 rcall .+384 ; 0x1fde0 <getch> 1fc62: c2 d0 rcall .+388 ; 0x1fde8 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
1fc60: 81 34 cpi r24, 0x41 ; 65 1fc64: 81 34 cpi r24, 0x41 ; 65
1fc62: 61 f4 brne .+24 ; 0x1fc7c <main+0x7c> 1fc66: 71 f4 brne .+28 ; 0x1fc84 <main+0x84>
unsigned char which = getch(); unsigned char which = getch();
1fc64: bd d0 rcall .+378 ; 0x1fde0 <getch> 1fc68: bf d0 rcall .+382 ; 0x1fde8 <getch>
1fc66: 18 2f mov r17, r24 1fc6a: 18 2f mov r17, r24
verifySpace(); verifySpace();
1fc68: cd d0 rcall .+410 ; 0x1fe04 <verifySpace> 1fc6c: cf d0 rcall .+414 ; 0x1fe0c <verifySpace>
if (which == 0x82) {
1fc6a: 12 38 cpi r17, 0x82 ; 130
1fc6c: 51 f1 breq .+84 ; 0x1fcc2 <main+0xc2>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
} else if (which == 0x81) { 1fc6e: 12 38 cpi r17, 0x82 ; 130
1fc6e: 11 38 cpi r17, 0x81 ; 129
1fc70: 11 f4 brne .+4 ; 0x1fc76 <main+0x76> 1fc70: 11 f4 brne .+4 ; 0x1fc76 <main+0x76>
putch(OPTIBOOT_MAJVER); putch(optiboot_version & 0xFF);
1fc72: 86 e0 ldi r24, 0x06 ; 6 1fc72: 81 e0 ldi r24, 0x01 ; 1
1fc74: 01 c0 rjmp .+2 ; 0x1fc78 <main+0x78> 1fc74: 05 c0 rjmp .+10 ; 0x1fc80 <main+0x80>
} else if (which == 0x81) {
1fc76: 11 38 cpi r17, 0x81 ; 129
1fc78: 11 f4 brne .+4 ; 0x1fc7e <main+0x7e>
putch(optiboot_version >> 8);
1fc7a: 86 e0 ldi r24, 0x06 ; 6
1fc7c: 01 c0 rjmp .+2 ; 0x1fc80 <main+0x80>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
1fc76: 83 e0 ldi r24, 0x03 ; 3 1fc7e: 83 e0 ldi r24, 0x03 ; 3
1fc78: ab d0 rcall .+342 ; 0x1fdd0 <putch> 1fc80: ab d0 rcall .+342 ; 0x1fdd8 <putch>
1fc7a: a7 c0 rjmp .+334 ; 0x1fdca <main+0x1ca> 1fc82: a7 c0 rjmp .+334 ; 0x1fdd2 <main+0x1d2>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
1fc7c: 82 34 cpi r24, 0x42 ; 66 1fc84: 82 34 cpi r24, 0x42 ; 66
1fc7e: 11 f4 brne .+4 ; 0x1fc84 <main+0x84> 1fc86: 11 f4 brne .+4 ; 0x1fc8c <main+0x8c>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
1fc80: 84 e1 ldi r24, 0x14 ; 20 1fc88: 84 e1 ldi r24, 0x14 ; 20
1fc82: 03 c0 rjmp .+6 ; 0x1fc8a <main+0x8a> 1fc8a: 03 c0 rjmp .+6 ; 0x1fc92 <main+0x92>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
1fc84: 85 34 cpi r24, 0x45 ; 69 1fc8c: 85 34 cpi r24, 0x45 ; 69
1fc86: 19 f4 brne .+6 ; 0x1fc8e <main+0x8e> 1fc8e: 19 f4 brne .+6 ; 0x1fc96 <main+0x96>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
1fc88: 85 e0 ldi r24, 0x05 ; 5 1fc90: 85 e0 ldi r24, 0x05 ; 5
1fc8a: c4 d0 rcall .+392 ; 0x1fe14 <getNch> 1fc92: c4 d0 rcall .+392 ; 0x1fe1c <getNch>
1fc8c: 9e c0 rjmp .+316 ; 0x1fdca <main+0x1ca> 1fc94: 9e c0 rjmp .+316 ; 0x1fdd2 <main+0x1d2>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
1fc8e: 85 35 cpi r24, 0x55 ; 85 1fc96: 85 35 cpi r24, 0x55 ; 85
1fc90: a1 f4 brne .+40 ; 0x1fcba <main+0xba> 1fc98: a1 f4 brne .+40 ; 0x1fcc2 <main+0xc2>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
1fc92: a6 d0 rcall .+332 ; 0x1fde0 <getch> 1fc9a: a6 d0 rcall .+332 ; 0x1fde8 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
1fc94: 08 2f mov r16, r24 1fc9c: 08 2f mov r16, r24
1fc96: 10 e0 ldi r17, 0x00 ; 0 1fc9e: 10 e0 ldi r17, 0x00 ; 0
1fc98: a3 d0 rcall .+326 ; 0x1fde0 <getch> 1fca0: a3 d0 rcall .+326 ; 0x1fde8 <getch>
1fc9a: e8 2e mov r14, r24 1fca2: e8 2e mov r14, r24
1fc9c: ff 24 eor r15, r15 1fca4: ff 24 eor r15, r15
1fc9e: fe 2c mov r15, r14 1fca6: fe 2c mov r15, r14
1fca0: ee 24 eor r14, r14 1fca8: ee 24 eor r14, r14
1fca2: e0 2a or r14, r16 1fcaa: e0 2a or r14, r16
1fca4: f1 2a or r15, r17 1fcac: f1 2a or r15, r17
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
1fca6: 8f 2d mov r24, r15 1fcae: 8f 2d mov r24, r15
1fca8: 88 1f adc r24, r24 1fcb0: 88 1f adc r24, r24
1fcaa: 88 27 eor r24, r24 1fcb2: 88 27 eor r24, r24
1fcac: 88 1f adc r24, r24 1fcb4: 88 1f adc r24, r24
1fcae: 8b bf out 0x3b, r24 ; 59 1fcb6: 8b bf out 0x3b, r24 ; 59
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
1fcb0: ee 0c add r14, r14 1fcb8: ee 0c add r14, r14
1fcb2: ff 1c adc r15, r15 1fcba: ff 1c adc r15, r15
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
1fcb4: a7 d0 rcall .+334 ; 0x1fe04 <verifySpace> 1fcbc: a7 d0 rcall .+334 ; 0x1fe0c <verifySpace>
1fcb6: 67 01 movw r12, r14 1fcbe: 67 01 movw r12, r14
1fcb8: 88 c0 rjmp .+272 ; 0x1fdca <main+0x1ca> 1fcc0: 88 c0 rjmp .+272 ; 0x1fdd2 <main+0x1d2>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
1fcba: 86 35 cpi r24, 0x56 ; 86 1fcc2: 86 35 cpi r24, 0x56 ; 86
1fcbc: 21 f4 brne .+8 ; 0x1fcc6 <main+0xc6> 1fcc4: 21 f4 brne .+8 ; 0x1fcce <main+0xce>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
1fcbe: 84 e0 ldi r24, 0x04 ; 4 1fcc6: 84 e0 ldi r24, 0x04 ; 4
1fcc0: a9 d0 rcall .+338 ; 0x1fe14 <getNch> 1fcc8: a9 d0 rcall .+338 ; 0x1fe1c <getNch>
putch(0x00); putch(0x00);
1fcc2: 80 e0 ldi r24, 0x00 ; 0 1fcca: 80 e0 ldi r24, 0x00 ; 0
1fcc4: d9 cf rjmp .-78 ; 0x1fc78 <main+0x78> 1fccc: d9 cf rjmp .-78 ; 0x1fc80 <main+0x80>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
1fcc6: 84 36 cpi r24, 0x64 ; 100 1fcce: 84 36 cpi r24, 0x64 ; 100
1fcc8: 09 f0 breq .+2 ; 0x1fccc <main+0xcc> 1fcd0: 09 f0 breq .+2 ; 0x1fcd4 <main+0xd4>
1fcca: 52 c0 rjmp .+164 ; 0x1fd70 <main+0x170> 1fcd2: 52 c0 rjmp .+164 ; 0x1fd78 <main+0x178>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
1fccc: 89 d0 rcall .+274 ; 0x1fde0 <getch> 1fcd4: 89 d0 rcall .+274 ; 0x1fde8 <getch>
1fcce: 90 e0 ldi r25, 0x00 ; 0
1fcd0: 18 2f mov r17, r24
1fcd2: 00 27 eor r16, r16
length |= getch();
1fcd4: 85 d0 rcall .+266 ; 0x1fde0 <getch>
1fcd6: 90 e0 ldi r25, 0x00 ; 0 1fcd6: 90 e0 ldi r25, 0x00 ; 0
1fcd8: 08 2b or r16, r24 1fcd8: 18 2f mov r17, r24
1fcda: 19 2b or r17, r25 1fcda: 00 27 eor r16, r16
length |= getch();
1fcdc: 85 d0 rcall .+266 ; 0x1fde8 <getch>
1fcde: 90 e0 ldi r25, 0x00 ; 0
1fce0: 08 2b or r16, r24
1fce2: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
1fcdc: 81 d0 rcall .+258 ; 0x1fde0 <getch> 1fce4: 81 d0 rcall .+258 ; 0x1fde8 <getch>
1fcde: b8 2e mov r11, r24 1fce6: b8 2e mov r11, r24
1fce0: e8 01 movw r28, r16 1fce8: e8 01 movw r28, r16
1fce2: e1 2c mov r14, r1 1fcea: e1 2c mov r14, r1
1fce4: a2 e0 ldi r26, 0x02 ; 2 1fcec: a2 e0 ldi r26, 0x02 ; 2
1fce6: fa 2e mov r15, r26 1fcee: fa 2e mov r15, r26
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
1fce8: 7b d0 rcall .+246 ; 0x1fde0 <getch> 1fcf0: 7b d0 rcall .+246 ; 0x1fde8 <getch>
1fcea: f7 01 movw r30, r14 1fcf2: f7 01 movw r30, r14
1fcec: 81 93 st Z+, r24 1fcf4: 81 93 st Z+, r24
1fcee: 7f 01 movw r14, r30 1fcf6: 7f 01 movw r14, r30
while (--length); while (--length);
1fcf0: 21 97 sbiw r28, 0x01 ; 1 1fcf8: 21 97 sbiw r28, 0x01 ; 1
1fcf2: d1 f7 brne .-12 ; 0x1fce8 <main+0xe8> 1fcfa: d1 f7 brne .-12 ; 0x1fcf0 <main+0xf0>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
1fcf4: 87 d0 rcall .+270 ; 0x1fe04 <verifySpace> 1fcfc: 87 d0 rcall .+270 ; 0x1fe0c <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
1fcf6: f5 e4 ldi r31, 0x45 ; 69 1fcfe: f5 e4 ldi r31, 0x45 ; 69
1fcf8: bf 16 cp r11, r31 1fd00: bf 16 cp r11, r31
1fcfa: 89 f4 brne .+34 ; 0x1fd1e <main+0x11e> 1fd02: 89 f4 brne .+34 ; 0x1fd26 <main+0x126>
1fcfc: e6 01 movw r28, r12 1fd04: e6 01 movw r28, r12
1fcfe: e1 2c mov r14, r1 1fd06: e1 2c mov r14, r1
1fd00: f2 e0 ldi r31, 0x02 ; 2 1fd08: f2 e0 ldi r31, 0x02 ; 2
1fd02: ff 2e mov r15, r31 1fd0a: ff 2e mov r15, r31
1fd04: 08 c0 rjmp .+16 ; 0x1fd16 <main+0x116> 1fd0c: 08 c0 rjmp .+16 ; 0x1fd1e <main+0x11e>
1fd06: ce 01 movw r24, r28 1fd0e: ce 01 movw r24, r28
case 'E': // EEPROM case 'E': // EEPROM
#if defined(SUPPORT_EEPROM) || defined(BIGBOOT) #if defined(SUPPORT_EEPROM) || defined(BIGBOOT)
while(len--) { while(len--) {
eeprom_write_byte((uint8_t *)(address++), *mybuff++); eeprom_write_byte((uint8_t *)(address++), *mybuff++);
1fd08: 21 96 adiw r28, 0x01 ; 1 1fd10: 21 96 adiw r28, 0x01 ; 1
1fd0a: f7 01 movw r30, r14 1fd12: f7 01 movw r30, r14
1fd0c: 61 91 ld r22, Z+ 1fd14: 61 91 ld r22, Z+
1fd0e: 7f 01 movw r14, r30 1fd16: 7f 01 movw r14, r30
1fd10: 97 d0 rcall .+302 ; 0x1fe40 <__eewr_byte_m1280> 1fd18: 97 d0 rcall .+302 ; 0x1fe48 <__eewr_byte_m1280>
1fd12: 01 50 subi r16, 0x01 ; 1 1fd1a: 01 50 subi r16, 0x01 ; 1
1fd14: 10 40 sbci r17, 0x00 ; 0 1fd1c: 10 40 sbci r17, 0x00 ; 0
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
case 'E': // EEPROM case 'E': // EEPROM
#if defined(SUPPORT_EEPROM) || defined(BIGBOOT) #if defined(SUPPORT_EEPROM) || defined(BIGBOOT)
while(len--) { while(len--) {
1fd16: 01 15 cp r16, r1 1fd1e: 01 15 cp r16, r1
1fd18: 11 05 cpc r17, r1 1fd20: 11 05 cpc r17, r1
1fd1a: a9 f7 brne .-22 ; 0x1fd06 <main+0x106> 1fd22: a9 f7 brne .-22 ; 0x1fd0e <main+0x10e>
1fd1c: 56 c0 rjmp .+172 ; 0x1fdca <main+0x1ca> 1fd24: 56 c0 rjmp .+172 ; 0x1fdd2 <main+0x1d2>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
1fd1e: 83 e0 ldi r24, 0x03 ; 3 1fd26: 83 e0 ldi r24, 0x03 ; 3
1fd20: f6 01 movw r30, r12 1fd28: f6 01 movw r30, r12
1fd22: 87 bf out 0x37, r24 ; 55 1fd2a: 87 bf out 0x37, r24 ; 55
1fd24: e8 95 spm 1fd2c: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
1fd26: 07 b6 in r0, 0x37 ; 55 1fd2e: 07 b6 in r0, 0x37 ; 55
1fd28: 00 fc sbrc r0, 0 1fd30: 00 fc sbrc r0, 0
1fd2a: fd cf rjmp .-6 ; 0x1fd26 <main+0x126> 1fd32: fd cf rjmp .-6 ; 0x1fd2e <main+0x12e>
1fd2c: b8 01 movw r22, r16 1fd34: b8 01 movw r22, r16
1fd2e: a6 01 movw r20, r12 1fd36: a6 01 movw r20, r12
1fd30: a0 e0 ldi r26, 0x00 ; 0 1fd38: a0 e0 ldi r26, 0x00 ; 0
1fd32: b2 e0 ldi r27, 0x02 ; 2 1fd3a: b2 e0 ldi r27, 0x02 ; 2
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
1fd34: 2c 91 ld r18, X 1fd3c: 2c 91 ld r18, X
1fd36: 30 e0 ldi r19, 0x00 ; 0 1fd3e: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
1fd38: 11 96 adiw r26, 0x01 ; 1 1fd40: 11 96 adiw r26, 0x01 ; 1
1fd3a: 8c 91 ld r24, X 1fd42: 8c 91 ld r24, X
1fd3c: 11 97 sbiw r26, 0x01 ; 1 1fd44: 11 97 sbiw r26, 0x01 ; 1
1fd3e: 90 e0 ldi r25, 0x00 ; 0 1fd46: 90 e0 ldi r25, 0x00 ; 0
1fd40: 98 2f mov r25, r24 1fd48: 98 2f mov r25, r24
1fd42: 88 27 eor r24, r24 1fd4a: 88 27 eor r24, r24
1fd44: 82 2b or r24, r18 1fd4c: 82 2b or r24, r18
1fd46: 93 2b or r25, r19 1fd4e: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
1fd48: 12 96 adiw r26, 0x02 ; 2 1fd50: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
1fd4a: fa 01 movw r30, r20 1fd52: fa 01 movw r30, r20
1fd4c: 0c 01 movw r0, r24 1fd54: 0c 01 movw r0, r24
1fd4e: 87 be out 0x37, r8 ; 55 1fd56: 87 be out 0x37, r8 ; 55
1fd50: e8 95 spm 1fd58: e8 95 spm
1fd52: 11 24 eor r1, r1 1fd5a: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
1fd54: 4e 5f subi r20, 0xFE ; 254 1fd5c: 4e 5f subi r20, 0xFE ; 254
1fd56: 5f 4f sbci r21, 0xFF ; 255 1fd5e: 5f 4f sbci r21, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
1fd58: 62 50 subi r22, 0x02 ; 2 1fd60: 62 50 subi r22, 0x02 ; 2
1fd5a: 70 40 sbci r23, 0x00 ; 0 1fd62: 70 40 sbci r23, 0x00 ; 0
1fd5c: 59 f7 brne .-42 ; 0x1fd34 <main+0x134> 1fd64: 59 f7 brne .-42 ; 0x1fd3c <main+0x13c>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
1fd5e: f6 01 movw r30, r12 1fd66: f6 01 movw r30, r12
1fd60: a7 be out 0x37, r10 ; 55 1fd68: a7 be out 0x37, r10 ; 55
1fd62: e8 95 spm 1fd6a: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
1fd64: 07 b6 in r0, 0x37 ; 55 1fd6c: 07 b6 in r0, 0x37 ; 55
1fd66: 00 fc sbrc r0, 0 1fd6e: 00 fc sbrc r0, 0
1fd68: fd cf rjmp .-6 ; 0x1fd64 <main+0x164> 1fd70: fd cf rjmp .-6 ; 0x1fd6c <main+0x16c>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
1fd6a: 97 be out 0x37, r9 ; 55 1fd72: 97 be out 0x37, r9 ; 55
1fd6c: e8 95 spm 1fd74: e8 95 spm
1fd6e: 2d c0 rjmp .+90 ; 0x1fdca <main+0x1ca> 1fd76: 2d c0 rjmp .+90 ; 0x1fdd2 <main+0x1d2>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
1fd70: 84 37 cpi r24, 0x74 ; 116 1fd78: 84 37 cpi r24, 0x74 ; 116
1fd72: f1 f4 brne .+60 ; 0x1fdb0 <main+0x1b0> 1fd7a: f1 f4 brne .+60 ; 0x1fdb8 <main+0x1b8>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
1fd74: 35 d0 rcall .+106 ; 0x1fde0 <getch> 1fd7c: 35 d0 rcall .+106 ; 0x1fde8 <getch>
1fd76: 90 e0 ldi r25, 0x00 ; 0
1fd78: d8 2f mov r29, r24
1fd7a: cc 27 eor r28, r28
length |= getch();
1fd7c: 31 d0 rcall .+98 ; 0x1fde0 <getch>
1fd7e: 90 e0 ldi r25, 0x00 ; 0 1fd7e: 90 e0 ldi r25, 0x00 ; 0
1fd80: c8 2b or r28, r24 1fd80: d8 2f mov r29, r24
1fd82: d9 2b or r29, r25 1fd82: cc 27 eor r28, r28
length |= getch();
1fd84: 31 d0 rcall .+98 ; 0x1fde8 <getch>
1fd86: 90 e0 ldi r25, 0x00 ; 0
1fd88: c8 2b or r28, r24
1fd8a: d9 2b or r29, r25
desttype = getch(); desttype = getch();
1fd84: 2d d0 rcall .+90 ; 0x1fde0 <getch> 1fd8c: 2d d0 rcall .+90 ; 0x1fde8 <getch>
1fd86: 18 2f mov r17, r24 1fd8e: 18 2f mov r17, r24
verifySpace(); verifySpace();
1fd88: 3d d0 rcall .+122 ; 0x1fe04 <verifySpace> 1fd90: 3d d0 rcall .+122 ; 0x1fe0c <verifySpace>
static inline void read_mem(uint8_t memtype, uint16_t address, uint16_t length) static inline void read_mem(uint8_t memtype, uint16_t address, uint16_t length)
{ {
uint8_t ch; uint8_t ch;
switch (memtype) { switch (memtype) {
1fd8a: 15 34 cpi r17, 0x45 ; 69 1fd92: 15 34 cpi r17, 0x45 ; 69
1fd8c: 49 f4 brne .+18 ; 0x1fda0 <main+0x1a0> 1fd94: 49 f4 brne .+18 ; 0x1fda8 <main+0x1a8>
1fd8e: 86 01 movw r16, r12 1fd96: 86 01 movw r16, r12
1fd90: c8 01 movw r24, r16 1fd98: c8 01 movw r24, r16
#if defined(SUPPORT_EEPROM) || defined(BIGBOOT) #if defined(SUPPORT_EEPROM) || defined(BIGBOOT)
case 'E': // EEPROM case 'E': // EEPROM
do { do {
putch(eeprom_read_byte((uint8_t *)(address++))); putch(eeprom_read_byte((uint8_t *)(address++)));
1fd92: 0f 5f subi r16, 0xFF ; 255 1fd9a: 0f 5f subi r16, 0xFF ; 255
1fd94: 1f 4f sbci r17, 0xFF ; 255 1fd9c: 1f 4f sbci r17, 0xFF ; 255
1fd96: 4c d0 rcall .+152 ; 0x1fe30 <__eerd_byte_m1280> 1fd9e: 4c d0 rcall .+152 ; 0x1fe38 <__eerd_byte_m1280>
1fd98: 1b d0 rcall .+54 ; 0x1fdd0 <putch> 1fda0: 1b d0 rcall .+54 ; 0x1fdd8 <putch>
} while (--length); } while (--length);
1fd9a: 21 97 sbiw r28, 0x01 ; 1 1fda2: 21 97 sbiw r28, 0x01 ; 1
1fd9c: c9 f7 brne .-14 ; 0x1fd90 <main+0x190> 1fda4: c9 f7 brne .-14 ; 0x1fd98 <main+0x198>
1fd9e: 15 c0 rjmp .+42 ; 0x1fdca <main+0x1ca> 1fda6: 15 c0 rjmp .+42 ; 0x1fdd2 <main+0x1d2>
1fda0: 86 01 movw r16, r12 1fda8: 86 01 movw r16, r12
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
1fda2: f8 01 movw r30, r16 1fdaa: f8 01 movw r30, r16
1fda4: 87 91 elpm r24, Z+ 1fdac: 87 91 elpm r24, Z+
1fda6: 8f 01 movw r16, r30 1fdae: 8f 01 movw r16, r30
1fda8: 13 d0 rcall .+38 ; 0x1fdd0 <putch> 1fdb0: 13 d0 rcall .+38 ; 0x1fdd8 <putch>
} while (--length); } while (--length);
1fdaa: 21 97 sbiw r28, 0x01 ; 1 1fdb2: 21 97 sbiw r28, 0x01 ; 1
1fdac: d1 f7 brne .-12 ; 0x1fda2 <main+0x1a2> 1fdb4: d1 f7 brne .-12 ; 0x1fdaa <main+0x1aa>
1fdae: 0d c0 rjmp .+26 ; 0x1fdca <main+0x1ca> 1fdb6: 0d c0 rjmp .+26 ; 0x1fdd2 <main+0x1d2>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
1fdb0: 85 37 cpi r24, 0x75 ; 117 1fdb8: 85 37 cpi r24, 0x75 ; 117
1fdb2: 31 f4 brne .+12 ; 0x1fdc0 <main+0x1c0> 1fdba: 31 f4 brne .+12 ; 0x1fdc8 <main+0x1c8>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
1fdb4: 27 d0 rcall .+78 ; 0x1fe04 <verifySpace> 1fdbc: 27 d0 rcall .+78 ; 0x1fe0c <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
1fdb6: 8e e1 ldi r24, 0x1E ; 30 1fdbe: 8e e1 ldi r24, 0x1E ; 30
1fdb8: 0b d0 rcall .+22 ; 0x1fdd0 <putch> 1fdc0: 0b d0 rcall .+22 ; 0x1fdd8 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
1fdba: 87 e9 ldi r24, 0x97 ; 151 1fdc2: 87 e9 ldi r24, 0x97 ; 151
1fdbc: 09 d0 rcall .+18 ; 0x1fdd0 <putch> 1fdc4: 09 d0 rcall .+18 ; 0x1fdd8 <putch>
1fdbe: 5b cf rjmp .-330 ; 0x1fc76 <main+0x76> 1fdc6: 5b cf rjmp .-330 ; 0x1fc7e <main+0x7e>
putch(SIGNATURE_2); putch(SIGNATURE_2);
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
1fdc0: 81 35 cpi r24, 0x51 ; 81 1fdc8: 81 35 cpi r24, 0x51 ; 81
1fdc2: 11 f4 brne .+4 ; 0x1fdc8 <main+0x1c8> 1fdca: 11 f4 brne .+4 ; 0x1fdd0 <main+0x1d0>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
1fdc4: 88 e0 ldi r24, 0x08 ; 8 1fdcc: 88 e0 ldi r24, 0x08 ; 8
1fdc6: 18 d0 rcall .+48 ; 0x1fdf8 <watchdogConfig> 1fdce: 18 d0 rcall .+48 ; 0x1fe00 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
1fdc8: 1d d0 rcall .+58 ; 0x1fe04 <verifySpace> 1fdd0: 1d d0 rcall .+58 ; 0x1fe0c <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
1fdca: 80 e1 ldi r24, 0x10 ; 16 1fdd2: 80 e1 ldi r24, 0x10 ; 16
1fdcc: 01 d0 rcall .+2 ; 0x1fdd0 <putch> 1fdd4: 01 d0 rcall .+2 ; 0x1fdd8 <putch>
1fdce: 47 cf rjmp .-370 ; 0x1fc5e <main+0x5e> 1fdd6: 45 cf rjmp .-374 ; 0x1fc62 <main+0x62>
0001fdd0 <putch>: 0001fdd8 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
1fdd0: 98 2f mov r25, r24 1fdd8: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
1fdd2: 80 91 c0 00 lds r24, 0x00C0 1fdda: 80 91 c0 00 lds r24, 0x00C0
1fdd6: 85 ff sbrs r24, 5 1fdde: 85 ff sbrs r24, 5
1fdd8: fc cf rjmp .-8 ; 0x1fdd2 <putch+0x2> 1fde0: fc cf rjmp .-8 ; 0x1fdda <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
1fdda: 90 93 c6 00 sts 0x00C6, r25 1fde2: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
1fdde: 08 95 ret 1fde6: 08 95 ret
0001fde0 <getch>: 0001fde8 <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
1fde0: 80 91 c0 00 lds r24, 0x00C0 1fde8: 80 91 c0 00 lds r24, 0x00C0
1fde4: 87 ff sbrs r24, 7 1fdec: 87 ff sbrs r24, 7
1fde6: fc cf rjmp .-8 ; 0x1fde0 <getch> 1fdee: fc cf rjmp .-8 ; 0x1fde8 <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
1fde8: 80 91 c0 00 lds r24, 0x00C0 1fdf0: 80 91 c0 00 lds r24, 0x00C0
1fdec: 84 fd sbrc r24, 4 1fdf4: 84 fd sbrc r24, 4
1fdee: 01 c0 rjmp .+2 ; 0x1fdf2 <getch+0x12> 1fdf6: 01 c0 rjmp .+2 ; 0x1fdfa <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
1fdf0: a8 95 wdr 1fdf8: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
1fdf2: 80 91 c6 00 lds r24, 0x00C6 1fdfa: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
1fdf6: 08 95 ret 1fdfe: 08 95 ret
0001fdf8 <watchdogConfig>: 0001fe00 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
1fdf8: e0 e6 ldi r30, 0x60 ; 96 1fe00: e0 e6 ldi r30, 0x60 ; 96
1fdfa: f0 e0 ldi r31, 0x00 ; 0 1fe02: f0 e0 ldi r31, 0x00 ; 0
1fdfc: 98 e1 ldi r25, 0x18 ; 24 1fe04: 98 e1 ldi r25, 0x18 ; 24
1fdfe: 90 83 st Z, r25 1fe06: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
1fe00: 80 83 st Z, r24 1fe08: 80 83 st Z, r24
} }
1fe02: 08 95 ret 1fe0a: 08 95 ret
0001fe04 <verifySpace>: 0001fe0c <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
1fe04: ed df rcall .-38 ; 0x1fde0 <getch> 1fe0c: ed df rcall .-38 ; 0x1fde8 <getch>
1fe06: 80 32 cpi r24, 0x20 ; 32 1fe0e: 80 32 cpi r24, 0x20 ; 32
1fe08: 19 f0 breq .+6 ; 0x1fe10 <verifySpace+0xc> 1fe10: 19 f0 breq .+6 ; 0x1fe18 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
1fe0a: 88 e0 ldi r24, 0x08 ; 8 1fe12: 88 e0 ldi r24, 0x08 ; 8
1fe0c: f5 df rcall .-22 ; 0x1fdf8 <watchdogConfig> 1fe14: f5 df rcall .-22 ; 0x1fe00 <watchdogConfig>
1fe0e: ff cf rjmp .-2 ; 0x1fe0e <verifySpace+0xa> 1fe16: ff cf rjmp .-2 ; 0x1fe16 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
1fe10: 84 e1 ldi r24, 0x14 ; 20 1fe18: 84 e1 ldi r24, 0x14 ; 20
} }
1fe12: de cf rjmp .-68 ; 0x1fdd0 <putch> 1fe1a: de cf rjmp .-68 ; 0x1fdd8 <putch>
0001fe14 <getNch>: 0001fe1c <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
1fe14: 1f 93 push r17 1fe1c: 1f 93 push r17
1fe16: 18 2f mov r17, r24 1fe1e: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
1fe18: e3 df rcall .-58 ; 0x1fde0 <getch> 1fe20: e3 df rcall .-58 ; 0x1fde8 <getch>
1fe1a: 11 50 subi r17, 0x01 ; 1 1fe22: 11 50 subi r17, 0x01 ; 1
1fe1c: e9 f7 brne .-6 ; 0x1fe18 <getNch+0x4> 1fe24: e9 f7 brne .-6 ; 0x1fe20 <getNch+0x4>
verifySpace(); verifySpace();
1fe1e: f2 df rcall .-28 ; 0x1fe04 <verifySpace> 1fe26: f2 df rcall .-28 ; 0x1fe0c <verifySpace>
} }
1fe20: 1f 91 pop r17 1fe28: 1f 91 pop r17
1fe22: 08 95 ret 1fe2a: 08 95 ret
0001fe24 <appStart>: 0001fe2c <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
1fe24: 28 2e mov r2, r24 1fe2c: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
1fe26: 80 e0 ldi r24, 0x00 ; 0 1fe2e: 80 e0 ldi r24, 0x00 ; 0
1fe28: e7 df rcall .-50 ; 0x1fdf8 <watchdogConfig> 1fe30: e7 df rcall .-50 ; 0x1fe00 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
1fe2a: ee 27 eor r30, r30 1fe32: ee 27 eor r30, r30
1fe2c: ff 27 eor r31, r31 1fe34: ff 27 eor r31, r31
1fe2e: 09 94 ijmp 1fe36: 09 94 ijmp
0001fe30 <__eerd_byte_m1280>: 0001fe38 <__eerd_byte_m1280>:
1fe30: f9 99 sbic 0x1f, 1 ; 31 1fe38: f9 99 sbic 0x1f, 1 ; 31
1fe32: fe cf rjmp .-4 ; 0x1fe30 <__eerd_byte_m1280> 1fe3a: fe cf rjmp .-4 ; 0x1fe38 <__eerd_byte_m1280>
1fe34: 92 bd out 0x22, r25 ; 34 1fe3c: 92 bd out 0x22, r25 ; 34
1fe36: 81 bd out 0x21, r24 ; 33 1fe3e: 81 bd out 0x21, r24 ; 33
1fe38: f8 9a sbi 0x1f, 0 ; 31 1fe40: f8 9a sbi 0x1f, 0 ; 31
1fe3a: 99 27 eor r25, r25 1fe42: 99 27 eor r25, r25
1fe3c: 80 b5 in r24, 0x20 ; 32 1fe44: 80 b5 in r24, 0x20 ; 32
1fe3e: 08 95 ret 1fe46: 08 95 ret
0001fe40 <__eewr_byte_m1280>: 0001fe48 <__eewr_byte_m1280>:
1fe40: 26 2f mov r18, r22 1fe48: 26 2f mov r18, r22
0001fe42 <__eewr_r18_m1280>: 0001fe4a <__eewr_r18_m1280>:
1fe42: f9 99 sbic 0x1f, 1 ; 31 1fe4a: f9 99 sbic 0x1f, 1 ; 31
1fe44: fe cf rjmp .-4 ; 0x1fe42 <__eewr_r18_m1280> 1fe4c: fe cf rjmp .-4 ; 0x1fe4a <__eewr_r18_m1280>
1fe46: 1f ba out 0x1f, r1 ; 31 1fe4e: 1f ba out 0x1f, r1 ; 31
1fe48: 92 bd out 0x22, r25 ; 34 1fe50: 92 bd out 0x22, r25 ; 34
1fe4a: 81 bd out 0x21, r24 ; 33 1fe52: 81 bd out 0x21, r24 ; 33
1fe4c: 20 bd out 0x20, r18 ; 32 1fe54: 20 bd out 0x20, r18 ; 32
1fe4e: 0f b6 in r0, 0x3f ; 63 1fe56: 0f b6 in r0, 0x3f ; 63
1fe50: f8 94 cli 1fe58: f8 94 cli
1fe52: fa 9a sbi 0x1f, 2 ; 31 1fe5a: fa 9a sbi 0x1f, 2 ; 31
1fe54: f9 9a sbi 0x1f, 1 ; 31 1fe5c: f9 9a sbi 0x1f, 1 ; 31
1fe56: 0f be out 0x3f, r0 ; 63 1fe5e: 0f be out 0x3f, r0 ; 63
1fe58: 01 96 adiw r24, 0x01 ; 1 1fe60: 01 96 adiw r24, 0x01 ; 1
1fe5a: 08 95 ret 1fe62: 08 95 ret

66
optiboot/bootloaders/optiboot/optiboot_atmega328.hex
View File

@@ -1,35 +1,35 @@
:107E0000112484B714BE81FD01C0EDD085E08093BC :107E0000112494B714BE892F8D7011F0892FEFD0F3
:107E1000810082E08093C00088E18093C10086E009 :107E100085E08093810082E08093C00088E18093B8
:107E20008093C20080E18093C4008EE0C6D0259A82 :107E2000C10086E08093C20080E18093C4008EE0B0
:107E300086E020E33CEF91E03093850020938400BE :107E3000C8D0259A86E020E33CEF91E0309385009E
:107E400096BBB09BFECF1D9AA8958150A9F7AA2496 :107E40002093840096BBB09BFECF1D9AA8958150CD
:107E5000BB2433E0832E7724739425E0922E91E1A6 :107E5000A9F7AA24BB2433E0832E7724739425E06A
:107E6000C92E9FD0813461F49CD0182FACD0123829 :107E6000922E91E1C92EA1D0813471F49ED0182FA9
:107E700029F1113811F486E001C083E08AD086C070 :107E7000AED0123811F481E005C0113811F486E05B
:107E8000823411F484E103C0853419F485E0A3D071 :107E800001C083E08AD086C0823411F484E103C04B
:107E90007DC0853579F485D0E82EFF2482D0082F67 :107E9000853419F485E0A3D07DC0853579F485D08B
:107EA00010E0102F00270E291F29000F111F8BD063 :107EA000E82EFF2482D0082F10E0102F00270E2983
:107EB00058016CC0863521F484E08DD080E0DECF9F :107EB0001F29000F111F8BD058016CC0863521F48B
:107EC000843609F041C06DD090E0182F002769D0AA :107EC00084E08DD080E0DECF843609F041C06DD0F3
:107ED00090E0082B192B65D0D82EE801E12CF1E0B9 :107ED00090E0182F002769D090E0082B192B65D06F
:107EE000FF2E5FD0F70181937F012197D1F76BD0EF :107EE000D82EE801E12CF1E0FF2E5FD0F70181935D
:107EF000F5E4DF1609F4FFCFF50187BEE89507B674 :107EF0007F012197D1F76BD0F5E4DF1609F4FFCFAE
:107F000000FCFDCFB501A801A0E0B1E02C9130E06C :107F0000F50187BEE89507B600FCFDCFB501A801D5
:107F100011968C91119790E0982F8827822B932BA4 :107F1000A0E0B1E02C9130E011968C91119790E0A7
:107F20001296FB010C0177BEE89511246E5F7F4F1E :107F2000982F8827822B932B1296FB010C0177BE8A
:107F30004250504059F7F50197BEE89507B600FC4E :107F3000E89511246E5F7F4F4250504059F7F5018C
:107F4000FDCFC7BEE89522C0843791F42AD090E0D7 :107F400097BEE89507B600FCFDCFC7BEE89522C0F6
:107F5000D82FCC2726D090E0C82BD92B22D033D0D5 :107F5000843791F42AD090E0D82FCC2726D090E017
:107F60008501F80185918F0114D02197D1F70EC0BA :107F6000C82BD92B22D033D08501F80185918F0100
:107F7000853739F428D08EE10CD085E90AD08FE01E :107F700014D02197D1F70EC0853739F428D08EE17F
:107F80007DCF813511F488E018D01DD080E101D07B :107F80000CD085E90AD08FE07DCF813511F488E0EF
:107F900068CF982F8091C00085FFFCCF9093C600DA :107F900018D01DD080E101D066CF982F8091C0000D
:107FA00008958091C00087FFFCCF8091C00084FDC0 :107FA00085FFFCCF9093C60008958091C00087FFA5
:107FB00001C0A8958091C6000895E0E6F0E098E140 :107FB000FCCF8091C00084FD01C0A8958091C600CF
:107FC000908380830895EDDF803219F088E0F5DF3B :107FC0000895E0E6F0E098E1908380830895EDDF86
:107FD000FFCF84E1DECF1F93182FE3DF1150E9F7C5 :107FD000803219F088E0F5DFFFCF84E1DECF1F9318
:107FE000F2DF1F910895282E80E0E7DFEE27FF27BC :107FE000182FE3DF1150E9F7F2DF1F910895282ED3
:027FF0000994F2 :0A7FF00080E0E7DFEE27FF27099489
:027FFE0000067B :027FFE0001067A
:0400000300007E007B :0400000300007E007B
:00000001FF :00000001FF

532
optiboot/bootloaders/optiboot/optiboot_atmega328.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega328.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f2 00007e00 00007e00 00000074 2**1 0 .text 000001fa 00007e00 00007e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00007ffe 00007ffe 00000266 2**0 1 .version 00000002 00007ffe 00007ffe 0000026e 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000268 2**0 2 .debug_aranges 00000028 00000000 00000000 00000270 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 00000290 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000298 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000304 2**0 4 .debug_info 000003e0 00000000 00000000 0000030c 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006df 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 0000042b 00000000 00000000 000008c9 2**0 6 .debug_line 0000043b 00000000 00000000 000008dd 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cf4 2**2 7 .debug_frame 00000080 00000000 00000000 00000d18 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d74 2**0 8 .debug_str 00000172 00000000 00000000 00000d98 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ee6 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f0a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011bd 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011e1 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,565 +36,571 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
7e00: 11 24 eor r1, r1 7e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
7e02: 84 b7 in r24, 0x34 ; 52 7e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
7e04: 14 be out 0x34, r1 ; 52 7e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
7e06: 81 fd sbrc r24, 1 7e06: 89 2f mov r24, r25
7e08: 01 c0 rjmp .+2 ; 0x7e0c <main+0xc> 7e08: 8d 70 andi r24, 0x0D ; 13
7e0a: ed d0 rcall .+474 ; 0x7fe6 <appStart> 7e0a: 11 f0 breq .+4 ; 0x7e10 <main+0x10>
appStart(ch);
7e0c: 89 2f mov r24, r25
7e0e: ef d0 rcall .+478 ; 0x7fee <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
7e0c: 85 e0 ldi r24, 0x05 ; 5 7e10: 85 e0 ldi r24, 0x05 ; 5
7e0e: 80 93 81 00 sts 0x0081, r24 7e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
7e12: 82 e0 ldi r24, 0x02 ; 2 7e16: 82 e0 ldi r24, 0x02 ; 2
7e14: 80 93 c0 00 sts 0x00C0, r24 7e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
7e18: 88 e1 ldi r24, 0x18 ; 24 7e1c: 88 e1 ldi r24, 0x18 ; 24
7e1a: 80 93 c1 00 sts 0x00C1, r24 7e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
7e1e: 86 e0 ldi r24, 0x06 ; 6 7e22: 86 e0 ldi r24, 0x06 ; 6
7e20: 80 93 c2 00 sts 0x00C2, r24 7e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
7e24: 80 e1 ldi r24, 0x10 ; 16 7e28: 80 e1 ldi r24, 0x10 ; 16
7e26: 80 93 c4 00 sts 0x00C4, r24 7e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
7e2a: 8e e0 ldi r24, 0x0E ; 14 7e2e: 8e e0 ldi r24, 0x0E ; 14
7e2c: c6 d0 rcall .+396 ; 0x7fba <watchdogConfig> 7e30: c8 d0 rcall .+400 ; 0x7fc2 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
7e2e: 25 9a sbi 0x04, 5 ; 4 7e32: 25 9a sbi 0x04, 5 ; 4
7e30: 86 e0 ldi r24, 0x06 ; 6 7e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
7e32: 20 e3 ldi r18, 0x30 ; 48 7e36: 20 e3 ldi r18, 0x30 ; 48
7e34: 3c ef ldi r19, 0xFC ; 252 7e38: 3c ef ldi r19, 0xFC ; 252
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
7e36: 91 e0 ldi r25, 0x01 ; 1 7e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
7e38: 30 93 85 00 sts 0x0085, r19 7e3c: 30 93 85 00 sts 0x0085, r19
7e3c: 20 93 84 00 sts 0x0084, r18 7e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
7e40: 96 bb out 0x16, r25 ; 22 7e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
7e42: b0 9b sbis 0x16, 0 ; 22 7e46: b0 9b sbis 0x16, 0 ; 22
7e44: fe cf rjmp .-4 ; 0x7e42 <main+0x42> 7e48: fe cf rjmp .-4 ; 0x7e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
7e46: 1d 9a sbi 0x03, 5 ; 3 7e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
7e48: a8 95 wdr 7e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
7e4a: 81 50 subi r24, 0x01 ; 1 7e4e: 81 50 subi r24, 0x01 ; 1
7e4c: a9 f7 brne .-22 ; 0x7e38 <main+0x38> 7e50: a9 f7 brne .-22 ; 0x7e3c <main+0x3c>
7e4e: aa 24 eor r10, r10 7e52: aa 24 eor r10, r10
7e50: bb 24 eor r11, r11 7e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
7e52: 33 e0 ldi r19, 0x03 ; 3 7e56: 33 e0 ldi r19, 0x03 ; 3
7e54: 83 2e mov r8, r19 7e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
7e56: 77 24 eor r7, r7 7e5a: 77 24 eor r7, r7
7e58: 73 94 inc r7 7e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
7e5a: 25 e0 ldi r18, 0x05 ; 5 7e5e: 25 e0 ldi r18, 0x05 ; 5
7e5c: 92 2e mov r9, r18 7e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
7e5e: 91 e1 ldi r25, 0x11 ; 17 7e62: 91 e1 ldi r25, 0x11 ; 17
7e60: c9 2e mov r12, r25 7e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
7e62: 9f d0 rcall .+318 ; 0x7fa2 <getch> 7e66: a1 d0 rcall .+322 ; 0x7faa <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
7e64: 81 34 cpi r24, 0x41 ; 65 7e68: 81 34 cpi r24, 0x41 ; 65
7e66: 61 f4 brne .+24 ; 0x7e80 <main+0x80> 7e6a: 71 f4 brne .+28 ; 0x7e88 <main+0x88>
unsigned char which = getch(); unsigned char which = getch();
7e68: 9c d0 rcall .+312 ; 0x7fa2 <getch> 7e6c: 9e d0 rcall .+316 ; 0x7faa <getch>
7e6a: 18 2f mov r17, r24 7e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
7e6c: ac d0 rcall .+344 ; 0x7fc6 <verifySpace> 7e70: ae d0 rcall .+348 ; 0x7fce <verifySpace>
if (which == 0x82) {
7e6e: 12 38 cpi r17, 0x82 ; 130
7e70: 29 f1 breq .+74 ; 0x7ebc <main+0xbc>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
} else if (which == 0x81) { 7e72: 12 38 cpi r17, 0x82 ; 130
7e72: 11 38 cpi r17, 0x81 ; 129
7e74: 11 f4 brne .+4 ; 0x7e7a <main+0x7a> 7e74: 11 f4 brne .+4 ; 0x7e7a <main+0x7a>
putch(OPTIBOOT_MAJVER); putch(optiboot_version & 0xFF);
7e76: 86 e0 ldi r24, 0x06 ; 6 7e76: 81 e0 ldi r24, 0x01 ; 1
7e78: 01 c0 rjmp .+2 ; 0x7e7c <main+0x7c> 7e78: 05 c0 rjmp .+10 ; 0x7e84 <main+0x84>
} else if (which == 0x81) {
7e7a: 11 38 cpi r17, 0x81 ; 129
7e7c: 11 f4 brne .+4 ; 0x7e82 <main+0x82>
putch(optiboot_version >> 8);
7e7e: 86 e0 ldi r24, 0x06 ; 6
7e80: 01 c0 rjmp .+2 ; 0x7e84 <main+0x84>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
7e7a: 83 e0 ldi r24, 0x03 ; 3 7e82: 83 e0 ldi r24, 0x03 ; 3
7e7c: 8a d0 rcall .+276 ; 0x7f92 <putch> 7e84: 8a d0 rcall .+276 ; 0x7f9a <putch>
7e7e: 86 c0 rjmp .+268 ; 0x7f8c <main+0x18c> 7e86: 86 c0 rjmp .+268 ; 0x7f94 <main+0x194>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
7e80: 82 34 cpi r24, 0x42 ; 66 7e88: 82 34 cpi r24, 0x42 ; 66
7e82: 11 f4 brne .+4 ; 0x7e88 <main+0x88> 7e8a: 11 f4 brne .+4 ; 0x7e90 <main+0x90>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
7e84: 84 e1 ldi r24, 0x14 ; 20 7e8c: 84 e1 ldi r24, 0x14 ; 20
7e86: 03 c0 rjmp .+6 ; 0x7e8e <main+0x8e> 7e8e: 03 c0 rjmp .+6 ; 0x7e96 <main+0x96>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
7e88: 85 34 cpi r24, 0x45 ; 69 7e90: 85 34 cpi r24, 0x45 ; 69
7e8a: 19 f4 brne .+6 ; 0x7e92 <main+0x92> 7e92: 19 f4 brne .+6 ; 0x7e9a <main+0x9a>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
7e8c: 85 e0 ldi r24, 0x05 ; 5 7e94: 85 e0 ldi r24, 0x05 ; 5
7e8e: a3 d0 rcall .+326 ; 0x7fd6 <getNch> 7e96: a3 d0 rcall .+326 ; 0x7fde <getNch>
7e90: 7d c0 rjmp .+250 ; 0x7f8c <main+0x18c> 7e98: 7d c0 rjmp .+250 ; 0x7f94 <main+0x194>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
7e92: 85 35 cpi r24, 0x55 ; 85 7e9a: 85 35 cpi r24, 0x55 ; 85
7e94: 79 f4 brne .+30 ; 0x7eb4 <main+0xb4> 7e9c: 79 f4 brne .+30 ; 0x7ebc <main+0xbc>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
7e96: 85 d0 rcall .+266 ; 0x7fa2 <getch> 7e9e: 85 d0 rcall .+266 ; 0x7faa <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
7e98: e8 2e mov r14, r24 7ea0: e8 2e mov r14, r24
7e9a: ff 24 eor r15, r15 7ea2: ff 24 eor r15, r15
7e9c: 82 d0 rcall .+260 ; 0x7fa2 <getch> 7ea4: 82 d0 rcall .+260 ; 0x7faa <getch>
7e9e: 08 2f mov r16, r24 7ea6: 08 2f mov r16, r24
7ea0: 10 e0 ldi r17, 0x00 ; 0 7ea8: 10 e0 ldi r17, 0x00 ; 0
7ea2: 10 2f mov r17, r16 7eaa: 10 2f mov r17, r16
7ea4: 00 27 eor r16, r16 7eac: 00 27 eor r16, r16
7ea6: 0e 29 or r16, r14 7eae: 0e 29 or r16, r14
7ea8: 1f 29 or r17, r15 7eb0: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
7eaa: 00 0f add r16, r16 7eb2: 00 0f add r16, r16
7eac: 11 1f adc r17, r17 7eb4: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
7eae: 8b d0 rcall .+278 ; 0x7fc6 <verifySpace> 7eb6: 8b d0 rcall .+278 ; 0x7fce <verifySpace>
7eb0: 58 01 movw r10, r16 7eb8: 58 01 movw r10, r16
7eb2: 6c c0 rjmp .+216 ; 0x7f8c <main+0x18c> 7eba: 6c c0 rjmp .+216 ; 0x7f94 <main+0x194>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
7eb4: 86 35 cpi r24, 0x56 ; 86 7ebc: 86 35 cpi r24, 0x56 ; 86
7eb6: 21 f4 brne .+8 ; 0x7ec0 <main+0xc0> 7ebe: 21 f4 brne .+8 ; 0x7ec8 <main+0xc8>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
7eb8: 84 e0 ldi r24, 0x04 ; 4 7ec0: 84 e0 ldi r24, 0x04 ; 4
7eba: 8d d0 rcall .+282 ; 0x7fd6 <getNch> 7ec2: 8d d0 rcall .+282 ; 0x7fde <getNch>
putch(0x00); putch(0x00);
7ebc: 80 e0 ldi r24, 0x00 ; 0 7ec4: 80 e0 ldi r24, 0x00 ; 0
7ebe: de cf rjmp .-68 ; 0x7e7c <main+0x7c> 7ec6: de cf rjmp .-68 ; 0x7e84 <main+0x84>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
7ec0: 84 36 cpi r24, 0x64 ; 100 7ec8: 84 36 cpi r24, 0x64 ; 100
7ec2: 09 f0 breq .+2 ; 0x7ec6 <main+0xc6> 7eca: 09 f0 breq .+2 ; 0x7ece <main+0xce>
7ec4: 41 c0 rjmp .+130 ; 0x7f48 <main+0x148> 7ecc: 41 c0 rjmp .+130 ; 0x7f50 <main+0x150>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
7ec6: 6d d0 rcall .+218 ; 0x7fa2 <getch> 7ece: 6d d0 rcall .+218 ; 0x7faa <getch>
7ec8: 90 e0 ldi r25, 0x00 ; 0
7eca: 18 2f mov r17, r24
7ecc: 00 27 eor r16, r16
length |= getch();
7ece: 69 d0 rcall .+210 ; 0x7fa2 <getch>
7ed0: 90 e0 ldi r25, 0x00 ; 0 7ed0: 90 e0 ldi r25, 0x00 ; 0
7ed2: 08 2b or r16, r24 7ed2: 18 2f mov r17, r24
7ed4: 19 2b or r17, r25 7ed4: 00 27 eor r16, r16
length |= getch();
7ed6: 69 d0 rcall .+210 ; 0x7faa <getch>
7ed8: 90 e0 ldi r25, 0x00 ; 0
7eda: 08 2b or r16, r24
7edc: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
7ed6: 65 d0 rcall .+202 ; 0x7fa2 <getch> 7ede: 65 d0 rcall .+202 ; 0x7faa <getch>
7ed8: d8 2e mov r13, r24 7ee0: d8 2e mov r13, r24
7eda: e8 01 movw r28, r16 7ee2: e8 01 movw r28, r16
7edc: e1 2c mov r14, r1 7ee4: e1 2c mov r14, r1
7ede: f1 e0 ldi r31, 0x01 ; 1 7ee6: f1 e0 ldi r31, 0x01 ; 1
7ee0: ff 2e mov r15, r31 7ee8: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
7ee2: 5f d0 rcall .+190 ; 0x7fa2 <getch> 7eea: 5f d0 rcall .+190 ; 0x7faa <getch>
7ee4: f7 01 movw r30, r14 7eec: f7 01 movw r30, r14
7ee6: 81 93 st Z+, r24 7eee: 81 93 st Z+, r24
7ee8: 7f 01 movw r14, r30 7ef0: 7f 01 movw r14, r30
while (--length); while (--length);
7eea: 21 97 sbiw r28, 0x01 ; 1 7ef2: 21 97 sbiw r28, 0x01 ; 1
7eec: d1 f7 brne .-12 ; 0x7ee2 <main+0xe2> 7ef4: d1 f7 brne .-12 ; 0x7eea <main+0xea>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
7eee: 6b d0 rcall .+214 ; 0x7fc6 <verifySpace> 7ef6: 6b d0 rcall .+214 ; 0x7fce <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
7ef0: f5 e4 ldi r31, 0x45 ; 69 7ef8: f5 e4 ldi r31, 0x45 ; 69
7ef2: df 16 cp r13, r31 7efa: df 16 cp r13, r31
7ef4: 09 f4 brne .+2 ; 0x7ef8 <main+0xf8> 7efc: 09 f4 brne .+2 ; 0x7f00 <main+0x100>
7ef6: ff cf rjmp .-2 ; 0x7ef6 <main+0xf6> 7efe: ff cf rjmp .-2 ; 0x7efe <main+0xfe>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
7ef8: f5 01 movw r30, r10 7f00: f5 01 movw r30, r10
7efa: 87 be out 0x37, r8 ; 55 7f02: 87 be out 0x37, r8 ; 55
7efc: e8 95 spm 7f04: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
7efe: 07 b6 in r0, 0x37 ; 55 7f06: 07 b6 in r0, 0x37 ; 55
7f00: 00 fc sbrc r0, 0 7f08: 00 fc sbrc r0, 0
7f02: fd cf rjmp .-6 ; 0x7efe <main+0xfe> 7f0a: fd cf rjmp .-6 ; 0x7f06 <main+0x106>
7f04: b5 01 movw r22, r10 7f0c: b5 01 movw r22, r10
7f06: a8 01 movw r20, r16 7f0e: a8 01 movw r20, r16
7f08: a0 e0 ldi r26, 0x00 ; 0 7f10: a0 e0 ldi r26, 0x00 ; 0
7f0a: b1 e0 ldi r27, 0x01 ; 1 7f12: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
7f0c: 2c 91 ld r18, X 7f14: 2c 91 ld r18, X
7f0e: 30 e0 ldi r19, 0x00 ; 0 7f16: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
7f10: 11 96 adiw r26, 0x01 ; 1 7f18: 11 96 adiw r26, 0x01 ; 1
7f12: 8c 91 ld r24, X 7f1a: 8c 91 ld r24, X
7f14: 11 97 sbiw r26, 0x01 ; 1 7f1c: 11 97 sbiw r26, 0x01 ; 1
7f16: 90 e0 ldi r25, 0x00 ; 0 7f1e: 90 e0 ldi r25, 0x00 ; 0
7f18: 98 2f mov r25, r24 7f20: 98 2f mov r25, r24
7f1a: 88 27 eor r24, r24 7f22: 88 27 eor r24, r24
7f1c: 82 2b or r24, r18 7f24: 82 2b or r24, r18
7f1e: 93 2b or r25, r19 7f26: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
7f20: 12 96 adiw r26, 0x02 ; 2 7f28: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
7f22: fb 01 movw r30, r22 7f2a: fb 01 movw r30, r22
7f24: 0c 01 movw r0, r24 7f2c: 0c 01 movw r0, r24
7f26: 77 be out 0x37, r7 ; 55 7f2e: 77 be out 0x37, r7 ; 55
7f28: e8 95 spm 7f30: e8 95 spm
7f2a: 11 24 eor r1, r1 7f32: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
7f2c: 6e 5f subi r22, 0xFE ; 254 7f34: 6e 5f subi r22, 0xFE ; 254
7f2e: 7f 4f sbci r23, 0xFF ; 255 7f36: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
7f30: 42 50 subi r20, 0x02 ; 2 7f38: 42 50 subi r20, 0x02 ; 2
7f32: 50 40 sbci r21, 0x00 ; 0 7f3a: 50 40 sbci r21, 0x00 ; 0
7f34: 59 f7 brne .-42 ; 0x7f0c <main+0x10c> 7f3c: 59 f7 brne .-42 ; 0x7f14 <main+0x114>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
7f36: f5 01 movw r30, r10 7f3e: f5 01 movw r30, r10
7f38: 97 be out 0x37, r9 ; 55 7f40: 97 be out 0x37, r9 ; 55
7f3a: e8 95 spm 7f42: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
7f3c: 07 b6 in r0, 0x37 ; 55 7f44: 07 b6 in r0, 0x37 ; 55
7f3e: 00 fc sbrc r0, 0 7f46: 00 fc sbrc r0, 0
7f40: fd cf rjmp .-6 ; 0x7f3c <main+0x13c> 7f48: fd cf rjmp .-6 ; 0x7f44 <main+0x144>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
7f42: c7 be out 0x37, r12 ; 55 7f4a: c7 be out 0x37, r12 ; 55
7f44: e8 95 spm 7f4c: e8 95 spm
7f46: 22 c0 rjmp .+68 ; 0x7f8c <main+0x18c> 7f4e: 22 c0 rjmp .+68 ; 0x7f94 <main+0x194>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
7f48: 84 37 cpi r24, 0x74 ; 116 7f50: 84 37 cpi r24, 0x74 ; 116
7f4a: 91 f4 brne .+36 ; 0x7f70 <main+0x170> 7f52: 91 f4 brne .+36 ; 0x7f78 <main+0x178>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
7f4c: 2a d0 rcall .+84 ; 0x7fa2 <getch> 7f54: 2a d0 rcall .+84 ; 0x7faa <getch>
7f4e: 90 e0 ldi r25, 0x00 ; 0
7f50: d8 2f mov r29, r24
7f52: cc 27 eor r28, r28
length |= getch();
7f54: 26 d0 rcall .+76 ; 0x7fa2 <getch>
7f56: 90 e0 ldi r25, 0x00 ; 0 7f56: 90 e0 ldi r25, 0x00 ; 0
7f58: c8 2b or r28, r24 7f58: d8 2f mov r29, r24
7f5a: d9 2b or r29, r25 7f5a: cc 27 eor r28, r28
length |= getch();
7f5c: 26 d0 rcall .+76 ; 0x7faa <getch>
7f5e: 90 e0 ldi r25, 0x00 ; 0
7f60: c8 2b or r28, r24
7f62: d9 2b or r29, r25
desttype = getch(); desttype = getch();
7f5c: 22 d0 rcall .+68 ; 0x7fa2 <getch> 7f64: 22 d0 rcall .+68 ; 0x7faa <getch>
verifySpace(); verifySpace();
7f5e: 33 d0 rcall .+102 ; 0x7fc6 <verifySpace> 7f66: 33 d0 rcall .+102 ; 0x7fce <verifySpace>
7f60: 85 01 movw r16, r10 7f68: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
7f62: f8 01 movw r30, r16 7f6a: f8 01 movw r30, r16
7f64: 85 91 lpm r24, Z+ 7f6c: 85 91 lpm r24, Z+
7f66: 8f 01 movw r16, r30 7f6e: 8f 01 movw r16, r30
7f68: 14 d0 rcall .+40 ; 0x7f92 <putch> 7f70: 14 d0 rcall .+40 ; 0x7f9a <putch>
} while (--length); } while (--length);
7f6a: 21 97 sbiw r28, 0x01 ; 1 7f72: 21 97 sbiw r28, 0x01 ; 1
7f6c: d1 f7 brne .-12 ; 0x7f62 <main+0x162> 7f74: d1 f7 brne .-12 ; 0x7f6a <main+0x16a>
7f6e: 0e c0 rjmp .+28 ; 0x7f8c <main+0x18c> 7f76: 0e c0 rjmp .+28 ; 0x7f94 <main+0x194>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
7f70: 85 37 cpi r24, 0x75 ; 117 7f78: 85 37 cpi r24, 0x75 ; 117
7f72: 39 f4 brne .+14 ; 0x7f82 <main+0x182> 7f7a: 39 f4 brne .+14 ; 0x7f8a <main+0x18a>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
7f74: 28 d0 rcall .+80 ; 0x7fc6 <verifySpace> 7f7c: 28 d0 rcall .+80 ; 0x7fce <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
7f76: 8e e1 ldi r24, 0x1E ; 30 7f7e: 8e e1 ldi r24, 0x1E ; 30
7f78: 0c d0 rcall .+24 ; 0x7f92 <putch> 7f80: 0c d0 rcall .+24 ; 0x7f9a <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
7f7a: 85 e9 ldi r24, 0x95 ; 149 7f82: 85 e9 ldi r24, 0x95 ; 149
7f7c: 0a d0 rcall .+20 ; 0x7f92 <putch> 7f84: 0a d0 rcall .+20 ; 0x7f9a <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
7f7e: 8f e0 ldi r24, 0x0F ; 15 7f86: 8f e0 ldi r24, 0x0F ; 15
7f80: 7d cf rjmp .-262 ; 0x7e7c <main+0x7c> 7f88: 7d cf rjmp .-262 ; 0x7e84 <main+0x84>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
7f82: 81 35 cpi r24, 0x51 ; 81 7f8a: 81 35 cpi r24, 0x51 ; 81
7f84: 11 f4 brne .+4 ; 0x7f8a <main+0x18a> 7f8c: 11 f4 brne .+4 ; 0x7f92 <main+0x192>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
7f86: 88 e0 ldi r24, 0x08 ; 8 7f8e: 88 e0 ldi r24, 0x08 ; 8
7f88: 18 d0 rcall .+48 ; 0x7fba <watchdogConfig> 7f90: 18 d0 rcall .+48 ; 0x7fc2 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
7f8a: 1d d0 rcall .+58 ; 0x7fc6 <verifySpace> 7f92: 1d d0 rcall .+58 ; 0x7fce <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
7f8c: 80 e1 ldi r24, 0x10 ; 16 7f94: 80 e1 ldi r24, 0x10 ; 16
7f8e: 01 d0 rcall .+2 ; 0x7f92 <putch> 7f96: 01 d0 rcall .+2 ; 0x7f9a <putch>
7f90: 68 cf rjmp .-304 ; 0x7e62 <main+0x62> 7f98: 66 cf rjmp .-308 ; 0x7e66 <main+0x66>
00007f92 <putch>: 00007f9a <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
7f92: 98 2f mov r25, r24 7f9a: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
7f94: 80 91 c0 00 lds r24, 0x00C0 7f9c: 80 91 c0 00 lds r24, 0x00C0
7f98: 85 ff sbrs r24, 5 7fa0: 85 ff sbrs r24, 5
7f9a: fc cf rjmp .-8 ; 0x7f94 <putch+0x2> 7fa2: fc cf rjmp .-8 ; 0x7f9c <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
7f9c: 90 93 c6 00 sts 0x00C6, r25 7fa4: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
7fa0: 08 95 ret 7fa8: 08 95 ret
00007fa2 <getch>: 00007faa <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
7fa2: 80 91 c0 00 lds r24, 0x00C0 7faa: 80 91 c0 00 lds r24, 0x00C0
7fa6: 87 ff sbrs r24, 7 7fae: 87 ff sbrs r24, 7
7fa8: fc cf rjmp .-8 ; 0x7fa2 <getch> 7fb0: fc cf rjmp .-8 ; 0x7faa <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
7faa: 80 91 c0 00 lds r24, 0x00C0 7fb2: 80 91 c0 00 lds r24, 0x00C0
7fae: 84 fd sbrc r24, 4 7fb6: 84 fd sbrc r24, 4
7fb0: 01 c0 rjmp .+2 ; 0x7fb4 <getch+0x12> 7fb8: 01 c0 rjmp .+2 ; 0x7fbc <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
7fb2: a8 95 wdr 7fba: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
7fb4: 80 91 c6 00 lds r24, 0x00C6 7fbc: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
7fb8: 08 95 ret 7fc0: 08 95 ret
00007fba <watchdogConfig>: 00007fc2 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
7fba: e0 e6 ldi r30, 0x60 ; 96 7fc2: e0 e6 ldi r30, 0x60 ; 96
7fbc: f0 e0 ldi r31, 0x00 ; 0 7fc4: f0 e0 ldi r31, 0x00 ; 0
7fbe: 98 e1 ldi r25, 0x18 ; 24 7fc6: 98 e1 ldi r25, 0x18 ; 24
7fc0: 90 83 st Z, r25 7fc8: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
7fc2: 80 83 st Z, r24 7fca: 80 83 st Z, r24
} }
7fc4: 08 95 ret 7fcc: 08 95 ret
00007fc6 <verifySpace>: 00007fce <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
7fc6: ed df rcall .-38 ; 0x7fa2 <getch> 7fce: ed df rcall .-38 ; 0x7faa <getch>
7fc8: 80 32 cpi r24, 0x20 ; 32 7fd0: 80 32 cpi r24, 0x20 ; 32
7fca: 19 f0 breq .+6 ; 0x7fd2 <verifySpace+0xc> 7fd2: 19 f0 breq .+6 ; 0x7fda <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
7fcc: 88 e0 ldi r24, 0x08 ; 8 7fd4: 88 e0 ldi r24, 0x08 ; 8
7fce: f5 df rcall .-22 ; 0x7fba <watchdogConfig> 7fd6: f5 df rcall .-22 ; 0x7fc2 <watchdogConfig>
7fd0: ff cf rjmp .-2 ; 0x7fd0 <verifySpace+0xa> 7fd8: ff cf rjmp .-2 ; 0x7fd8 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
7fd2: 84 e1 ldi r24, 0x14 ; 20 7fda: 84 e1 ldi r24, 0x14 ; 20
} }
7fd4: de cf rjmp .-68 ; 0x7f92 <putch> 7fdc: de cf rjmp .-68 ; 0x7f9a <putch>
00007fd6 <getNch>: 00007fde <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
7fd6: 1f 93 push r17 7fde: 1f 93 push r17
7fd8: 18 2f mov r17, r24 7fe0: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
7fda: e3 df rcall .-58 ; 0x7fa2 <getch> 7fe2: e3 df rcall .-58 ; 0x7faa <getch>
7fdc: 11 50 subi r17, 0x01 ; 1 7fe4: 11 50 subi r17, 0x01 ; 1
7fde: e9 f7 brne .-6 ; 0x7fda <getNch+0x4> 7fe6: e9 f7 brne .-6 ; 0x7fe2 <getNch+0x4>
verifySpace(); verifySpace();
7fe0: f2 df rcall .-28 ; 0x7fc6 <verifySpace> 7fe8: f2 df rcall .-28 ; 0x7fce <verifySpace>
} }
7fe2: 1f 91 pop r17 7fea: 1f 91 pop r17
7fe4: 08 95 ret 7fec: 08 95 ret
00007fe6 <appStart>: 00007fee <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
7fe6: 28 2e mov r2, r24 7fee: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
7fe8: 80 e0 ldi r24, 0x00 ; 0 7ff0: 80 e0 ldi r24, 0x00 ; 0
7fea: e7 df rcall .-50 ; 0x7fba <watchdogConfig> 7ff2: e7 df rcall .-50 ; 0x7fc2 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
7fec: ee 27 eor r30, r30 7ff4: ee 27 eor r30, r30
7fee: ff 27 eor r31, r31 7ff6: ff 27 eor r31, r31
7ff0: 09 94 ijmp 7ff8: 09 94 ijmp

66
optiboot/bootloaders/optiboot/optiboot_atmega328_pro_8MHz.hex
View File

@@ -1,35 +1,35 @@
:107E0000112484B714BE81FD01C0EDD085E08093BC :107E0000112494B714BE892F8D7011F0892FEFD0F3
:107E1000810082E08093C00088E18093C10086E009 :107E100085E08093810082E08093C00088E18093B8
:107E20008093C20088E08093C4008EE0C6D0259A7B :107E2000C10086E08093C20088E08093C4008EE0A9
:107E300086E028E13EEF91E03093850020938400B6 :107E3000C8D0259A86E028E13EEF91E03093850096
:107E400096BBB09BFECF1D9AA8958150A9F7AA2496 :107E40002093840096BBB09BFECF1D9AA8958150CD
:107E5000BB2433E0832E7724739425E0922E91E1A6 :107E5000A9F7AA24BB2433E0832E7724739425E06A
:107E6000C92E9FD0813461F49CD0182FACD0123829 :107E6000922E91E1C92EA1D0813471F49ED0182FA9
:107E700029F1113811F486E001C083E08AD086C070 :107E7000AED0123811F481E005C0113811F486E05B
:107E8000823411F484E103C0853419F485E0A3D071 :107E800001C083E08AD086C0823411F484E103C04B
:107E90007DC0853579F485D0E82EFF2482D0082F67 :107E9000853419F485E0A3D07DC0853579F485D08B
:107EA00010E0102F00270E291F29000F111F8BD063 :107EA000E82EFF2482D0082F10E0102F00270E2983
:107EB00058016CC0863521F484E08DD080E0DECF9F :107EB0001F29000F111F8BD058016CC0863521F48B
:107EC000843609F041C06DD090E0182F002769D0AA :107EC00084E08DD080E0DECF843609F041C06DD0F3
:107ED00090E0082B192B65D0D82EE801E12CF1E0B9 :107ED00090E0182F002769D090E0082B192B65D06F
:107EE000FF2E5FD0F70181937F012197D1F76BD0EF :107EE000D82EE801E12CF1E0FF2E5FD0F70181935D
:107EF000F5E4DF1609F4FFCFF50187BEE89507B674 :107EF0007F012197D1F76BD0F5E4DF1609F4FFCFAE
:107F000000FCFDCFB501A801A0E0B1E02C9130E06C :107F0000F50187BEE89507B600FCFDCFB501A801D5
:107F100011968C91119790E0982F8827822B932BA4 :107F1000A0E0B1E02C9130E011968C91119790E0A7
:107F20001296FB010C0177BEE89511246E5F7F4F1E :107F2000982F8827822B932B1296FB010C0177BE8A
:107F30004250504059F7F50197BEE89507B600FC4E :107F3000E89511246E5F7F4F4250504059F7F5018C
:107F4000FDCFC7BEE89522C0843791F42AD090E0D7 :107F400097BEE89507B600FCFDCFC7BEE89522C0F6
:107F5000D82FCC2726D090E0C82BD92B22D033D0D5 :107F5000843791F42AD090E0D82FCC2726D090E017
:107F60008501F80185918F0114D02197D1F70EC0BA :107F6000C82BD92B22D033D08501F80185918F0100
:107F7000853739F428D08EE10CD085E90AD08FE01E :107F700014D02197D1F70EC0853739F428D08EE17F
:107F80007DCF813511F488E018D01DD080E101D07B :107F80000CD085E90AD08FE07DCF813511F488E0EF
:107F900068CF982F8091C00085FFFCCF9093C600DA :107F900018D01DD080E101D066CF982F8091C0000D
:107FA00008958091C00087FFFCCF8091C00084FDC0 :107FA00085FFFCCF9093C60008958091C00087FFA5
:107FB00001C0A8958091C6000895E0E6F0E098E140 :107FB000FCCF8091C00084FD01C0A8958091C600CF
:107FC000908380830895EDDF803219F088E0F5DF3B :107FC0000895E0E6F0E098E1908380830895EDDF86
:107FD000FFCF84E1DECF1F93182FE3DF1150E9F7C5 :107FD000803219F088E0F5DFFFCF84E1DECF1F9318
:107FE000F2DF1F910895282E80E0E7DFEE27FF27BC :107FE000182FE3DF1150E9F7F2DF1F910895282ED3
:027FF0000994F2 :0A7FF00080E0E7DFEE27FF27099489
:027FFE0000067B :027FFE0001067A
:0400000300007E007B :0400000300007E007B
:00000001FF :00000001FF

532
optiboot/bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega328.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f2 00007e00 00007e00 00000074 2**1 0 .text 000001fa 00007e00 00007e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00007ffe 00007ffe 00000266 2**0 1 .version 00000002 00007ffe 00007ffe 0000026e 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000268 2**0 2 .debug_aranges 00000028 00000000 00000000 00000270 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 00000290 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000298 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000304 2**0 4 .debug_info 000003e0 00000000 00000000 0000030c 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006df 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 0000042b 00000000 00000000 000008c9 2**0 6 .debug_line 0000043b 00000000 00000000 000008dd 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cf4 2**2 7 .debug_frame 00000080 00000000 00000000 00000d18 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d74 2**0 8 .debug_str 00000172 00000000 00000000 00000d98 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ee6 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f0a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011bd 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011e1 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,565 +36,571 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
7e00: 11 24 eor r1, r1 7e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
7e02: 84 b7 in r24, 0x34 ; 52 7e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
7e04: 14 be out 0x34, r1 ; 52 7e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
7e06: 81 fd sbrc r24, 1 7e06: 89 2f mov r24, r25
7e08: 01 c0 rjmp .+2 ; 0x7e0c <main+0xc> 7e08: 8d 70 andi r24, 0x0D ; 13
7e0a: ed d0 rcall .+474 ; 0x7fe6 <appStart> 7e0a: 11 f0 breq .+4 ; 0x7e10 <main+0x10>
appStart(ch);
7e0c: 89 2f mov r24, r25
7e0e: ef d0 rcall .+478 ; 0x7fee <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
7e0c: 85 e0 ldi r24, 0x05 ; 5 7e10: 85 e0 ldi r24, 0x05 ; 5
7e0e: 80 93 81 00 sts 0x0081, r24 7e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
7e12: 82 e0 ldi r24, 0x02 ; 2 7e16: 82 e0 ldi r24, 0x02 ; 2
7e14: 80 93 c0 00 sts 0x00C0, r24 7e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
7e18: 88 e1 ldi r24, 0x18 ; 24 7e1c: 88 e1 ldi r24, 0x18 ; 24
7e1a: 80 93 c1 00 sts 0x00C1, r24 7e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
7e1e: 86 e0 ldi r24, 0x06 ; 6 7e22: 86 e0 ldi r24, 0x06 ; 6
7e20: 80 93 c2 00 sts 0x00C2, r24 7e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
7e24: 88 e0 ldi r24, 0x08 ; 8 7e28: 88 e0 ldi r24, 0x08 ; 8
7e26: 80 93 c4 00 sts 0x00C4, r24 7e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
7e2a: 8e e0 ldi r24, 0x0E ; 14 7e2e: 8e e0 ldi r24, 0x0E ; 14
7e2c: c6 d0 rcall .+396 ; 0x7fba <watchdogConfig> 7e30: c8 d0 rcall .+400 ; 0x7fc2 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
7e2e: 25 9a sbi 0x04, 5 ; 4 7e32: 25 9a sbi 0x04, 5 ; 4
7e30: 86 e0 ldi r24, 0x06 ; 6 7e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
7e32: 28 e1 ldi r18, 0x18 ; 24 7e36: 28 e1 ldi r18, 0x18 ; 24
7e34: 3e ef ldi r19, 0xFE ; 254 7e38: 3e ef ldi r19, 0xFE ; 254
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
7e36: 91 e0 ldi r25, 0x01 ; 1 7e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
7e38: 30 93 85 00 sts 0x0085, r19 7e3c: 30 93 85 00 sts 0x0085, r19
7e3c: 20 93 84 00 sts 0x0084, r18 7e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
7e40: 96 bb out 0x16, r25 ; 22 7e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
7e42: b0 9b sbis 0x16, 0 ; 22 7e46: b0 9b sbis 0x16, 0 ; 22
7e44: fe cf rjmp .-4 ; 0x7e42 <main+0x42> 7e48: fe cf rjmp .-4 ; 0x7e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
7e46: 1d 9a sbi 0x03, 5 ; 3 7e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
7e48: a8 95 wdr 7e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
7e4a: 81 50 subi r24, 0x01 ; 1 7e4e: 81 50 subi r24, 0x01 ; 1
7e4c: a9 f7 brne .-22 ; 0x7e38 <main+0x38> 7e50: a9 f7 brne .-22 ; 0x7e3c <main+0x3c>
7e4e: aa 24 eor r10, r10 7e52: aa 24 eor r10, r10
7e50: bb 24 eor r11, r11 7e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
7e52: 33 e0 ldi r19, 0x03 ; 3 7e56: 33 e0 ldi r19, 0x03 ; 3
7e54: 83 2e mov r8, r19 7e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
7e56: 77 24 eor r7, r7 7e5a: 77 24 eor r7, r7
7e58: 73 94 inc r7 7e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
7e5a: 25 e0 ldi r18, 0x05 ; 5 7e5e: 25 e0 ldi r18, 0x05 ; 5
7e5c: 92 2e mov r9, r18 7e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
7e5e: 91 e1 ldi r25, 0x11 ; 17 7e62: 91 e1 ldi r25, 0x11 ; 17
7e60: c9 2e mov r12, r25 7e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
7e62: 9f d0 rcall .+318 ; 0x7fa2 <getch> 7e66: a1 d0 rcall .+322 ; 0x7faa <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
7e64: 81 34 cpi r24, 0x41 ; 65 7e68: 81 34 cpi r24, 0x41 ; 65
7e66: 61 f4 brne .+24 ; 0x7e80 <main+0x80> 7e6a: 71 f4 brne .+28 ; 0x7e88 <main+0x88>
unsigned char which = getch(); unsigned char which = getch();
7e68: 9c d0 rcall .+312 ; 0x7fa2 <getch> 7e6c: 9e d0 rcall .+316 ; 0x7faa <getch>
7e6a: 18 2f mov r17, r24 7e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
7e6c: ac d0 rcall .+344 ; 0x7fc6 <verifySpace> 7e70: ae d0 rcall .+348 ; 0x7fce <verifySpace>
if (which == 0x82) {
7e6e: 12 38 cpi r17, 0x82 ; 130
7e70: 29 f1 breq .+74 ; 0x7ebc <main+0xbc>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
} else if (which == 0x81) { 7e72: 12 38 cpi r17, 0x82 ; 130
7e72: 11 38 cpi r17, 0x81 ; 129
7e74: 11 f4 brne .+4 ; 0x7e7a <main+0x7a> 7e74: 11 f4 brne .+4 ; 0x7e7a <main+0x7a>
putch(OPTIBOOT_MAJVER); putch(optiboot_version & 0xFF);
7e76: 86 e0 ldi r24, 0x06 ; 6 7e76: 81 e0 ldi r24, 0x01 ; 1
7e78: 01 c0 rjmp .+2 ; 0x7e7c <main+0x7c> 7e78: 05 c0 rjmp .+10 ; 0x7e84 <main+0x84>
} else if (which == 0x81) {
7e7a: 11 38 cpi r17, 0x81 ; 129
7e7c: 11 f4 brne .+4 ; 0x7e82 <main+0x82>
putch(optiboot_version >> 8);
7e7e: 86 e0 ldi r24, 0x06 ; 6
7e80: 01 c0 rjmp .+2 ; 0x7e84 <main+0x84>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
7e7a: 83 e0 ldi r24, 0x03 ; 3 7e82: 83 e0 ldi r24, 0x03 ; 3
7e7c: 8a d0 rcall .+276 ; 0x7f92 <putch> 7e84: 8a d0 rcall .+276 ; 0x7f9a <putch>
7e7e: 86 c0 rjmp .+268 ; 0x7f8c <main+0x18c> 7e86: 86 c0 rjmp .+268 ; 0x7f94 <main+0x194>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
7e80: 82 34 cpi r24, 0x42 ; 66 7e88: 82 34 cpi r24, 0x42 ; 66
7e82: 11 f4 brne .+4 ; 0x7e88 <main+0x88> 7e8a: 11 f4 brne .+4 ; 0x7e90 <main+0x90>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
7e84: 84 e1 ldi r24, 0x14 ; 20 7e8c: 84 e1 ldi r24, 0x14 ; 20
7e86: 03 c0 rjmp .+6 ; 0x7e8e <main+0x8e> 7e8e: 03 c0 rjmp .+6 ; 0x7e96 <main+0x96>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
7e88: 85 34 cpi r24, 0x45 ; 69 7e90: 85 34 cpi r24, 0x45 ; 69
7e8a: 19 f4 brne .+6 ; 0x7e92 <main+0x92> 7e92: 19 f4 brne .+6 ; 0x7e9a <main+0x9a>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
7e8c: 85 e0 ldi r24, 0x05 ; 5 7e94: 85 e0 ldi r24, 0x05 ; 5
7e8e: a3 d0 rcall .+326 ; 0x7fd6 <getNch> 7e96: a3 d0 rcall .+326 ; 0x7fde <getNch>
7e90: 7d c0 rjmp .+250 ; 0x7f8c <main+0x18c> 7e98: 7d c0 rjmp .+250 ; 0x7f94 <main+0x194>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
7e92: 85 35 cpi r24, 0x55 ; 85 7e9a: 85 35 cpi r24, 0x55 ; 85
7e94: 79 f4 brne .+30 ; 0x7eb4 <main+0xb4> 7e9c: 79 f4 brne .+30 ; 0x7ebc <main+0xbc>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
7e96: 85 d0 rcall .+266 ; 0x7fa2 <getch> 7e9e: 85 d0 rcall .+266 ; 0x7faa <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
7e98: e8 2e mov r14, r24 7ea0: e8 2e mov r14, r24
7e9a: ff 24 eor r15, r15 7ea2: ff 24 eor r15, r15
7e9c: 82 d0 rcall .+260 ; 0x7fa2 <getch> 7ea4: 82 d0 rcall .+260 ; 0x7faa <getch>
7e9e: 08 2f mov r16, r24 7ea6: 08 2f mov r16, r24
7ea0: 10 e0 ldi r17, 0x00 ; 0 7ea8: 10 e0 ldi r17, 0x00 ; 0
7ea2: 10 2f mov r17, r16 7eaa: 10 2f mov r17, r16
7ea4: 00 27 eor r16, r16 7eac: 00 27 eor r16, r16
7ea6: 0e 29 or r16, r14 7eae: 0e 29 or r16, r14
7ea8: 1f 29 or r17, r15 7eb0: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
7eaa: 00 0f add r16, r16 7eb2: 00 0f add r16, r16
7eac: 11 1f adc r17, r17 7eb4: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
7eae: 8b d0 rcall .+278 ; 0x7fc6 <verifySpace> 7eb6: 8b d0 rcall .+278 ; 0x7fce <verifySpace>
7eb0: 58 01 movw r10, r16 7eb8: 58 01 movw r10, r16
7eb2: 6c c0 rjmp .+216 ; 0x7f8c <main+0x18c> 7eba: 6c c0 rjmp .+216 ; 0x7f94 <main+0x194>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
7eb4: 86 35 cpi r24, 0x56 ; 86 7ebc: 86 35 cpi r24, 0x56 ; 86
7eb6: 21 f4 brne .+8 ; 0x7ec0 <main+0xc0> 7ebe: 21 f4 brne .+8 ; 0x7ec8 <main+0xc8>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
7eb8: 84 e0 ldi r24, 0x04 ; 4 7ec0: 84 e0 ldi r24, 0x04 ; 4
7eba: 8d d0 rcall .+282 ; 0x7fd6 <getNch> 7ec2: 8d d0 rcall .+282 ; 0x7fde <getNch>
putch(0x00); putch(0x00);
7ebc: 80 e0 ldi r24, 0x00 ; 0 7ec4: 80 e0 ldi r24, 0x00 ; 0
7ebe: de cf rjmp .-68 ; 0x7e7c <main+0x7c> 7ec6: de cf rjmp .-68 ; 0x7e84 <main+0x84>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
7ec0: 84 36 cpi r24, 0x64 ; 100 7ec8: 84 36 cpi r24, 0x64 ; 100
7ec2: 09 f0 breq .+2 ; 0x7ec6 <main+0xc6> 7eca: 09 f0 breq .+2 ; 0x7ece <main+0xce>
7ec4: 41 c0 rjmp .+130 ; 0x7f48 <main+0x148> 7ecc: 41 c0 rjmp .+130 ; 0x7f50 <main+0x150>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
7ec6: 6d d0 rcall .+218 ; 0x7fa2 <getch> 7ece: 6d d0 rcall .+218 ; 0x7faa <getch>
7ec8: 90 e0 ldi r25, 0x00 ; 0
7eca: 18 2f mov r17, r24
7ecc: 00 27 eor r16, r16
length |= getch();
7ece: 69 d0 rcall .+210 ; 0x7fa2 <getch>
7ed0: 90 e0 ldi r25, 0x00 ; 0 7ed0: 90 e0 ldi r25, 0x00 ; 0
7ed2: 08 2b or r16, r24 7ed2: 18 2f mov r17, r24
7ed4: 19 2b or r17, r25 7ed4: 00 27 eor r16, r16
length |= getch();
7ed6: 69 d0 rcall .+210 ; 0x7faa <getch>
7ed8: 90 e0 ldi r25, 0x00 ; 0
7eda: 08 2b or r16, r24
7edc: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
7ed6: 65 d0 rcall .+202 ; 0x7fa2 <getch> 7ede: 65 d0 rcall .+202 ; 0x7faa <getch>
7ed8: d8 2e mov r13, r24 7ee0: d8 2e mov r13, r24
7eda: e8 01 movw r28, r16 7ee2: e8 01 movw r28, r16
7edc: e1 2c mov r14, r1 7ee4: e1 2c mov r14, r1
7ede: f1 e0 ldi r31, 0x01 ; 1 7ee6: f1 e0 ldi r31, 0x01 ; 1
7ee0: ff 2e mov r15, r31 7ee8: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
7ee2: 5f d0 rcall .+190 ; 0x7fa2 <getch> 7eea: 5f d0 rcall .+190 ; 0x7faa <getch>
7ee4: f7 01 movw r30, r14 7eec: f7 01 movw r30, r14
7ee6: 81 93 st Z+, r24 7eee: 81 93 st Z+, r24
7ee8: 7f 01 movw r14, r30 7ef0: 7f 01 movw r14, r30
while (--length); while (--length);
7eea: 21 97 sbiw r28, 0x01 ; 1 7ef2: 21 97 sbiw r28, 0x01 ; 1
7eec: d1 f7 brne .-12 ; 0x7ee2 <main+0xe2> 7ef4: d1 f7 brne .-12 ; 0x7eea <main+0xea>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
7eee: 6b d0 rcall .+214 ; 0x7fc6 <verifySpace> 7ef6: 6b d0 rcall .+214 ; 0x7fce <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
7ef0: f5 e4 ldi r31, 0x45 ; 69 7ef8: f5 e4 ldi r31, 0x45 ; 69
7ef2: df 16 cp r13, r31 7efa: df 16 cp r13, r31
7ef4: 09 f4 brne .+2 ; 0x7ef8 <main+0xf8> 7efc: 09 f4 brne .+2 ; 0x7f00 <main+0x100>
7ef6: ff cf rjmp .-2 ; 0x7ef6 <main+0xf6> 7efe: ff cf rjmp .-2 ; 0x7efe <main+0xfe>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
7ef8: f5 01 movw r30, r10 7f00: f5 01 movw r30, r10
7efa: 87 be out 0x37, r8 ; 55 7f02: 87 be out 0x37, r8 ; 55
7efc: e8 95 spm 7f04: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
7efe: 07 b6 in r0, 0x37 ; 55 7f06: 07 b6 in r0, 0x37 ; 55
7f00: 00 fc sbrc r0, 0 7f08: 00 fc sbrc r0, 0
7f02: fd cf rjmp .-6 ; 0x7efe <main+0xfe> 7f0a: fd cf rjmp .-6 ; 0x7f06 <main+0x106>
7f04: b5 01 movw r22, r10 7f0c: b5 01 movw r22, r10
7f06: a8 01 movw r20, r16 7f0e: a8 01 movw r20, r16
7f08: a0 e0 ldi r26, 0x00 ; 0 7f10: a0 e0 ldi r26, 0x00 ; 0
7f0a: b1 e0 ldi r27, 0x01 ; 1 7f12: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
7f0c: 2c 91 ld r18, X 7f14: 2c 91 ld r18, X
7f0e: 30 e0 ldi r19, 0x00 ; 0 7f16: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
7f10: 11 96 adiw r26, 0x01 ; 1 7f18: 11 96 adiw r26, 0x01 ; 1
7f12: 8c 91 ld r24, X 7f1a: 8c 91 ld r24, X
7f14: 11 97 sbiw r26, 0x01 ; 1 7f1c: 11 97 sbiw r26, 0x01 ; 1
7f16: 90 e0 ldi r25, 0x00 ; 0 7f1e: 90 e0 ldi r25, 0x00 ; 0
7f18: 98 2f mov r25, r24 7f20: 98 2f mov r25, r24
7f1a: 88 27 eor r24, r24 7f22: 88 27 eor r24, r24
7f1c: 82 2b or r24, r18 7f24: 82 2b or r24, r18
7f1e: 93 2b or r25, r19 7f26: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
7f20: 12 96 adiw r26, 0x02 ; 2 7f28: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
7f22: fb 01 movw r30, r22 7f2a: fb 01 movw r30, r22
7f24: 0c 01 movw r0, r24 7f2c: 0c 01 movw r0, r24
7f26: 77 be out 0x37, r7 ; 55 7f2e: 77 be out 0x37, r7 ; 55
7f28: e8 95 spm 7f30: e8 95 spm
7f2a: 11 24 eor r1, r1 7f32: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
7f2c: 6e 5f subi r22, 0xFE ; 254 7f34: 6e 5f subi r22, 0xFE ; 254
7f2e: 7f 4f sbci r23, 0xFF ; 255 7f36: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
7f30: 42 50 subi r20, 0x02 ; 2 7f38: 42 50 subi r20, 0x02 ; 2
7f32: 50 40 sbci r21, 0x00 ; 0 7f3a: 50 40 sbci r21, 0x00 ; 0
7f34: 59 f7 brne .-42 ; 0x7f0c <main+0x10c> 7f3c: 59 f7 brne .-42 ; 0x7f14 <main+0x114>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
7f36: f5 01 movw r30, r10 7f3e: f5 01 movw r30, r10
7f38: 97 be out 0x37, r9 ; 55 7f40: 97 be out 0x37, r9 ; 55
7f3a: e8 95 spm 7f42: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
7f3c: 07 b6 in r0, 0x37 ; 55 7f44: 07 b6 in r0, 0x37 ; 55
7f3e: 00 fc sbrc r0, 0 7f46: 00 fc sbrc r0, 0
7f40: fd cf rjmp .-6 ; 0x7f3c <main+0x13c> 7f48: fd cf rjmp .-6 ; 0x7f44 <main+0x144>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
7f42: c7 be out 0x37, r12 ; 55 7f4a: c7 be out 0x37, r12 ; 55
7f44: e8 95 spm 7f4c: e8 95 spm
7f46: 22 c0 rjmp .+68 ; 0x7f8c <main+0x18c> 7f4e: 22 c0 rjmp .+68 ; 0x7f94 <main+0x194>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
7f48: 84 37 cpi r24, 0x74 ; 116 7f50: 84 37 cpi r24, 0x74 ; 116
7f4a: 91 f4 brne .+36 ; 0x7f70 <main+0x170> 7f52: 91 f4 brne .+36 ; 0x7f78 <main+0x178>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
7f4c: 2a d0 rcall .+84 ; 0x7fa2 <getch> 7f54: 2a d0 rcall .+84 ; 0x7faa <getch>
7f4e: 90 e0 ldi r25, 0x00 ; 0
7f50: d8 2f mov r29, r24
7f52: cc 27 eor r28, r28
length |= getch();
7f54: 26 d0 rcall .+76 ; 0x7fa2 <getch>
7f56: 90 e0 ldi r25, 0x00 ; 0 7f56: 90 e0 ldi r25, 0x00 ; 0
7f58: c8 2b or r28, r24 7f58: d8 2f mov r29, r24
7f5a: d9 2b or r29, r25 7f5a: cc 27 eor r28, r28
length |= getch();
7f5c: 26 d0 rcall .+76 ; 0x7faa <getch>
7f5e: 90 e0 ldi r25, 0x00 ; 0
7f60: c8 2b or r28, r24
7f62: d9 2b or r29, r25
desttype = getch(); desttype = getch();
7f5c: 22 d0 rcall .+68 ; 0x7fa2 <getch> 7f64: 22 d0 rcall .+68 ; 0x7faa <getch>
verifySpace(); verifySpace();
7f5e: 33 d0 rcall .+102 ; 0x7fc6 <verifySpace> 7f66: 33 d0 rcall .+102 ; 0x7fce <verifySpace>
7f60: 85 01 movw r16, r10 7f68: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
7f62: f8 01 movw r30, r16 7f6a: f8 01 movw r30, r16
7f64: 85 91 lpm r24, Z+ 7f6c: 85 91 lpm r24, Z+
7f66: 8f 01 movw r16, r30 7f6e: 8f 01 movw r16, r30
7f68: 14 d0 rcall .+40 ; 0x7f92 <putch> 7f70: 14 d0 rcall .+40 ; 0x7f9a <putch>
} while (--length); } while (--length);
7f6a: 21 97 sbiw r28, 0x01 ; 1 7f72: 21 97 sbiw r28, 0x01 ; 1
7f6c: d1 f7 brne .-12 ; 0x7f62 <main+0x162> 7f74: d1 f7 brne .-12 ; 0x7f6a <main+0x16a>
7f6e: 0e c0 rjmp .+28 ; 0x7f8c <main+0x18c> 7f76: 0e c0 rjmp .+28 ; 0x7f94 <main+0x194>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
7f70: 85 37 cpi r24, 0x75 ; 117 7f78: 85 37 cpi r24, 0x75 ; 117
7f72: 39 f4 brne .+14 ; 0x7f82 <main+0x182> 7f7a: 39 f4 brne .+14 ; 0x7f8a <main+0x18a>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
7f74: 28 d0 rcall .+80 ; 0x7fc6 <verifySpace> 7f7c: 28 d0 rcall .+80 ; 0x7fce <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
7f76: 8e e1 ldi r24, 0x1E ; 30 7f7e: 8e e1 ldi r24, 0x1E ; 30
7f78: 0c d0 rcall .+24 ; 0x7f92 <putch> 7f80: 0c d0 rcall .+24 ; 0x7f9a <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
7f7a: 85 e9 ldi r24, 0x95 ; 149 7f82: 85 e9 ldi r24, 0x95 ; 149
7f7c: 0a d0 rcall .+20 ; 0x7f92 <putch> 7f84: 0a d0 rcall .+20 ; 0x7f9a <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
7f7e: 8f e0 ldi r24, 0x0F ; 15 7f86: 8f e0 ldi r24, 0x0F ; 15
7f80: 7d cf rjmp .-262 ; 0x7e7c <main+0x7c> 7f88: 7d cf rjmp .-262 ; 0x7e84 <main+0x84>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
7f82: 81 35 cpi r24, 0x51 ; 81 7f8a: 81 35 cpi r24, 0x51 ; 81
7f84: 11 f4 brne .+4 ; 0x7f8a <main+0x18a> 7f8c: 11 f4 brne .+4 ; 0x7f92 <main+0x192>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
7f86: 88 e0 ldi r24, 0x08 ; 8 7f8e: 88 e0 ldi r24, 0x08 ; 8
7f88: 18 d0 rcall .+48 ; 0x7fba <watchdogConfig> 7f90: 18 d0 rcall .+48 ; 0x7fc2 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
7f8a: 1d d0 rcall .+58 ; 0x7fc6 <verifySpace> 7f92: 1d d0 rcall .+58 ; 0x7fce <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
7f8c: 80 e1 ldi r24, 0x10 ; 16 7f94: 80 e1 ldi r24, 0x10 ; 16
7f8e: 01 d0 rcall .+2 ; 0x7f92 <putch> 7f96: 01 d0 rcall .+2 ; 0x7f9a <putch>
7f90: 68 cf rjmp .-304 ; 0x7e62 <main+0x62> 7f98: 66 cf rjmp .-308 ; 0x7e66 <main+0x66>
00007f92 <putch>: 00007f9a <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
7f92: 98 2f mov r25, r24 7f9a: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
7f94: 80 91 c0 00 lds r24, 0x00C0 7f9c: 80 91 c0 00 lds r24, 0x00C0
7f98: 85 ff sbrs r24, 5 7fa0: 85 ff sbrs r24, 5
7f9a: fc cf rjmp .-8 ; 0x7f94 <putch+0x2> 7fa2: fc cf rjmp .-8 ; 0x7f9c <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
7f9c: 90 93 c6 00 sts 0x00C6, r25 7fa4: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
7fa0: 08 95 ret 7fa8: 08 95 ret
00007fa2 <getch>: 00007faa <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
7fa2: 80 91 c0 00 lds r24, 0x00C0 7faa: 80 91 c0 00 lds r24, 0x00C0
7fa6: 87 ff sbrs r24, 7 7fae: 87 ff sbrs r24, 7
7fa8: fc cf rjmp .-8 ; 0x7fa2 <getch> 7fb0: fc cf rjmp .-8 ; 0x7faa <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
7faa: 80 91 c0 00 lds r24, 0x00C0 7fb2: 80 91 c0 00 lds r24, 0x00C0
7fae: 84 fd sbrc r24, 4 7fb6: 84 fd sbrc r24, 4
7fb0: 01 c0 rjmp .+2 ; 0x7fb4 <getch+0x12> 7fb8: 01 c0 rjmp .+2 ; 0x7fbc <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
7fb2: a8 95 wdr 7fba: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
7fb4: 80 91 c6 00 lds r24, 0x00C6 7fbc: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
7fb8: 08 95 ret 7fc0: 08 95 ret
00007fba <watchdogConfig>: 00007fc2 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
7fba: e0 e6 ldi r30, 0x60 ; 96 7fc2: e0 e6 ldi r30, 0x60 ; 96
7fbc: f0 e0 ldi r31, 0x00 ; 0 7fc4: f0 e0 ldi r31, 0x00 ; 0
7fbe: 98 e1 ldi r25, 0x18 ; 24 7fc6: 98 e1 ldi r25, 0x18 ; 24
7fc0: 90 83 st Z, r25 7fc8: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
7fc2: 80 83 st Z, r24 7fca: 80 83 st Z, r24
} }
7fc4: 08 95 ret 7fcc: 08 95 ret
00007fc6 <verifySpace>: 00007fce <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
7fc6: ed df rcall .-38 ; 0x7fa2 <getch> 7fce: ed df rcall .-38 ; 0x7faa <getch>
7fc8: 80 32 cpi r24, 0x20 ; 32 7fd0: 80 32 cpi r24, 0x20 ; 32
7fca: 19 f0 breq .+6 ; 0x7fd2 <verifySpace+0xc> 7fd2: 19 f0 breq .+6 ; 0x7fda <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
7fcc: 88 e0 ldi r24, 0x08 ; 8 7fd4: 88 e0 ldi r24, 0x08 ; 8
7fce: f5 df rcall .-22 ; 0x7fba <watchdogConfig> 7fd6: f5 df rcall .-22 ; 0x7fc2 <watchdogConfig>
7fd0: ff cf rjmp .-2 ; 0x7fd0 <verifySpace+0xa> 7fd8: ff cf rjmp .-2 ; 0x7fd8 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
7fd2: 84 e1 ldi r24, 0x14 ; 20 7fda: 84 e1 ldi r24, 0x14 ; 20
} }
7fd4: de cf rjmp .-68 ; 0x7f92 <putch> 7fdc: de cf rjmp .-68 ; 0x7f9a <putch>
00007fd6 <getNch>: 00007fde <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
7fd6: 1f 93 push r17 7fde: 1f 93 push r17
7fd8: 18 2f mov r17, r24 7fe0: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
7fda: e3 df rcall .-58 ; 0x7fa2 <getch> 7fe2: e3 df rcall .-58 ; 0x7faa <getch>
7fdc: 11 50 subi r17, 0x01 ; 1 7fe4: 11 50 subi r17, 0x01 ; 1
7fde: e9 f7 brne .-6 ; 0x7fda <getNch+0x4> 7fe6: e9 f7 brne .-6 ; 0x7fe2 <getNch+0x4>
verifySpace(); verifySpace();
7fe0: f2 df rcall .-28 ; 0x7fc6 <verifySpace> 7fe8: f2 df rcall .-28 ; 0x7fce <verifySpace>
} }
7fe2: 1f 91 pop r17 7fea: 1f 91 pop r17
7fe4: 08 95 ret 7fec: 08 95 ret
00007fe6 <appStart>: 00007fee <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
7fe6: 28 2e mov r2, r24 7fee: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
7fe8: 80 e0 ldi r24, 0x00 ; 0 7ff0: 80 e0 ldi r24, 0x00 ; 0
7fea: e7 df rcall .-50 ; 0x7fba <watchdogConfig> 7ff2: e7 df rcall .-50 ; 0x7fc2 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
7fec: ee 27 eor r30, r30 7ff4: ee 27 eor r30, r30
7fee: ff 27 eor r31, r31 7ff6: ff 27 eor r31, r31
7ff0: 09 94 ijmp 7ff8: 09 94 ijmp

528
optiboot/bootloaders/optiboot/optiboot_diecimila.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega168.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f0 00003e00 00003e00 00000074 2**1 0 .text 000001f8 00003e00 00003e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00003ffe 00003ffe 00000264 2**0 1 .version 00000002 00003ffe 00003ffe 0000026c 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000266 2**0 2 .debug_aranges 00000028 00000000 00000000 0000026e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 0000028e 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000296 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000302 2**0 4 .debug_info 000003e0 00000000 00000000 0000030a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006dd 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ea 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000423 00000000 00000000 000008c7 2**0 6 .debug_line 00000433 00000000 00000000 000008db 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cec 2**2 7 .debug_frame 00000080 00000000 00000000 00000d10 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d6c 2**0 8 .debug_str 00000172 00000000 00000000 00000d90 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ede 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f02 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011b5 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011d9 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,563 +36,569 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3e00: 11 24 eor r1, r1 3e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
3e02: 84 b7 in r24, 0x34 ; 52 3e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
3e04: 14 be out 0x34, r1 ; 52 3e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
3e06: 81 fd sbrc r24, 1 3e06: 89 2f mov r24, r25
3e08: 01 c0 rjmp .+2 ; 0x3e0c <main+0xc> 3e08: 8d 70 andi r24, 0x0D ; 13
3e0a: ec d0 rcall .+472 ; 0x3fe4 <appStart> 3e0a: 11 f0 breq .+4 ; 0x3e10 <main+0x10>
appStart(ch);
3e0c: 89 2f mov r24, r25
3e0e: ee d0 rcall .+476 ; 0x3fec <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
3e0c: 85 e0 ldi r24, 0x05 ; 5 3e10: 85 e0 ldi r24, 0x05 ; 5
3e0e: 80 93 81 00 sts 0x0081, r24 3e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
3e12: 82 e0 ldi r24, 0x02 ; 2 3e16: 82 e0 ldi r24, 0x02 ; 2
3e14: 80 93 c0 00 sts 0x00C0, r24 3e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
3e18: 88 e1 ldi r24, 0x18 ; 24 3e1c: 88 e1 ldi r24, 0x18 ; 24
3e1a: 80 93 c1 00 sts 0x00C1, r24 3e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
3e1e: 86 e0 ldi r24, 0x06 ; 6 3e22: 86 e0 ldi r24, 0x06 ; 6
3e20: 80 93 c2 00 sts 0x00C2, r24 3e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
3e24: 80 e1 ldi r24, 0x10 ; 16 3e28: 80 e1 ldi r24, 0x10 ; 16
3e26: 80 93 c4 00 sts 0x00C4, r24 3e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
3e2a: 8e e0 ldi r24, 0x0E ; 14 3e2e: 8e e0 ldi r24, 0x0E ; 14
3e2c: c5 d0 rcall .+394 ; 0x3fb8 <watchdogConfig> 3e30: c7 d0 rcall .+398 ; 0x3fc0 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
3e2e: 25 9a sbi 0x04, 5 ; 4 3e32: 25 9a sbi 0x04, 5 ; 4
3e30: 86 e0 ldi r24, 0x06 ; 6 3e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e32: 20 e3 ldi r18, 0x30 ; 48 3e36: 20 e3 ldi r18, 0x30 ; 48
3e34: 3c ef ldi r19, 0xFC ; 252 3e38: 3c ef ldi r19, 0xFC ; 252
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e36: 91 e0 ldi r25, 0x01 ; 1 3e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e38: 30 93 85 00 sts 0x0085, r19 3e3c: 30 93 85 00 sts 0x0085, r19
3e3c: 20 93 84 00 sts 0x0084, r18 3e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e40: 96 bb out 0x16, r25 ; 22 3e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
3e42: b0 9b sbis 0x16, 0 ; 22 3e46: b0 9b sbis 0x16, 0 ; 22
3e44: fe cf rjmp .-4 ; 0x3e42 <main+0x42> 3e48: fe cf rjmp .-4 ; 0x3e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
3e46: 1d 9a sbi 0x03, 5 ; 3 3e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3e48: a8 95 wdr 3e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
3e4a: 81 50 subi r24, 0x01 ; 1 3e4e: 81 50 subi r24, 0x01 ; 1
3e4c: a9 f7 brne .-22 ; 0x3e38 <main+0x38> 3e50: a9 f7 brne .-22 ; 0x3e3c <main+0x3c>
3e4e: aa 24 eor r10, r10 3e52: aa 24 eor r10, r10
3e50: bb 24 eor r11, r11 3e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3e52: 33 e0 ldi r19, 0x03 ; 3 3e56: 33 e0 ldi r19, 0x03 ; 3
3e54: 83 2e mov r8, r19 3e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3e56: 77 24 eor r7, r7 3e5a: 77 24 eor r7, r7
3e58: 73 94 inc r7 3e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3e5a: 25 e0 ldi r18, 0x05 ; 5 3e5e: 25 e0 ldi r18, 0x05 ; 5
3e5c: 92 2e mov r9, r18 3e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3e5e: 91 e1 ldi r25, 0x11 ; 17 3e62: 91 e1 ldi r25, 0x11 ; 17
3e60: c9 2e mov r12, r25 3e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
3e62: 9e d0 rcall .+316 ; 0x3fa0 <getch> 3e66: a0 d0 rcall .+320 ; 0x3fa8 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
3e64: 81 34 cpi r24, 0x41 ; 65 3e68: 81 34 cpi r24, 0x41 ; 65
3e66: 59 f4 brne .+22 ; 0x3e7e <main+0x7e> 3e6a: 69 f4 brne .+26 ; 0x3e86 <main+0x86>
unsigned char which = getch(); unsigned char which = getch();
3e68: 9b d0 rcall .+310 ; 0x3fa0 <getch> 3e6c: 9d d0 rcall .+314 ; 0x3fa8 <getch>
3e6a: 18 2f mov r17, r24 3e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
3e6c: ab d0 rcall .+342 ; 0x3fc4 <verifySpace> 3e70: ad d0 rcall .+346 ; 0x3fcc <verifySpace>
if (which == 0x82) {
3e6e: 12 38 cpi r17, 0x82 ; 130
3e70: 21 f1 breq .+72 ; 0x3eba <main+0xba>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
3e72: 12 38 cpi r17, 0x82 ; 130
3e74: 11 f4 brne .+4 ; 0x3e7a <main+0x7a>
putch(optiboot_version & 0xFF);
3e76: 81 e0 ldi r24, 0x01 ; 1
3e78: 04 c0 rjmp .+8 ; 0x3e82 <main+0x82>
} else if (which == 0x81) { } else if (which == 0x81) {
3e72: 11 38 cpi r17, 0x81 ; 129 3e7a: 11 38 cpi r17, 0x81 ; 129
3e74: 09 f4 brne .+2 ; 0x3e78 <main+0x78> 3e7c: 09 f4 brne .+2 ; 0x3e80 <main+0x80>
3e76: 82 c0 rjmp .+260 ; 0x3f7c <main+0x17c> 3e7e: 82 c0 rjmp .+260 ; 0x3f84 <main+0x184>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
3e78: 83 e0 ldi r24, 0x03 ; 3 3e80: 83 e0 ldi r24, 0x03 ; 3
3e7a: 8a d0 rcall .+276 ; 0x3f90 <putch> 3e82: 8a d0 rcall .+276 ; 0x3f98 <putch>
3e7c: 86 c0 rjmp .+268 ; 0x3f8a <main+0x18a> 3e84: 86 c0 rjmp .+268 ; 0x3f92 <main+0x192>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
3e7e: 82 34 cpi r24, 0x42 ; 66 3e86: 82 34 cpi r24, 0x42 ; 66
3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86> 3e88: 11 f4 brne .+4 ; 0x3e8e <main+0x8e>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
3e82: 84 e1 ldi r24, 0x14 ; 20 3e8a: 84 e1 ldi r24, 0x14 ; 20
3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c> 3e8c: 03 c0 rjmp .+6 ; 0x3e94 <main+0x94>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
3e86: 85 34 cpi r24, 0x45 ; 69 3e8e: 85 34 cpi r24, 0x45 ; 69
3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90> 3e90: 19 f4 brne .+6 ; 0x3e98 <main+0x98>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
3e8a: 85 e0 ldi r24, 0x05 ; 5 3e92: 85 e0 ldi r24, 0x05 ; 5
3e8c: a3 d0 rcall .+326 ; 0x3fd4 <getNch> 3e94: a3 d0 rcall .+326 ; 0x3fdc <getNch>
3e8e: 7d c0 rjmp .+250 ; 0x3f8a <main+0x18a> 3e96: 7d c0 rjmp .+250 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
3e90: 85 35 cpi r24, 0x55 ; 85 3e98: 85 35 cpi r24, 0x55 ; 85
3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2> 3e9a: 79 f4 brne .+30 ; 0x3eba <main+0xba>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
3e94: 85 d0 rcall .+266 ; 0x3fa0 <getch> 3e9c: 85 d0 rcall .+266 ; 0x3fa8 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
3e96: e8 2e mov r14, r24 3e9e: e8 2e mov r14, r24
3e98: ff 24 eor r15, r15 3ea0: ff 24 eor r15, r15
3e9a: 82 d0 rcall .+260 ; 0x3fa0 <getch> 3ea2: 82 d0 rcall .+260 ; 0x3fa8 <getch>
3e9c: 08 2f mov r16, r24 3ea4: 08 2f mov r16, r24
3e9e: 10 e0 ldi r17, 0x00 ; 0 3ea6: 10 e0 ldi r17, 0x00 ; 0
3ea0: 10 2f mov r17, r16 3ea8: 10 2f mov r17, r16
3ea2: 00 27 eor r16, r16 3eaa: 00 27 eor r16, r16
3ea4: 0e 29 or r16, r14 3eac: 0e 29 or r16, r14
3ea6: 1f 29 or r17, r15 3eae: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
3ea8: 00 0f add r16, r16 3eb0: 00 0f add r16, r16
3eaa: 11 1f adc r17, r17 3eb2: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
3eac: 8b d0 rcall .+278 ; 0x3fc4 <verifySpace> 3eb4: 8b d0 rcall .+278 ; 0x3fcc <verifySpace>
3eae: 58 01 movw r10, r16 3eb6: 58 01 movw r10, r16
3eb0: 6c c0 rjmp .+216 ; 0x3f8a <main+0x18a> 3eb8: 6c c0 rjmp .+216 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
3eb2: 86 35 cpi r24, 0x56 ; 86 3eba: 86 35 cpi r24, 0x56 ; 86
3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe> 3ebc: 21 f4 brne .+8 ; 0x3ec6 <main+0xc6>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
3eb6: 84 e0 ldi r24, 0x04 ; 4 3ebe: 84 e0 ldi r24, 0x04 ; 4
3eb8: 8d d0 rcall .+282 ; 0x3fd4 <getNch> 3ec0: 8d d0 rcall .+282 ; 0x3fdc <getNch>
putch(0x00); putch(0x00);
3eba: 80 e0 ldi r24, 0x00 ; 0 3ec2: 80 e0 ldi r24, 0x00 ; 0
3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a> 3ec4: de cf rjmp .-68 ; 0x3e82 <main+0x82>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
3ebe: 84 36 cpi r24, 0x64 ; 100 3ec6: 84 36 cpi r24, 0x64 ; 100
3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4> 3ec8: 09 f0 breq .+2 ; 0x3ecc <main+0xcc>
3ec2: 41 c0 rjmp .+130 ; 0x3f46 <main+0x146> 3eca: 41 c0 rjmp .+130 ; 0x3f4e <main+0x14e>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3ec4: 6d d0 rcall .+218 ; 0x3fa0 <getch> 3ecc: 6d d0 rcall .+218 ; 0x3fa8 <getch>
3ec6: 90 e0 ldi r25, 0x00 ; 0
3ec8: 18 2f mov r17, r24
3eca: 00 27 eor r16, r16
length |= getch();
3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch>
3ece: 90 e0 ldi r25, 0x00 ; 0 3ece: 90 e0 ldi r25, 0x00 ; 0
3ed0: 08 2b or r16, r24 3ed0: 18 2f mov r17, r24
3ed2: 19 2b or r17, r25 3ed2: 00 27 eor r16, r16
length |= getch();
3ed4: 69 d0 rcall .+210 ; 0x3fa8 <getch>
3ed6: 90 e0 ldi r25, 0x00 ; 0
3ed8: 08 2b or r16, r24
3eda: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
3ed4: 65 d0 rcall .+202 ; 0x3fa0 <getch> 3edc: 65 d0 rcall .+202 ; 0x3fa8 <getch>
3ed6: d8 2e mov r13, r24 3ede: d8 2e mov r13, r24
3ed8: e8 01 movw r28, r16 3ee0: e8 01 movw r28, r16
3eda: e1 2c mov r14, r1 3ee2: e1 2c mov r14, r1
3edc: f1 e0 ldi r31, 0x01 ; 1 3ee4: f1 e0 ldi r31, 0x01 ; 1
3ede: ff 2e mov r15, r31 3ee6: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
3ee0: 5f d0 rcall .+190 ; 0x3fa0 <getch> 3ee8: 5f d0 rcall .+190 ; 0x3fa8 <getch>
3ee2: f7 01 movw r30, r14 3eea: f7 01 movw r30, r14
3ee4: 81 93 st Z+, r24 3eec: 81 93 st Z+, r24
3ee6: 7f 01 movw r14, r30 3eee: 7f 01 movw r14, r30
while (--length); while (--length);
3ee8: 21 97 sbiw r28, 0x01 ; 1 3ef0: 21 97 sbiw r28, 0x01 ; 1
3eea: d1 f7 brne .-12 ; 0x3ee0 <main+0xe0> 3ef2: d1 f7 brne .-12 ; 0x3ee8 <main+0xe8>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
3eec: 6b d0 rcall .+214 ; 0x3fc4 <verifySpace> 3ef4: 6b d0 rcall .+214 ; 0x3fcc <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
3eee: f5 e4 ldi r31, 0x45 ; 69 3ef6: f5 e4 ldi r31, 0x45 ; 69
3ef0: df 16 cp r13, r31 3ef8: df 16 cp r13, r31
3ef2: 09 f4 brne .+2 ; 0x3ef6 <main+0xf6> 3efa: 09 f4 brne .+2 ; 0x3efe <main+0xfe>
3ef4: ff cf rjmp .-2 ; 0x3ef4 <main+0xf4> 3efc: ff cf rjmp .-2 ; 0x3efc <main+0xfc>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3ef6: f5 01 movw r30, r10 3efe: f5 01 movw r30, r10
3ef8: 87 be out 0x37, r8 ; 55 3f00: 87 be out 0x37, r8 ; 55
3efa: e8 95 spm 3f02: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3efc: 07 b6 in r0, 0x37 ; 55 3f04: 07 b6 in r0, 0x37 ; 55
3efe: 00 fc sbrc r0, 0 3f06: 00 fc sbrc r0, 0
3f00: fd cf rjmp .-6 ; 0x3efc <main+0xfc> 3f08: fd cf rjmp .-6 ; 0x3f04 <main+0x104>
3f02: b5 01 movw r22, r10 3f0a: b5 01 movw r22, r10
3f04: a8 01 movw r20, r16 3f0c: a8 01 movw r20, r16
3f06: a0 e0 ldi r26, 0x00 ; 0 3f0e: a0 e0 ldi r26, 0x00 ; 0
3f08: b1 e0 ldi r27, 0x01 ; 1 3f10: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
3f0a: 2c 91 ld r18, X 3f12: 2c 91 ld r18, X
3f0c: 30 e0 ldi r19, 0x00 ; 0 3f14: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
3f0e: 11 96 adiw r26, 0x01 ; 1 3f16: 11 96 adiw r26, 0x01 ; 1
3f10: 8c 91 ld r24, X 3f18: 8c 91 ld r24, X
3f12: 11 97 sbiw r26, 0x01 ; 1 3f1a: 11 97 sbiw r26, 0x01 ; 1
3f14: 90 e0 ldi r25, 0x00 ; 0 3f1c: 90 e0 ldi r25, 0x00 ; 0
3f16: 98 2f mov r25, r24 3f1e: 98 2f mov r25, r24
3f18: 88 27 eor r24, r24 3f20: 88 27 eor r24, r24
3f1a: 82 2b or r24, r18 3f22: 82 2b or r24, r18
3f1c: 93 2b or r25, r19 3f24: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3f1e: 12 96 adiw r26, 0x02 ; 2 3f26: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3f20: fb 01 movw r30, r22 3f28: fb 01 movw r30, r22
3f22: 0c 01 movw r0, r24 3f2a: 0c 01 movw r0, r24
3f24: 77 be out 0x37, r7 ; 55 3f2c: 77 be out 0x37, r7 ; 55
3f26: e8 95 spm 3f2e: e8 95 spm
3f28: 11 24 eor r1, r1 3f30: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
3f2a: 6e 5f subi r22, 0xFE ; 254 3f32: 6e 5f subi r22, 0xFE ; 254
3f2c: 7f 4f sbci r23, 0xFF ; 255 3f34: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
3f2e: 42 50 subi r20, 0x02 ; 2 3f36: 42 50 subi r20, 0x02 ; 2
3f30: 50 40 sbci r21, 0x00 ; 0 3f38: 50 40 sbci r21, 0x00 ; 0
3f32: 59 f7 brne .-42 ; 0x3f0a <main+0x10a> 3f3a: 59 f7 brne .-42 ; 0x3f12 <main+0x112>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3f34: f5 01 movw r30, r10 3f3c: f5 01 movw r30, r10
3f36: 97 be out 0x37, r9 ; 55 3f3e: 97 be out 0x37, r9 ; 55
3f38: e8 95 spm 3f40: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3f3a: 07 b6 in r0, 0x37 ; 55 3f42: 07 b6 in r0, 0x37 ; 55
3f3c: 00 fc sbrc r0, 0 3f44: 00 fc sbrc r0, 0
3f3e: fd cf rjmp .-6 ; 0x3f3a <main+0x13a> 3f46: fd cf rjmp .-6 ; 0x3f42 <main+0x142>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3f40: c7 be out 0x37, r12 ; 55 3f48: c7 be out 0x37, r12 ; 55
3f42: e8 95 spm 3f4a: e8 95 spm
3f44: 22 c0 rjmp .+68 ; 0x3f8a <main+0x18a> 3f4c: 22 c0 rjmp .+68 ; 0x3f92 <main+0x192>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
3f46: 84 37 cpi r24, 0x74 ; 116 3f4e: 84 37 cpi r24, 0x74 ; 116
3f48: 91 f4 brne .+36 ; 0x3f6e <main+0x16e> 3f50: 91 f4 brne .+36 ; 0x3f76 <main+0x176>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3f4a: 2a d0 rcall .+84 ; 0x3fa0 <getch> 3f52: 2a d0 rcall .+84 ; 0x3fa8 <getch>
3f4c: 90 e0 ldi r25, 0x00 ; 0
3f4e: d8 2f mov r29, r24
3f50: cc 27 eor r28, r28
length |= getch();
3f52: 26 d0 rcall .+76 ; 0x3fa0 <getch>
3f54: 90 e0 ldi r25, 0x00 ; 0 3f54: 90 e0 ldi r25, 0x00 ; 0
3f56: c8 2b or r28, r24 3f56: d8 2f mov r29, r24
3f58: d9 2b or r29, r25 3f58: cc 27 eor r28, r28
length |= getch();
3f5a: 26 d0 rcall .+76 ; 0x3fa8 <getch>
3f5c: 90 e0 ldi r25, 0x00 ; 0
3f5e: c8 2b or r28, r24
3f60: d9 2b or r29, r25
desttype = getch(); desttype = getch();
3f5a: 22 d0 rcall .+68 ; 0x3fa0 <getch> 3f62: 22 d0 rcall .+68 ; 0x3fa8 <getch>
verifySpace(); verifySpace();
3f5c: 33 d0 rcall .+102 ; 0x3fc4 <verifySpace> 3f64: 33 d0 rcall .+102 ; 0x3fcc <verifySpace>
3f5e: 85 01 movw r16, r10 3f66: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
3f60: f8 01 movw r30, r16 3f68: f8 01 movw r30, r16
3f62: 85 91 lpm r24, Z+ 3f6a: 85 91 lpm r24, Z+
3f64: 8f 01 movw r16, r30 3f6c: 8f 01 movw r16, r30
3f66: 14 d0 rcall .+40 ; 0x3f90 <putch> 3f6e: 14 d0 rcall .+40 ; 0x3f98 <putch>
} while (--length); } while (--length);
3f68: 21 97 sbiw r28, 0x01 ; 1 3f70: 21 97 sbiw r28, 0x01 ; 1
3f6a: d1 f7 brne .-12 ; 0x3f60 <main+0x160> 3f72: d1 f7 brne .-12 ; 0x3f68 <main+0x168>
3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a> 3f74: 0e c0 rjmp .+28 ; 0x3f92 <main+0x192>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
3f6e: 85 37 cpi r24, 0x75 ; 117 3f76: 85 37 cpi r24, 0x75 ; 117
3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180> 3f78: 39 f4 brne .+14 ; 0x3f88 <main+0x188>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
3f72: 28 d0 rcall .+80 ; 0x3fc4 <verifySpace> 3f7a: 28 d0 rcall .+80 ; 0x3fcc <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
3f74: 8e e1 ldi r24, 0x1E ; 30 3f7c: 8e e1 ldi r24, 0x1E ; 30
3f76: 0c d0 rcall .+24 ; 0x3f90 <putch> 3f7e: 0c d0 rcall .+24 ; 0x3f98 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
3f78: 84 e9 ldi r24, 0x94 ; 148 3f80: 84 e9 ldi r24, 0x94 ; 148
3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch> 3f82: 0a d0 rcall .+20 ; 0x3f98 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
3f7c: 86 e0 ldi r24, 0x06 ; 6 3f84: 86 e0 ldi r24, 0x06 ; 6
3f7e: 7d cf rjmp .-262 ; 0x3e7a <main+0x7a> 3f86: 7d cf rjmp .-262 ; 0x3e82 <main+0x82>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
3f80: 81 35 cpi r24, 0x51 ; 81 3f88: 81 35 cpi r24, 0x51 ; 81
3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188> 3f8a: 11 f4 brne .+4 ; 0x3f90 <main+0x190>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
3f84: 88 e0 ldi r24, 0x08 ; 8 3f8c: 88 e0 ldi r24, 0x08 ; 8
3f86: 18 d0 rcall .+48 ; 0x3fb8 <watchdogConfig> 3f8e: 18 d0 rcall .+48 ; 0x3fc0 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
3f88: 1d d0 rcall .+58 ; 0x3fc4 <verifySpace> 3f90: 1d d0 rcall .+58 ; 0x3fcc <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
3f8a: 80 e1 ldi r24, 0x10 ; 16 3f92: 80 e1 ldi r24, 0x10 ; 16
3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch> 3f94: 01 d0 rcall .+2 ; 0x3f98 <putch>
3f8e: 69 cf rjmp .-302 ; 0x3e62 <main+0x62> 3f96: 67 cf rjmp .-306 ; 0x3e66 <main+0x66>
00003f90 <putch>: 00003f98 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
3f90: 98 2f mov r25, r24 3f98: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
3f92: 80 91 c0 00 lds r24, 0x00C0 3f9a: 80 91 c0 00 lds r24, 0x00C0
3f96: 85 ff sbrs r24, 5 3f9e: 85 ff sbrs r24, 5
3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2> 3fa0: fc cf rjmp .-8 ; 0x3f9a <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
3f9a: 90 93 c6 00 sts 0x00C6, r25 3fa2: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
3f9e: 08 95 ret 3fa6: 08 95 ret
00003fa0 <getch>: 00003fa8 <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
3fa0: 80 91 c0 00 lds r24, 0x00C0 3fa8: 80 91 c0 00 lds r24, 0x00C0
3fa4: 87 ff sbrs r24, 7 3fac: 87 ff sbrs r24, 7
3fa6: fc cf rjmp .-8 ; 0x3fa0 <getch> 3fae: fc cf rjmp .-8 ; 0x3fa8 <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
3fa8: 80 91 c0 00 lds r24, 0x00C0 3fb0: 80 91 c0 00 lds r24, 0x00C0
3fac: 84 fd sbrc r24, 4 3fb4: 84 fd sbrc r24, 4
3fae: 01 c0 rjmp .+2 ; 0x3fb2 <getch+0x12> 3fb6: 01 c0 rjmp .+2 ; 0x3fba <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3fb0: a8 95 wdr 3fb8: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
3fb2: 80 91 c6 00 lds r24, 0x00C6 3fba: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
3fb6: 08 95 ret 3fbe: 08 95 ret
00003fb8 <watchdogConfig>: 00003fc0 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
3fb8: e0 e6 ldi r30, 0x60 ; 96 3fc0: e0 e6 ldi r30, 0x60 ; 96
3fba: f0 e0 ldi r31, 0x00 ; 0 3fc2: f0 e0 ldi r31, 0x00 ; 0
3fbc: 98 e1 ldi r25, 0x18 ; 24 3fc4: 98 e1 ldi r25, 0x18 ; 24
3fbe: 90 83 st Z, r25 3fc6: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
3fc0: 80 83 st Z, r24 3fc8: 80 83 st Z, r24
} }
3fc2: 08 95 ret 3fca: 08 95 ret
00003fc4 <verifySpace>: 00003fcc <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
3fc4: ed df rcall .-38 ; 0x3fa0 <getch> 3fcc: ed df rcall .-38 ; 0x3fa8 <getch>
3fc6: 80 32 cpi r24, 0x20 ; 32 3fce: 80 32 cpi r24, 0x20 ; 32
3fc8: 19 f0 breq .+6 ; 0x3fd0 <verifySpace+0xc> 3fd0: 19 f0 breq .+6 ; 0x3fd8 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
3fca: 88 e0 ldi r24, 0x08 ; 8 3fd2: 88 e0 ldi r24, 0x08 ; 8
3fcc: f5 df rcall .-22 ; 0x3fb8 <watchdogConfig> 3fd4: f5 df rcall .-22 ; 0x3fc0 <watchdogConfig>
3fce: ff cf rjmp .-2 ; 0x3fce <verifySpace+0xa> 3fd6: ff cf rjmp .-2 ; 0x3fd6 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
3fd0: 84 e1 ldi r24, 0x14 ; 20 3fd8: 84 e1 ldi r24, 0x14 ; 20
} }
3fd2: de cf rjmp .-68 ; 0x3f90 <putch> 3fda: de cf rjmp .-68 ; 0x3f98 <putch>
00003fd4 <getNch>: 00003fdc <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
3fd4: 1f 93 push r17 3fdc: 1f 93 push r17
3fd6: 18 2f mov r17, r24 3fde: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
3fd8: e3 df rcall .-58 ; 0x3fa0 <getch> 3fe0: e3 df rcall .-58 ; 0x3fa8 <getch>
3fda: 11 50 subi r17, 0x01 ; 1 3fe2: 11 50 subi r17, 0x01 ; 1
3fdc: e9 f7 brne .-6 ; 0x3fd8 <getNch+0x4> 3fe4: e9 f7 brne .-6 ; 0x3fe0 <getNch+0x4>
verifySpace(); verifySpace();
3fde: f2 df rcall .-28 ; 0x3fc4 <verifySpace> 3fe6: f2 df rcall .-28 ; 0x3fcc <verifySpace>
} }
3fe0: 1f 91 pop r17 3fe8: 1f 91 pop r17
3fe2: 08 95 ret 3fea: 08 95 ret
00003fe4 <appStart>: 00003fec <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
3fe4: 28 2e mov r2, r24 3fec: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
3fe6: 80 e0 ldi r24, 0x00 ; 0 3fee: 80 e0 ldi r24, 0x00 ; 0
3fe8: e7 df rcall .-50 ; 0x3fb8 <watchdogConfig> 3ff0: e7 df rcall .-50 ; 0x3fc0 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
3fea: ee 27 eor r30, r30 3ff2: ee 27 eor r30, r30
3fec: ff 27 eor r31, r31 3ff4: ff 27 eor r31, r31
3fee: 09 94 ijmp 3ff6: 09 94 ijmp

65
optiboot/bootloaders/optiboot/optiboot_lilypad.hex
View File

@@ -1,34 +1,35 @@
:103E0000112484B714BE81FD01C0ECD085E08093FD :103E0000112494B714BE892F8D7011F0892FEED034
:103E1000810082E08093C00088E18093C10086E049 :103E100085E08093810082E08093C00088E18093F8
:103E20008093C20088E08093C4008EE0C5D0259ABC :103E2000C10086E08093C20088E08093C4008EE0E9
:103E300086E028E13EEF91E03093850020938400F6 :103E3000C7D0259A86E028E13EEF91E030938500D7
:103E400096BBB09BFECF1D9AA8958150A9F7AA24D6 :103E40002093840096BBB09BFECF1D9AA89581500D
:103E5000BB2433E0832E7724739425E0922E91E1E6 :103E5000A9F7AA24BB2433E0832E7724739425E0AA
:103E6000C92E9ED0813459F49BD0182FABD0123874 :103E6000922E91E1C92EA0D0813469F49DD0182FF3
:103E700021F1113809F482C083E08AD086C08234EF :103E7000ADD0123811F481E004C0113809F482C0C9
:103E800011F484E103C0853419F485E0A3D07DC02A :103E800083E08AD086C0823411F484E103C0853493
:103E9000853579F485D0E82EFF2482D0082F10E0F4 :103E900019F485E0A3D07DC0853579F485D0E82E6E
:103EA000102F00270E291F29000F111F8BD058013A :103EA000FF2482D0082F10E0102F00270E291F2991
:103EB0006CC0863521F484E08DD080E0DECF84367E :103EB000000F111F8BD058016CC0863521F484E0AF
:103EC00009F041C06DD090E0182F002769D090E034 :103EC0008DD080E0DECF843609F041C06DD090E027
:103ED000082B192B65D0D82EE801E12CF1E0FF2E3C :103ED000182F002769D090E0082B192B65D0D82E19
:103EE0005FD0F70181937F012197D1F76BD0F5E483 :103EE000E801E12CF1E0FF2E5FD0F70181937F0123
:103EF000DF1609F4FFCFF50187BEE89507B600FC91 :103EF0002197D1F76BD0F5E4DF1609F4FFCFF50178
:103F0000FDCFB501A801A0E0B1E02C9130E0119601 :103F000087BEE89507B600FCFDCFB501A801A0E08B
:103F10008C91119790E0982F8827822B932B1296E3 :103F1000B1E02C9130E011968C91119790E0982FA0
:103F2000FB010C0177BEE89511246E5F7F4F425074 :103F20008827822B932B1296FB010C0177BEE89514
:103F3000504059F7F50197BEE89507B600FCFDCF54 :103F300011246E5F7F4F4250504059F7F50197BEF4
:103F4000C7BEE89522C0843791F42AD090E0D82FDC :103F4000E89507B600FCFDCFC7BEE89522C08437D0
:103F5000CC2726D090E0C82BD92B22D033D0850196 :103F500091F42AD090E0D82FCC2726D090E0C82B1F
:103F6000F80185918F0114D02197D1F70EC08537C4 :103F6000D92B22D033D08501F80185918F0114D04F
:103F700039F428D08EE10CD084E90AD086E07DCFD8 :103F70002197D1F70EC0853739F428D08EE10CD0C7
:103F8000813511F488E018D01DD080E101D069CFCF :103F800084E90AD086E07DCF813511F488E018D02D
:103F9000982F8091C00085FFFCCF9093C6000895B4 :103F90001DD080E101D067CF982F8091C00085FFB0
:103FA0008091C00087FFFCCF8091C00084FD01C0DC :103FA000FCCF9093C60008958091C00087FFFCCF9E
:103FB000A8958091C6000895E0E6F0E098E190832E :103FB0008091C00084FD01C0A8958091C60008953D
:103FC00080830895EDDF803219F088E0F5DFFFCFC0 :103FC000E0E6F0E098E1908380830895EDDF8032B1
:103FD00084E1DECF1F93182FE3DF1150E9F7F2DF02 :103FD00019F088E0F5DFFFCF84E1DECF1F93182FC3
:103FE0001F910895282E80E0E7DFEE27FF27099430 :103FE000E3DF1150E9F7F2DF1F910895282E80E0FA
:023FFE000006BB :083FF000E7DFEE27FF2709942B
:023FFE000106BA
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

528
optiboot/bootloaders/optiboot/optiboot_lilypad.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega168.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f0 00003e00 00003e00 00000074 2**1 0 .text 000001f8 00003e00 00003e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00003ffe 00003ffe 00000264 2**0 1 .version 00000002 00003ffe 00003ffe 0000026c 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000266 2**0 2 .debug_aranges 00000028 00000000 00000000 0000026e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 0000028e 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000296 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000302 2**0 4 .debug_info 000003e0 00000000 00000000 0000030a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006dd 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ea 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000423 00000000 00000000 000008c7 2**0 6 .debug_line 00000433 00000000 00000000 000008db 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cec 2**2 7 .debug_frame 00000080 00000000 00000000 00000d10 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d6c 2**0 8 .debug_str 00000172 00000000 00000000 00000d90 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ede 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f02 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011b5 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011d9 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,563 +36,569 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3e00: 11 24 eor r1, r1 3e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
3e02: 84 b7 in r24, 0x34 ; 52 3e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
3e04: 14 be out 0x34, r1 ; 52 3e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
3e06: 81 fd sbrc r24, 1 3e06: 89 2f mov r24, r25
3e08: 01 c0 rjmp .+2 ; 0x3e0c <main+0xc> 3e08: 8d 70 andi r24, 0x0D ; 13
3e0a: ec d0 rcall .+472 ; 0x3fe4 <appStart> 3e0a: 11 f0 breq .+4 ; 0x3e10 <main+0x10>
appStart(ch);
3e0c: 89 2f mov r24, r25
3e0e: ee d0 rcall .+476 ; 0x3fec <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
3e0c: 85 e0 ldi r24, 0x05 ; 5 3e10: 85 e0 ldi r24, 0x05 ; 5
3e0e: 80 93 81 00 sts 0x0081, r24 3e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
3e12: 82 e0 ldi r24, 0x02 ; 2 3e16: 82 e0 ldi r24, 0x02 ; 2
3e14: 80 93 c0 00 sts 0x00C0, r24 3e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
3e18: 88 e1 ldi r24, 0x18 ; 24 3e1c: 88 e1 ldi r24, 0x18 ; 24
3e1a: 80 93 c1 00 sts 0x00C1, r24 3e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
3e1e: 86 e0 ldi r24, 0x06 ; 6 3e22: 86 e0 ldi r24, 0x06 ; 6
3e20: 80 93 c2 00 sts 0x00C2, r24 3e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
3e24: 88 e0 ldi r24, 0x08 ; 8 3e28: 88 e0 ldi r24, 0x08 ; 8
3e26: 80 93 c4 00 sts 0x00C4, r24 3e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
3e2a: 8e e0 ldi r24, 0x0E ; 14 3e2e: 8e e0 ldi r24, 0x0E ; 14
3e2c: c5 d0 rcall .+394 ; 0x3fb8 <watchdogConfig> 3e30: c7 d0 rcall .+398 ; 0x3fc0 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
3e2e: 25 9a sbi 0x04, 5 ; 4 3e32: 25 9a sbi 0x04, 5 ; 4
3e30: 86 e0 ldi r24, 0x06 ; 6 3e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e32: 28 e1 ldi r18, 0x18 ; 24 3e36: 28 e1 ldi r18, 0x18 ; 24
3e34: 3e ef ldi r19, 0xFE ; 254 3e38: 3e ef ldi r19, 0xFE ; 254
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e36: 91 e0 ldi r25, 0x01 ; 1 3e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e38: 30 93 85 00 sts 0x0085, r19 3e3c: 30 93 85 00 sts 0x0085, r19
3e3c: 20 93 84 00 sts 0x0084, r18 3e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e40: 96 bb out 0x16, r25 ; 22 3e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
3e42: b0 9b sbis 0x16, 0 ; 22 3e46: b0 9b sbis 0x16, 0 ; 22
3e44: fe cf rjmp .-4 ; 0x3e42 <main+0x42> 3e48: fe cf rjmp .-4 ; 0x3e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
3e46: 1d 9a sbi 0x03, 5 ; 3 3e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3e48: a8 95 wdr 3e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
3e4a: 81 50 subi r24, 0x01 ; 1 3e4e: 81 50 subi r24, 0x01 ; 1
3e4c: a9 f7 brne .-22 ; 0x3e38 <main+0x38> 3e50: a9 f7 brne .-22 ; 0x3e3c <main+0x3c>
3e4e: aa 24 eor r10, r10 3e52: aa 24 eor r10, r10
3e50: bb 24 eor r11, r11 3e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3e52: 33 e0 ldi r19, 0x03 ; 3 3e56: 33 e0 ldi r19, 0x03 ; 3
3e54: 83 2e mov r8, r19 3e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3e56: 77 24 eor r7, r7 3e5a: 77 24 eor r7, r7
3e58: 73 94 inc r7 3e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3e5a: 25 e0 ldi r18, 0x05 ; 5 3e5e: 25 e0 ldi r18, 0x05 ; 5
3e5c: 92 2e mov r9, r18 3e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3e5e: 91 e1 ldi r25, 0x11 ; 17 3e62: 91 e1 ldi r25, 0x11 ; 17
3e60: c9 2e mov r12, r25 3e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
3e62: 9e d0 rcall .+316 ; 0x3fa0 <getch> 3e66: a0 d0 rcall .+320 ; 0x3fa8 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
3e64: 81 34 cpi r24, 0x41 ; 65 3e68: 81 34 cpi r24, 0x41 ; 65
3e66: 59 f4 brne .+22 ; 0x3e7e <main+0x7e> 3e6a: 69 f4 brne .+26 ; 0x3e86 <main+0x86>
unsigned char which = getch(); unsigned char which = getch();
3e68: 9b d0 rcall .+310 ; 0x3fa0 <getch> 3e6c: 9d d0 rcall .+314 ; 0x3fa8 <getch>
3e6a: 18 2f mov r17, r24 3e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
3e6c: ab d0 rcall .+342 ; 0x3fc4 <verifySpace> 3e70: ad d0 rcall .+346 ; 0x3fcc <verifySpace>
if (which == 0x82) {
3e6e: 12 38 cpi r17, 0x82 ; 130
3e70: 21 f1 breq .+72 ; 0x3eba <main+0xba>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
3e72: 12 38 cpi r17, 0x82 ; 130
3e74: 11 f4 brne .+4 ; 0x3e7a <main+0x7a>
putch(optiboot_version & 0xFF);
3e76: 81 e0 ldi r24, 0x01 ; 1
3e78: 04 c0 rjmp .+8 ; 0x3e82 <main+0x82>
} else if (which == 0x81) { } else if (which == 0x81) {
3e72: 11 38 cpi r17, 0x81 ; 129 3e7a: 11 38 cpi r17, 0x81 ; 129
3e74: 09 f4 brne .+2 ; 0x3e78 <main+0x78> 3e7c: 09 f4 brne .+2 ; 0x3e80 <main+0x80>
3e76: 82 c0 rjmp .+260 ; 0x3f7c <main+0x17c> 3e7e: 82 c0 rjmp .+260 ; 0x3f84 <main+0x184>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
3e78: 83 e0 ldi r24, 0x03 ; 3 3e80: 83 e0 ldi r24, 0x03 ; 3
3e7a: 8a d0 rcall .+276 ; 0x3f90 <putch> 3e82: 8a d0 rcall .+276 ; 0x3f98 <putch>
3e7c: 86 c0 rjmp .+268 ; 0x3f8a <main+0x18a> 3e84: 86 c0 rjmp .+268 ; 0x3f92 <main+0x192>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
3e7e: 82 34 cpi r24, 0x42 ; 66 3e86: 82 34 cpi r24, 0x42 ; 66
3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86> 3e88: 11 f4 brne .+4 ; 0x3e8e <main+0x8e>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
3e82: 84 e1 ldi r24, 0x14 ; 20 3e8a: 84 e1 ldi r24, 0x14 ; 20
3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c> 3e8c: 03 c0 rjmp .+6 ; 0x3e94 <main+0x94>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
3e86: 85 34 cpi r24, 0x45 ; 69 3e8e: 85 34 cpi r24, 0x45 ; 69
3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90> 3e90: 19 f4 brne .+6 ; 0x3e98 <main+0x98>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
3e8a: 85 e0 ldi r24, 0x05 ; 5 3e92: 85 e0 ldi r24, 0x05 ; 5
3e8c: a3 d0 rcall .+326 ; 0x3fd4 <getNch> 3e94: a3 d0 rcall .+326 ; 0x3fdc <getNch>
3e8e: 7d c0 rjmp .+250 ; 0x3f8a <main+0x18a> 3e96: 7d c0 rjmp .+250 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
3e90: 85 35 cpi r24, 0x55 ; 85 3e98: 85 35 cpi r24, 0x55 ; 85
3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2> 3e9a: 79 f4 brne .+30 ; 0x3eba <main+0xba>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
3e94: 85 d0 rcall .+266 ; 0x3fa0 <getch> 3e9c: 85 d0 rcall .+266 ; 0x3fa8 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
3e96: e8 2e mov r14, r24 3e9e: e8 2e mov r14, r24
3e98: ff 24 eor r15, r15 3ea0: ff 24 eor r15, r15
3e9a: 82 d0 rcall .+260 ; 0x3fa0 <getch> 3ea2: 82 d0 rcall .+260 ; 0x3fa8 <getch>
3e9c: 08 2f mov r16, r24 3ea4: 08 2f mov r16, r24
3e9e: 10 e0 ldi r17, 0x00 ; 0 3ea6: 10 e0 ldi r17, 0x00 ; 0
3ea0: 10 2f mov r17, r16 3ea8: 10 2f mov r17, r16
3ea2: 00 27 eor r16, r16 3eaa: 00 27 eor r16, r16
3ea4: 0e 29 or r16, r14 3eac: 0e 29 or r16, r14
3ea6: 1f 29 or r17, r15 3eae: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
3ea8: 00 0f add r16, r16 3eb0: 00 0f add r16, r16
3eaa: 11 1f adc r17, r17 3eb2: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
3eac: 8b d0 rcall .+278 ; 0x3fc4 <verifySpace> 3eb4: 8b d0 rcall .+278 ; 0x3fcc <verifySpace>
3eae: 58 01 movw r10, r16 3eb6: 58 01 movw r10, r16
3eb0: 6c c0 rjmp .+216 ; 0x3f8a <main+0x18a> 3eb8: 6c c0 rjmp .+216 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
3eb2: 86 35 cpi r24, 0x56 ; 86 3eba: 86 35 cpi r24, 0x56 ; 86
3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe> 3ebc: 21 f4 brne .+8 ; 0x3ec6 <main+0xc6>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
3eb6: 84 e0 ldi r24, 0x04 ; 4 3ebe: 84 e0 ldi r24, 0x04 ; 4
3eb8: 8d d0 rcall .+282 ; 0x3fd4 <getNch> 3ec0: 8d d0 rcall .+282 ; 0x3fdc <getNch>
putch(0x00); putch(0x00);
3eba: 80 e0 ldi r24, 0x00 ; 0 3ec2: 80 e0 ldi r24, 0x00 ; 0
3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a> 3ec4: de cf rjmp .-68 ; 0x3e82 <main+0x82>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
3ebe: 84 36 cpi r24, 0x64 ; 100 3ec6: 84 36 cpi r24, 0x64 ; 100
3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4> 3ec8: 09 f0 breq .+2 ; 0x3ecc <main+0xcc>
3ec2: 41 c0 rjmp .+130 ; 0x3f46 <main+0x146> 3eca: 41 c0 rjmp .+130 ; 0x3f4e <main+0x14e>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3ec4: 6d d0 rcall .+218 ; 0x3fa0 <getch> 3ecc: 6d d0 rcall .+218 ; 0x3fa8 <getch>
3ec6: 90 e0 ldi r25, 0x00 ; 0
3ec8: 18 2f mov r17, r24
3eca: 00 27 eor r16, r16
length |= getch();
3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch>
3ece: 90 e0 ldi r25, 0x00 ; 0 3ece: 90 e0 ldi r25, 0x00 ; 0
3ed0: 08 2b or r16, r24 3ed0: 18 2f mov r17, r24
3ed2: 19 2b or r17, r25 3ed2: 00 27 eor r16, r16
length |= getch();
3ed4: 69 d0 rcall .+210 ; 0x3fa8 <getch>
3ed6: 90 e0 ldi r25, 0x00 ; 0
3ed8: 08 2b or r16, r24
3eda: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
3ed4: 65 d0 rcall .+202 ; 0x3fa0 <getch> 3edc: 65 d0 rcall .+202 ; 0x3fa8 <getch>
3ed6: d8 2e mov r13, r24 3ede: d8 2e mov r13, r24
3ed8: e8 01 movw r28, r16 3ee0: e8 01 movw r28, r16
3eda: e1 2c mov r14, r1 3ee2: e1 2c mov r14, r1
3edc: f1 e0 ldi r31, 0x01 ; 1 3ee4: f1 e0 ldi r31, 0x01 ; 1
3ede: ff 2e mov r15, r31 3ee6: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
3ee0: 5f d0 rcall .+190 ; 0x3fa0 <getch> 3ee8: 5f d0 rcall .+190 ; 0x3fa8 <getch>
3ee2: f7 01 movw r30, r14 3eea: f7 01 movw r30, r14
3ee4: 81 93 st Z+, r24 3eec: 81 93 st Z+, r24
3ee6: 7f 01 movw r14, r30 3eee: 7f 01 movw r14, r30
while (--length); while (--length);
3ee8: 21 97 sbiw r28, 0x01 ; 1 3ef0: 21 97 sbiw r28, 0x01 ; 1
3eea: d1 f7 brne .-12 ; 0x3ee0 <main+0xe0> 3ef2: d1 f7 brne .-12 ; 0x3ee8 <main+0xe8>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
3eec: 6b d0 rcall .+214 ; 0x3fc4 <verifySpace> 3ef4: 6b d0 rcall .+214 ; 0x3fcc <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
3eee: f5 e4 ldi r31, 0x45 ; 69 3ef6: f5 e4 ldi r31, 0x45 ; 69
3ef0: df 16 cp r13, r31 3ef8: df 16 cp r13, r31
3ef2: 09 f4 brne .+2 ; 0x3ef6 <main+0xf6> 3efa: 09 f4 brne .+2 ; 0x3efe <main+0xfe>
3ef4: ff cf rjmp .-2 ; 0x3ef4 <main+0xf4> 3efc: ff cf rjmp .-2 ; 0x3efc <main+0xfc>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3ef6: f5 01 movw r30, r10 3efe: f5 01 movw r30, r10
3ef8: 87 be out 0x37, r8 ; 55 3f00: 87 be out 0x37, r8 ; 55
3efa: e8 95 spm 3f02: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3efc: 07 b6 in r0, 0x37 ; 55 3f04: 07 b6 in r0, 0x37 ; 55
3efe: 00 fc sbrc r0, 0 3f06: 00 fc sbrc r0, 0
3f00: fd cf rjmp .-6 ; 0x3efc <main+0xfc> 3f08: fd cf rjmp .-6 ; 0x3f04 <main+0x104>
3f02: b5 01 movw r22, r10 3f0a: b5 01 movw r22, r10
3f04: a8 01 movw r20, r16 3f0c: a8 01 movw r20, r16
3f06: a0 e0 ldi r26, 0x00 ; 0 3f0e: a0 e0 ldi r26, 0x00 ; 0
3f08: b1 e0 ldi r27, 0x01 ; 1 3f10: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
3f0a: 2c 91 ld r18, X 3f12: 2c 91 ld r18, X
3f0c: 30 e0 ldi r19, 0x00 ; 0 3f14: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
3f0e: 11 96 adiw r26, 0x01 ; 1 3f16: 11 96 adiw r26, 0x01 ; 1
3f10: 8c 91 ld r24, X 3f18: 8c 91 ld r24, X
3f12: 11 97 sbiw r26, 0x01 ; 1 3f1a: 11 97 sbiw r26, 0x01 ; 1
3f14: 90 e0 ldi r25, 0x00 ; 0 3f1c: 90 e0 ldi r25, 0x00 ; 0
3f16: 98 2f mov r25, r24 3f1e: 98 2f mov r25, r24
3f18: 88 27 eor r24, r24 3f20: 88 27 eor r24, r24
3f1a: 82 2b or r24, r18 3f22: 82 2b or r24, r18
3f1c: 93 2b or r25, r19 3f24: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3f1e: 12 96 adiw r26, 0x02 ; 2 3f26: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3f20: fb 01 movw r30, r22 3f28: fb 01 movw r30, r22
3f22: 0c 01 movw r0, r24 3f2a: 0c 01 movw r0, r24
3f24: 77 be out 0x37, r7 ; 55 3f2c: 77 be out 0x37, r7 ; 55
3f26: e8 95 spm 3f2e: e8 95 spm
3f28: 11 24 eor r1, r1 3f30: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
3f2a: 6e 5f subi r22, 0xFE ; 254 3f32: 6e 5f subi r22, 0xFE ; 254
3f2c: 7f 4f sbci r23, 0xFF ; 255 3f34: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
3f2e: 42 50 subi r20, 0x02 ; 2 3f36: 42 50 subi r20, 0x02 ; 2
3f30: 50 40 sbci r21, 0x00 ; 0 3f38: 50 40 sbci r21, 0x00 ; 0
3f32: 59 f7 brne .-42 ; 0x3f0a <main+0x10a> 3f3a: 59 f7 brne .-42 ; 0x3f12 <main+0x112>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3f34: f5 01 movw r30, r10 3f3c: f5 01 movw r30, r10
3f36: 97 be out 0x37, r9 ; 55 3f3e: 97 be out 0x37, r9 ; 55
3f38: e8 95 spm 3f40: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3f3a: 07 b6 in r0, 0x37 ; 55 3f42: 07 b6 in r0, 0x37 ; 55
3f3c: 00 fc sbrc r0, 0 3f44: 00 fc sbrc r0, 0
3f3e: fd cf rjmp .-6 ; 0x3f3a <main+0x13a> 3f46: fd cf rjmp .-6 ; 0x3f42 <main+0x142>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3f40: c7 be out 0x37, r12 ; 55 3f48: c7 be out 0x37, r12 ; 55
3f42: e8 95 spm 3f4a: e8 95 spm
3f44: 22 c0 rjmp .+68 ; 0x3f8a <main+0x18a> 3f4c: 22 c0 rjmp .+68 ; 0x3f92 <main+0x192>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
3f46: 84 37 cpi r24, 0x74 ; 116 3f4e: 84 37 cpi r24, 0x74 ; 116
3f48: 91 f4 brne .+36 ; 0x3f6e <main+0x16e> 3f50: 91 f4 brne .+36 ; 0x3f76 <main+0x176>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3f4a: 2a d0 rcall .+84 ; 0x3fa0 <getch> 3f52: 2a d0 rcall .+84 ; 0x3fa8 <getch>
3f4c: 90 e0 ldi r25, 0x00 ; 0
3f4e: d8 2f mov r29, r24
3f50: cc 27 eor r28, r28
length |= getch();
3f52: 26 d0 rcall .+76 ; 0x3fa0 <getch>
3f54: 90 e0 ldi r25, 0x00 ; 0 3f54: 90 e0 ldi r25, 0x00 ; 0
3f56: c8 2b or r28, r24 3f56: d8 2f mov r29, r24
3f58: d9 2b or r29, r25 3f58: cc 27 eor r28, r28
length |= getch();
3f5a: 26 d0 rcall .+76 ; 0x3fa8 <getch>
3f5c: 90 e0 ldi r25, 0x00 ; 0
3f5e: c8 2b or r28, r24
3f60: d9 2b or r29, r25
desttype = getch(); desttype = getch();
3f5a: 22 d0 rcall .+68 ; 0x3fa0 <getch> 3f62: 22 d0 rcall .+68 ; 0x3fa8 <getch>
verifySpace(); verifySpace();
3f5c: 33 d0 rcall .+102 ; 0x3fc4 <verifySpace> 3f64: 33 d0 rcall .+102 ; 0x3fcc <verifySpace>
3f5e: 85 01 movw r16, r10 3f66: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
3f60: f8 01 movw r30, r16 3f68: f8 01 movw r30, r16
3f62: 85 91 lpm r24, Z+ 3f6a: 85 91 lpm r24, Z+
3f64: 8f 01 movw r16, r30 3f6c: 8f 01 movw r16, r30
3f66: 14 d0 rcall .+40 ; 0x3f90 <putch> 3f6e: 14 d0 rcall .+40 ; 0x3f98 <putch>
} while (--length); } while (--length);
3f68: 21 97 sbiw r28, 0x01 ; 1 3f70: 21 97 sbiw r28, 0x01 ; 1
3f6a: d1 f7 brne .-12 ; 0x3f60 <main+0x160> 3f72: d1 f7 brne .-12 ; 0x3f68 <main+0x168>
3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a> 3f74: 0e c0 rjmp .+28 ; 0x3f92 <main+0x192>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
3f6e: 85 37 cpi r24, 0x75 ; 117 3f76: 85 37 cpi r24, 0x75 ; 117
3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180> 3f78: 39 f4 brne .+14 ; 0x3f88 <main+0x188>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
3f72: 28 d0 rcall .+80 ; 0x3fc4 <verifySpace> 3f7a: 28 d0 rcall .+80 ; 0x3fcc <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
3f74: 8e e1 ldi r24, 0x1E ; 30 3f7c: 8e e1 ldi r24, 0x1E ; 30
3f76: 0c d0 rcall .+24 ; 0x3f90 <putch> 3f7e: 0c d0 rcall .+24 ; 0x3f98 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
3f78: 84 e9 ldi r24, 0x94 ; 148 3f80: 84 e9 ldi r24, 0x94 ; 148
3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch> 3f82: 0a d0 rcall .+20 ; 0x3f98 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
3f7c: 86 e0 ldi r24, 0x06 ; 6 3f84: 86 e0 ldi r24, 0x06 ; 6
3f7e: 7d cf rjmp .-262 ; 0x3e7a <main+0x7a> 3f86: 7d cf rjmp .-262 ; 0x3e82 <main+0x82>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
3f80: 81 35 cpi r24, 0x51 ; 81 3f88: 81 35 cpi r24, 0x51 ; 81
3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188> 3f8a: 11 f4 brne .+4 ; 0x3f90 <main+0x190>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
3f84: 88 e0 ldi r24, 0x08 ; 8 3f8c: 88 e0 ldi r24, 0x08 ; 8
3f86: 18 d0 rcall .+48 ; 0x3fb8 <watchdogConfig> 3f8e: 18 d0 rcall .+48 ; 0x3fc0 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
3f88: 1d d0 rcall .+58 ; 0x3fc4 <verifySpace> 3f90: 1d d0 rcall .+58 ; 0x3fcc <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
3f8a: 80 e1 ldi r24, 0x10 ; 16 3f92: 80 e1 ldi r24, 0x10 ; 16
3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch> 3f94: 01 d0 rcall .+2 ; 0x3f98 <putch>
3f8e: 69 cf rjmp .-302 ; 0x3e62 <main+0x62> 3f96: 67 cf rjmp .-306 ; 0x3e66 <main+0x66>
00003f90 <putch>: 00003f98 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
3f90: 98 2f mov r25, r24 3f98: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
3f92: 80 91 c0 00 lds r24, 0x00C0 3f9a: 80 91 c0 00 lds r24, 0x00C0
3f96: 85 ff sbrs r24, 5 3f9e: 85 ff sbrs r24, 5
3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2> 3fa0: fc cf rjmp .-8 ; 0x3f9a <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
3f9a: 90 93 c6 00 sts 0x00C6, r25 3fa2: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
3f9e: 08 95 ret 3fa6: 08 95 ret
00003fa0 <getch>: 00003fa8 <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
3fa0: 80 91 c0 00 lds r24, 0x00C0 3fa8: 80 91 c0 00 lds r24, 0x00C0
3fa4: 87 ff sbrs r24, 7 3fac: 87 ff sbrs r24, 7
3fa6: fc cf rjmp .-8 ; 0x3fa0 <getch> 3fae: fc cf rjmp .-8 ; 0x3fa8 <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
3fa8: 80 91 c0 00 lds r24, 0x00C0 3fb0: 80 91 c0 00 lds r24, 0x00C0
3fac: 84 fd sbrc r24, 4 3fb4: 84 fd sbrc r24, 4
3fae: 01 c0 rjmp .+2 ; 0x3fb2 <getch+0x12> 3fb6: 01 c0 rjmp .+2 ; 0x3fba <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3fb0: a8 95 wdr 3fb8: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
3fb2: 80 91 c6 00 lds r24, 0x00C6 3fba: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
3fb6: 08 95 ret 3fbe: 08 95 ret
00003fb8 <watchdogConfig>: 00003fc0 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
3fb8: e0 e6 ldi r30, 0x60 ; 96 3fc0: e0 e6 ldi r30, 0x60 ; 96
3fba: f0 e0 ldi r31, 0x00 ; 0 3fc2: f0 e0 ldi r31, 0x00 ; 0
3fbc: 98 e1 ldi r25, 0x18 ; 24 3fc4: 98 e1 ldi r25, 0x18 ; 24
3fbe: 90 83 st Z, r25 3fc6: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
3fc0: 80 83 st Z, r24 3fc8: 80 83 st Z, r24
} }
3fc2: 08 95 ret 3fca: 08 95 ret
00003fc4 <verifySpace>: 00003fcc <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
3fc4: ed df rcall .-38 ; 0x3fa0 <getch> 3fcc: ed df rcall .-38 ; 0x3fa8 <getch>
3fc6: 80 32 cpi r24, 0x20 ; 32 3fce: 80 32 cpi r24, 0x20 ; 32
3fc8: 19 f0 breq .+6 ; 0x3fd0 <verifySpace+0xc> 3fd0: 19 f0 breq .+6 ; 0x3fd8 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
3fca: 88 e0 ldi r24, 0x08 ; 8 3fd2: 88 e0 ldi r24, 0x08 ; 8
3fcc: f5 df rcall .-22 ; 0x3fb8 <watchdogConfig> 3fd4: f5 df rcall .-22 ; 0x3fc0 <watchdogConfig>
3fce: ff cf rjmp .-2 ; 0x3fce <verifySpace+0xa> 3fd6: ff cf rjmp .-2 ; 0x3fd6 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
3fd0: 84 e1 ldi r24, 0x14 ; 20 3fd8: 84 e1 ldi r24, 0x14 ; 20
} }
3fd2: de cf rjmp .-68 ; 0x3f90 <putch> 3fda: de cf rjmp .-68 ; 0x3f98 <putch>
00003fd4 <getNch>: 00003fdc <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
3fd4: 1f 93 push r17 3fdc: 1f 93 push r17
3fd6: 18 2f mov r17, r24 3fde: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
3fd8: e3 df rcall .-58 ; 0x3fa0 <getch> 3fe0: e3 df rcall .-58 ; 0x3fa8 <getch>
3fda: 11 50 subi r17, 0x01 ; 1 3fe2: 11 50 subi r17, 0x01 ; 1
3fdc: e9 f7 brne .-6 ; 0x3fd8 <getNch+0x4> 3fe4: e9 f7 brne .-6 ; 0x3fe0 <getNch+0x4>
verifySpace(); verifySpace();
3fde: f2 df rcall .-28 ; 0x3fc4 <verifySpace> 3fe6: f2 df rcall .-28 ; 0x3fcc <verifySpace>
} }
3fe0: 1f 91 pop r17 3fe8: 1f 91 pop r17
3fe2: 08 95 ret 3fea: 08 95 ret
00003fe4 <appStart>: 00003fec <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
3fe4: 28 2e mov r2, r24 3fec: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
3fe6: 80 e0 ldi r24, 0x00 ; 0 3fee: 80 e0 ldi r24, 0x00 ; 0
3fe8: e7 df rcall .-50 ; 0x3fb8 <watchdogConfig> 3ff0: e7 df rcall .-50 ; 0x3fc0 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
3fea: ee 27 eor r30, r30 3ff2: ee 27 eor r30, r30
3fec: ff 27 eor r31, r31 3ff4: ff 27 eor r31, r31
3fee: 09 94 ijmp 3ff6: 09 94 ijmp

65
optiboot/bootloaders/optiboot/optiboot_pro_16MHz.hex
View File

@@ -1,34 +1,35 @@
:103E0000112484B714BE81FD01C0ECD085E08093FD :103E0000112494B714BE892F8D7011F0892FEED034
:103E1000810082E08093C00088E18093C10086E049 :103E100085E08093810082E08093C00088E18093F8
:103E20008093C20080E18093C4008EE0C5D0259AC3 :103E2000C10086E08093C20080E18093C4008EE0F0
:103E300086E020E33CEF91E03093850020938400FE :103E3000C7D0259A86E020E33CEF91E030938500DF
:103E400096BBB09BFECF1D9AA8958150A9F7AA24D6 :103E40002093840096BBB09BFECF1D9AA89581500D
:103E5000BB2433E0832E7724739425E0922E91E1E6 :103E5000A9F7AA24BB2433E0832E7724739425E0AA
:103E6000C92E9ED0813459F49BD0182FABD0123874 :103E6000922E91E1C92EA0D0813469F49DD0182FF3
:103E700021F1113809F482C083E08AD086C08234EF :103E7000ADD0123811F481E004C0113809F482C0C9
:103E800011F484E103C0853419F485E0A3D07DC02A :103E800083E08AD086C0823411F484E103C0853493
:103E9000853579F485D0E82EFF2482D0082F10E0F4 :103E900019F485E0A3D07DC0853579F485D0E82E6E
:103EA000102F00270E291F29000F111F8BD058013A :103EA000FF2482D0082F10E0102F00270E291F2991
:103EB0006CC0863521F484E08DD080E0DECF84367E :103EB000000F111F8BD058016CC0863521F484E0AF
:103EC00009F041C06DD090E0182F002769D090E034 :103EC0008DD080E0DECF843609F041C06DD090E027
:103ED000082B192B65D0D82EE801E12CF1E0FF2E3C :103ED000182F002769D090E0082B192B65D0D82E19
:103EE0005FD0F70181937F012197D1F76BD0F5E483 :103EE000E801E12CF1E0FF2E5FD0F70181937F0123
:103EF000DF1609F4FFCFF50187BEE89507B600FC91 :103EF0002197D1F76BD0F5E4DF1609F4FFCFF50178
:103F0000FDCFB501A801A0E0B1E02C9130E0119601 :103F000087BEE89507B600FCFDCFB501A801A0E08B
:103F10008C91119790E0982F8827822B932B1296E3 :103F1000B1E02C9130E011968C91119790E0982FA0
:103F2000FB010C0177BEE89511246E5F7F4F425074 :103F20008827822B932B1296FB010C0177BEE89514
:103F3000504059F7F50197BEE89507B600FCFDCF54 :103F300011246E5F7F4F4250504059F7F50197BEF4
:103F4000C7BEE89522C0843791F42AD090E0D82FDC :103F4000E89507B600FCFDCFC7BEE89522C08437D0
:103F5000CC2726D090E0C82BD92B22D033D0850196 :103F500091F42AD090E0D82FCC2726D090E0C82B1F
:103F6000F80185918F0114D02197D1F70EC08537C4 :103F6000D92B22D033D08501F80185918F0114D04F
:103F700039F428D08EE10CD084E90AD086E07DCFD8 :103F70002197D1F70EC0853739F428D08EE10CD0C7
:103F8000813511F488E018D01DD080E101D069CFCF :103F800084E90AD086E07DCF813511F488E018D02D
:103F9000982F8091C00085FFFCCF9093C6000895B4 :103F90001DD080E101D067CF982F8091C00085FFB0
:103FA0008091C00087FFFCCF8091C00084FD01C0DC :103FA000FCCF9093C60008958091C00087FFFCCF9E
:103FB000A8958091C6000895E0E6F0E098E190832E :103FB0008091C00084FD01C0A8958091C60008953D
:103FC00080830895EDDF803219F088E0F5DFFFCFC0 :103FC000E0E6F0E098E1908380830895EDDF8032B1
:103FD00084E1DECF1F93182FE3DF1150E9F7F2DF02 :103FD00019F088E0F5DFFFCF84E1DECF1F93182FC3
:103FE0001F910895282E80E0E7DFEE27FF27099430 :103FE000E3DF1150E9F7F2DF1F910895282E80E0FA
:023FFE000006BB :083FF000E7DFEE27FF2709942B
:023FFE000106BA
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

528
optiboot/bootloaders/optiboot/optiboot_pro_16MHz.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega168.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f0 00003e00 00003e00 00000074 2**1 0 .text 000001f8 00003e00 00003e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00003ffe 00003ffe 00000264 2**0 1 .version 00000002 00003ffe 00003ffe 0000026c 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000266 2**0 2 .debug_aranges 00000028 00000000 00000000 0000026e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 0000028e 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000296 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000302 2**0 4 .debug_info 000003e0 00000000 00000000 0000030a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006dd 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ea 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000423 00000000 00000000 000008c7 2**0 6 .debug_line 00000433 00000000 00000000 000008db 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cec 2**2 7 .debug_frame 00000080 00000000 00000000 00000d10 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d6c 2**0 8 .debug_str 00000172 00000000 00000000 00000d90 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ede 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f02 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011b5 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011d9 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,563 +36,569 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3e00: 11 24 eor r1, r1 3e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
3e02: 84 b7 in r24, 0x34 ; 52 3e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
3e04: 14 be out 0x34, r1 ; 52 3e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
3e06: 81 fd sbrc r24, 1 3e06: 89 2f mov r24, r25
3e08: 01 c0 rjmp .+2 ; 0x3e0c <main+0xc> 3e08: 8d 70 andi r24, 0x0D ; 13
3e0a: ec d0 rcall .+472 ; 0x3fe4 <appStart> 3e0a: 11 f0 breq .+4 ; 0x3e10 <main+0x10>
appStart(ch);
3e0c: 89 2f mov r24, r25
3e0e: ee d0 rcall .+476 ; 0x3fec <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
3e0c: 85 e0 ldi r24, 0x05 ; 5 3e10: 85 e0 ldi r24, 0x05 ; 5
3e0e: 80 93 81 00 sts 0x0081, r24 3e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
3e12: 82 e0 ldi r24, 0x02 ; 2 3e16: 82 e0 ldi r24, 0x02 ; 2
3e14: 80 93 c0 00 sts 0x00C0, r24 3e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
3e18: 88 e1 ldi r24, 0x18 ; 24 3e1c: 88 e1 ldi r24, 0x18 ; 24
3e1a: 80 93 c1 00 sts 0x00C1, r24 3e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
3e1e: 86 e0 ldi r24, 0x06 ; 6 3e22: 86 e0 ldi r24, 0x06 ; 6
3e20: 80 93 c2 00 sts 0x00C2, r24 3e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
3e24: 80 e1 ldi r24, 0x10 ; 16 3e28: 80 e1 ldi r24, 0x10 ; 16
3e26: 80 93 c4 00 sts 0x00C4, r24 3e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
3e2a: 8e e0 ldi r24, 0x0E ; 14 3e2e: 8e e0 ldi r24, 0x0E ; 14
3e2c: c5 d0 rcall .+394 ; 0x3fb8 <watchdogConfig> 3e30: c7 d0 rcall .+398 ; 0x3fc0 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
3e2e: 25 9a sbi 0x04, 5 ; 4 3e32: 25 9a sbi 0x04, 5 ; 4
3e30: 86 e0 ldi r24, 0x06 ; 6 3e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e32: 20 e3 ldi r18, 0x30 ; 48 3e36: 20 e3 ldi r18, 0x30 ; 48
3e34: 3c ef ldi r19, 0xFC ; 252 3e38: 3c ef ldi r19, 0xFC ; 252
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e36: 91 e0 ldi r25, 0x01 ; 1 3e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e38: 30 93 85 00 sts 0x0085, r19 3e3c: 30 93 85 00 sts 0x0085, r19
3e3c: 20 93 84 00 sts 0x0084, r18 3e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e40: 96 bb out 0x16, r25 ; 22 3e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
3e42: b0 9b sbis 0x16, 0 ; 22 3e46: b0 9b sbis 0x16, 0 ; 22
3e44: fe cf rjmp .-4 ; 0x3e42 <main+0x42> 3e48: fe cf rjmp .-4 ; 0x3e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
3e46: 1d 9a sbi 0x03, 5 ; 3 3e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3e48: a8 95 wdr 3e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
3e4a: 81 50 subi r24, 0x01 ; 1 3e4e: 81 50 subi r24, 0x01 ; 1
3e4c: a9 f7 brne .-22 ; 0x3e38 <main+0x38> 3e50: a9 f7 brne .-22 ; 0x3e3c <main+0x3c>
3e4e: aa 24 eor r10, r10 3e52: aa 24 eor r10, r10
3e50: bb 24 eor r11, r11 3e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3e52: 33 e0 ldi r19, 0x03 ; 3 3e56: 33 e0 ldi r19, 0x03 ; 3
3e54: 83 2e mov r8, r19 3e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3e56: 77 24 eor r7, r7 3e5a: 77 24 eor r7, r7
3e58: 73 94 inc r7 3e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3e5a: 25 e0 ldi r18, 0x05 ; 5 3e5e: 25 e0 ldi r18, 0x05 ; 5
3e5c: 92 2e mov r9, r18 3e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3e5e: 91 e1 ldi r25, 0x11 ; 17 3e62: 91 e1 ldi r25, 0x11 ; 17
3e60: c9 2e mov r12, r25 3e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
3e62: 9e d0 rcall .+316 ; 0x3fa0 <getch> 3e66: a0 d0 rcall .+320 ; 0x3fa8 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
3e64: 81 34 cpi r24, 0x41 ; 65 3e68: 81 34 cpi r24, 0x41 ; 65
3e66: 59 f4 brne .+22 ; 0x3e7e <main+0x7e> 3e6a: 69 f4 brne .+26 ; 0x3e86 <main+0x86>
unsigned char which = getch(); unsigned char which = getch();
3e68: 9b d0 rcall .+310 ; 0x3fa0 <getch> 3e6c: 9d d0 rcall .+314 ; 0x3fa8 <getch>
3e6a: 18 2f mov r17, r24 3e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
3e6c: ab d0 rcall .+342 ; 0x3fc4 <verifySpace> 3e70: ad d0 rcall .+346 ; 0x3fcc <verifySpace>
if (which == 0x82) {
3e6e: 12 38 cpi r17, 0x82 ; 130
3e70: 21 f1 breq .+72 ; 0x3eba <main+0xba>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
3e72: 12 38 cpi r17, 0x82 ; 130
3e74: 11 f4 brne .+4 ; 0x3e7a <main+0x7a>
putch(optiboot_version & 0xFF);
3e76: 81 e0 ldi r24, 0x01 ; 1
3e78: 04 c0 rjmp .+8 ; 0x3e82 <main+0x82>
} else if (which == 0x81) { } else if (which == 0x81) {
3e72: 11 38 cpi r17, 0x81 ; 129 3e7a: 11 38 cpi r17, 0x81 ; 129
3e74: 09 f4 brne .+2 ; 0x3e78 <main+0x78> 3e7c: 09 f4 brne .+2 ; 0x3e80 <main+0x80>
3e76: 82 c0 rjmp .+260 ; 0x3f7c <main+0x17c> 3e7e: 82 c0 rjmp .+260 ; 0x3f84 <main+0x184>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
3e78: 83 e0 ldi r24, 0x03 ; 3 3e80: 83 e0 ldi r24, 0x03 ; 3
3e7a: 8a d0 rcall .+276 ; 0x3f90 <putch> 3e82: 8a d0 rcall .+276 ; 0x3f98 <putch>
3e7c: 86 c0 rjmp .+268 ; 0x3f8a <main+0x18a> 3e84: 86 c0 rjmp .+268 ; 0x3f92 <main+0x192>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
3e7e: 82 34 cpi r24, 0x42 ; 66 3e86: 82 34 cpi r24, 0x42 ; 66
3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86> 3e88: 11 f4 brne .+4 ; 0x3e8e <main+0x8e>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
3e82: 84 e1 ldi r24, 0x14 ; 20 3e8a: 84 e1 ldi r24, 0x14 ; 20
3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c> 3e8c: 03 c0 rjmp .+6 ; 0x3e94 <main+0x94>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
3e86: 85 34 cpi r24, 0x45 ; 69 3e8e: 85 34 cpi r24, 0x45 ; 69
3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90> 3e90: 19 f4 brne .+6 ; 0x3e98 <main+0x98>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
3e8a: 85 e0 ldi r24, 0x05 ; 5 3e92: 85 e0 ldi r24, 0x05 ; 5
3e8c: a3 d0 rcall .+326 ; 0x3fd4 <getNch> 3e94: a3 d0 rcall .+326 ; 0x3fdc <getNch>
3e8e: 7d c0 rjmp .+250 ; 0x3f8a <main+0x18a> 3e96: 7d c0 rjmp .+250 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
3e90: 85 35 cpi r24, 0x55 ; 85 3e98: 85 35 cpi r24, 0x55 ; 85
3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2> 3e9a: 79 f4 brne .+30 ; 0x3eba <main+0xba>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
3e94: 85 d0 rcall .+266 ; 0x3fa0 <getch> 3e9c: 85 d0 rcall .+266 ; 0x3fa8 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
3e96: e8 2e mov r14, r24 3e9e: e8 2e mov r14, r24
3e98: ff 24 eor r15, r15 3ea0: ff 24 eor r15, r15
3e9a: 82 d0 rcall .+260 ; 0x3fa0 <getch> 3ea2: 82 d0 rcall .+260 ; 0x3fa8 <getch>
3e9c: 08 2f mov r16, r24 3ea4: 08 2f mov r16, r24
3e9e: 10 e0 ldi r17, 0x00 ; 0 3ea6: 10 e0 ldi r17, 0x00 ; 0
3ea0: 10 2f mov r17, r16 3ea8: 10 2f mov r17, r16
3ea2: 00 27 eor r16, r16 3eaa: 00 27 eor r16, r16
3ea4: 0e 29 or r16, r14 3eac: 0e 29 or r16, r14
3ea6: 1f 29 or r17, r15 3eae: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
3ea8: 00 0f add r16, r16 3eb0: 00 0f add r16, r16
3eaa: 11 1f adc r17, r17 3eb2: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
3eac: 8b d0 rcall .+278 ; 0x3fc4 <verifySpace> 3eb4: 8b d0 rcall .+278 ; 0x3fcc <verifySpace>
3eae: 58 01 movw r10, r16 3eb6: 58 01 movw r10, r16
3eb0: 6c c0 rjmp .+216 ; 0x3f8a <main+0x18a> 3eb8: 6c c0 rjmp .+216 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
3eb2: 86 35 cpi r24, 0x56 ; 86 3eba: 86 35 cpi r24, 0x56 ; 86
3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe> 3ebc: 21 f4 brne .+8 ; 0x3ec6 <main+0xc6>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
3eb6: 84 e0 ldi r24, 0x04 ; 4 3ebe: 84 e0 ldi r24, 0x04 ; 4
3eb8: 8d d0 rcall .+282 ; 0x3fd4 <getNch> 3ec0: 8d d0 rcall .+282 ; 0x3fdc <getNch>
putch(0x00); putch(0x00);
3eba: 80 e0 ldi r24, 0x00 ; 0 3ec2: 80 e0 ldi r24, 0x00 ; 0
3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a> 3ec4: de cf rjmp .-68 ; 0x3e82 <main+0x82>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
3ebe: 84 36 cpi r24, 0x64 ; 100 3ec6: 84 36 cpi r24, 0x64 ; 100
3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4> 3ec8: 09 f0 breq .+2 ; 0x3ecc <main+0xcc>
3ec2: 41 c0 rjmp .+130 ; 0x3f46 <main+0x146> 3eca: 41 c0 rjmp .+130 ; 0x3f4e <main+0x14e>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3ec4: 6d d0 rcall .+218 ; 0x3fa0 <getch> 3ecc: 6d d0 rcall .+218 ; 0x3fa8 <getch>
3ec6: 90 e0 ldi r25, 0x00 ; 0
3ec8: 18 2f mov r17, r24
3eca: 00 27 eor r16, r16
length |= getch();
3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch>
3ece: 90 e0 ldi r25, 0x00 ; 0 3ece: 90 e0 ldi r25, 0x00 ; 0
3ed0: 08 2b or r16, r24 3ed0: 18 2f mov r17, r24
3ed2: 19 2b or r17, r25 3ed2: 00 27 eor r16, r16
length |= getch();
3ed4: 69 d0 rcall .+210 ; 0x3fa8 <getch>
3ed6: 90 e0 ldi r25, 0x00 ; 0
3ed8: 08 2b or r16, r24
3eda: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
3ed4: 65 d0 rcall .+202 ; 0x3fa0 <getch> 3edc: 65 d0 rcall .+202 ; 0x3fa8 <getch>
3ed6: d8 2e mov r13, r24 3ede: d8 2e mov r13, r24
3ed8: e8 01 movw r28, r16 3ee0: e8 01 movw r28, r16
3eda: e1 2c mov r14, r1 3ee2: e1 2c mov r14, r1
3edc: f1 e0 ldi r31, 0x01 ; 1 3ee4: f1 e0 ldi r31, 0x01 ; 1
3ede: ff 2e mov r15, r31 3ee6: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
3ee0: 5f d0 rcall .+190 ; 0x3fa0 <getch> 3ee8: 5f d0 rcall .+190 ; 0x3fa8 <getch>
3ee2: f7 01 movw r30, r14 3eea: f7 01 movw r30, r14
3ee4: 81 93 st Z+, r24 3eec: 81 93 st Z+, r24
3ee6: 7f 01 movw r14, r30 3eee: 7f 01 movw r14, r30
while (--length); while (--length);
3ee8: 21 97 sbiw r28, 0x01 ; 1 3ef0: 21 97 sbiw r28, 0x01 ; 1
3eea: d1 f7 brne .-12 ; 0x3ee0 <main+0xe0> 3ef2: d1 f7 brne .-12 ; 0x3ee8 <main+0xe8>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
3eec: 6b d0 rcall .+214 ; 0x3fc4 <verifySpace> 3ef4: 6b d0 rcall .+214 ; 0x3fcc <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
3eee: f5 e4 ldi r31, 0x45 ; 69 3ef6: f5 e4 ldi r31, 0x45 ; 69
3ef0: df 16 cp r13, r31 3ef8: df 16 cp r13, r31
3ef2: 09 f4 brne .+2 ; 0x3ef6 <main+0xf6> 3efa: 09 f4 brne .+2 ; 0x3efe <main+0xfe>
3ef4: ff cf rjmp .-2 ; 0x3ef4 <main+0xf4> 3efc: ff cf rjmp .-2 ; 0x3efc <main+0xfc>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3ef6: f5 01 movw r30, r10 3efe: f5 01 movw r30, r10
3ef8: 87 be out 0x37, r8 ; 55 3f00: 87 be out 0x37, r8 ; 55
3efa: e8 95 spm 3f02: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3efc: 07 b6 in r0, 0x37 ; 55 3f04: 07 b6 in r0, 0x37 ; 55
3efe: 00 fc sbrc r0, 0 3f06: 00 fc sbrc r0, 0
3f00: fd cf rjmp .-6 ; 0x3efc <main+0xfc> 3f08: fd cf rjmp .-6 ; 0x3f04 <main+0x104>
3f02: b5 01 movw r22, r10 3f0a: b5 01 movw r22, r10
3f04: a8 01 movw r20, r16 3f0c: a8 01 movw r20, r16
3f06: a0 e0 ldi r26, 0x00 ; 0 3f0e: a0 e0 ldi r26, 0x00 ; 0
3f08: b1 e0 ldi r27, 0x01 ; 1 3f10: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
3f0a: 2c 91 ld r18, X 3f12: 2c 91 ld r18, X
3f0c: 30 e0 ldi r19, 0x00 ; 0 3f14: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
3f0e: 11 96 adiw r26, 0x01 ; 1 3f16: 11 96 adiw r26, 0x01 ; 1
3f10: 8c 91 ld r24, X 3f18: 8c 91 ld r24, X
3f12: 11 97 sbiw r26, 0x01 ; 1 3f1a: 11 97 sbiw r26, 0x01 ; 1
3f14: 90 e0 ldi r25, 0x00 ; 0 3f1c: 90 e0 ldi r25, 0x00 ; 0
3f16: 98 2f mov r25, r24 3f1e: 98 2f mov r25, r24
3f18: 88 27 eor r24, r24 3f20: 88 27 eor r24, r24
3f1a: 82 2b or r24, r18 3f22: 82 2b or r24, r18
3f1c: 93 2b or r25, r19 3f24: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3f1e: 12 96 adiw r26, 0x02 ; 2 3f26: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3f20: fb 01 movw r30, r22 3f28: fb 01 movw r30, r22
3f22: 0c 01 movw r0, r24 3f2a: 0c 01 movw r0, r24
3f24: 77 be out 0x37, r7 ; 55 3f2c: 77 be out 0x37, r7 ; 55
3f26: e8 95 spm 3f2e: e8 95 spm
3f28: 11 24 eor r1, r1 3f30: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
3f2a: 6e 5f subi r22, 0xFE ; 254 3f32: 6e 5f subi r22, 0xFE ; 254
3f2c: 7f 4f sbci r23, 0xFF ; 255 3f34: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
3f2e: 42 50 subi r20, 0x02 ; 2 3f36: 42 50 subi r20, 0x02 ; 2
3f30: 50 40 sbci r21, 0x00 ; 0 3f38: 50 40 sbci r21, 0x00 ; 0
3f32: 59 f7 brne .-42 ; 0x3f0a <main+0x10a> 3f3a: 59 f7 brne .-42 ; 0x3f12 <main+0x112>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3f34: f5 01 movw r30, r10 3f3c: f5 01 movw r30, r10
3f36: 97 be out 0x37, r9 ; 55 3f3e: 97 be out 0x37, r9 ; 55
3f38: e8 95 spm 3f40: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3f3a: 07 b6 in r0, 0x37 ; 55 3f42: 07 b6 in r0, 0x37 ; 55
3f3c: 00 fc sbrc r0, 0 3f44: 00 fc sbrc r0, 0
3f3e: fd cf rjmp .-6 ; 0x3f3a <main+0x13a> 3f46: fd cf rjmp .-6 ; 0x3f42 <main+0x142>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3f40: c7 be out 0x37, r12 ; 55 3f48: c7 be out 0x37, r12 ; 55
3f42: e8 95 spm 3f4a: e8 95 spm
3f44: 22 c0 rjmp .+68 ; 0x3f8a <main+0x18a> 3f4c: 22 c0 rjmp .+68 ; 0x3f92 <main+0x192>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
3f46: 84 37 cpi r24, 0x74 ; 116 3f4e: 84 37 cpi r24, 0x74 ; 116
3f48: 91 f4 brne .+36 ; 0x3f6e <main+0x16e> 3f50: 91 f4 brne .+36 ; 0x3f76 <main+0x176>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3f4a: 2a d0 rcall .+84 ; 0x3fa0 <getch> 3f52: 2a d0 rcall .+84 ; 0x3fa8 <getch>
3f4c: 90 e0 ldi r25, 0x00 ; 0
3f4e: d8 2f mov r29, r24
3f50: cc 27 eor r28, r28
length |= getch();
3f52: 26 d0 rcall .+76 ; 0x3fa0 <getch>
3f54: 90 e0 ldi r25, 0x00 ; 0 3f54: 90 e0 ldi r25, 0x00 ; 0
3f56: c8 2b or r28, r24 3f56: d8 2f mov r29, r24
3f58: d9 2b or r29, r25 3f58: cc 27 eor r28, r28
length |= getch();
3f5a: 26 d0 rcall .+76 ; 0x3fa8 <getch>
3f5c: 90 e0 ldi r25, 0x00 ; 0
3f5e: c8 2b or r28, r24
3f60: d9 2b or r29, r25
desttype = getch(); desttype = getch();
3f5a: 22 d0 rcall .+68 ; 0x3fa0 <getch> 3f62: 22 d0 rcall .+68 ; 0x3fa8 <getch>
verifySpace(); verifySpace();
3f5c: 33 d0 rcall .+102 ; 0x3fc4 <verifySpace> 3f64: 33 d0 rcall .+102 ; 0x3fcc <verifySpace>
3f5e: 85 01 movw r16, r10 3f66: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
3f60: f8 01 movw r30, r16 3f68: f8 01 movw r30, r16
3f62: 85 91 lpm r24, Z+ 3f6a: 85 91 lpm r24, Z+
3f64: 8f 01 movw r16, r30 3f6c: 8f 01 movw r16, r30
3f66: 14 d0 rcall .+40 ; 0x3f90 <putch> 3f6e: 14 d0 rcall .+40 ; 0x3f98 <putch>
} while (--length); } while (--length);
3f68: 21 97 sbiw r28, 0x01 ; 1 3f70: 21 97 sbiw r28, 0x01 ; 1
3f6a: d1 f7 brne .-12 ; 0x3f60 <main+0x160> 3f72: d1 f7 brne .-12 ; 0x3f68 <main+0x168>
3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a> 3f74: 0e c0 rjmp .+28 ; 0x3f92 <main+0x192>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
3f6e: 85 37 cpi r24, 0x75 ; 117 3f76: 85 37 cpi r24, 0x75 ; 117
3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180> 3f78: 39 f4 brne .+14 ; 0x3f88 <main+0x188>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
3f72: 28 d0 rcall .+80 ; 0x3fc4 <verifySpace> 3f7a: 28 d0 rcall .+80 ; 0x3fcc <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
3f74: 8e e1 ldi r24, 0x1E ; 30 3f7c: 8e e1 ldi r24, 0x1E ; 30
3f76: 0c d0 rcall .+24 ; 0x3f90 <putch> 3f7e: 0c d0 rcall .+24 ; 0x3f98 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
3f78: 84 e9 ldi r24, 0x94 ; 148 3f80: 84 e9 ldi r24, 0x94 ; 148
3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch> 3f82: 0a d0 rcall .+20 ; 0x3f98 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
3f7c: 86 e0 ldi r24, 0x06 ; 6 3f84: 86 e0 ldi r24, 0x06 ; 6
3f7e: 7d cf rjmp .-262 ; 0x3e7a <main+0x7a> 3f86: 7d cf rjmp .-262 ; 0x3e82 <main+0x82>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
3f80: 81 35 cpi r24, 0x51 ; 81 3f88: 81 35 cpi r24, 0x51 ; 81
3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188> 3f8a: 11 f4 brne .+4 ; 0x3f90 <main+0x190>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
3f84: 88 e0 ldi r24, 0x08 ; 8 3f8c: 88 e0 ldi r24, 0x08 ; 8
3f86: 18 d0 rcall .+48 ; 0x3fb8 <watchdogConfig> 3f8e: 18 d0 rcall .+48 ; 0x3fc0 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
3f88: 1d d0 rcall .+58 ; 0x3fc4 <verifySpace> 3f90: 1d d0 rcall .+58 ; 0x3fcc <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
3f8a: 80 e1 ldi r24, 0x10 ; 16 3f92: 80 e1 ldi r24, 0x10 ; 16
3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch> 3f94: 01 d0 rcall .+2 ; 0x3f98 <putch>
3f8e: 69 cf rjmp .-302 ; 0x3e62 <main+0x62> 3f96: 67 cf rjmp .-306 ; 0x3e66 <main+0x66>
00003f90 <putch>: 00003f98 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
3f90: 98 2f mov r25, r24 3f98: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
3f92: 80 91 c0 00 lds r24, 0x00C0 3f9a: 80 91 c0 00 lds r24, 0x00C0
3f96: 85 ff sbrs r24, 5 3f9e: 85 ff sbrs r24, 5
3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2> 3fa0: fc cf rjmp .-8 ; 0x3f9a <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
3f9a: 90 93 c6 00 sts 0x00C6, r25 3fa2: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
3f9e: 08 95 ret 3fa6: 08 95 ret
00003fa0 <getch>: 00003fa8 <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
3fa0: 80 91 c0 00 lds r24, 0x00C0 3fa8: 80 91 c0 00 lds r24, 0x00C0
3fa4: 87 ff sbrs r24, 7 3fac: 87 ff sbrs r24, 7
3fa6: fc cf rjmp .-8 ; 0x3fa0 <getch> 3fae: fc cf rjmp .-8 ; 0x3fa8 <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
3fa8: 80 91 c0 00 lds r24, 0x00C0 3fb0: 80 91 c0 00 lds r24, 0x00C0
3fac: 84 fd sbrc r24, 4 3fb4: 84 fd sbrc r24, 4
3fae: 01 c0 rjmp .+2 ; 0x3fb2 <getch+0x12> 3fb6: 01 c0 rjmp .+2 ; 0x3fba <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3fb0: a8 95 wdr 3fb8: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
3fb2: 80 91 c6 00 lds r24, 0x00C6 3fba: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
3fb6: 08 95 ret 3fbe: 08 95 ret
00003fb8 <watchdogConfig>: 00003fc0 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
3fb8: e0 e6 ldi r30, 0x60 ; 96 3fc0: e0 e6 ldi r30, 0x60 ; 96
3fba: f0 e0 ldi r31, 0x00 ; 0 3fc2: f0 e0 ldi r31, 0x00 ; 0
3fbc: 98 e1 ldi r25, 0x18 ; 24 3fc4: 98 e1 ldi r25, 0x18 ; 24
3fbe: 90 83 st Z, r25 3fc6: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
3fc0: 80 83 st Z, r24 3fc8: 80 83 st Z, r24
} }
3fc2: 08 95 ret 3fca: 08 95 ret
00003fc4 <verifySpace>: 00003fcc <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
3fc4: ed df rcall .-38 ; 0x3fa0 <getch> 3fcc: ed df rcall .-38 ; 0x3fa8 <getch>
3fc6: 80 32 cpi r24, 0x20 ; 32 3fce: 80 32 cpi r24, 0x20 ; 32
3fc8: 19 f0 breq .+6 ; 0x3fd0 <verifySpace+0xc> 3fd0: 19 f0 breq .+6 ; 0x3fd8 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
3fca: 88 e0 ldi r24, 0x08 ; 8 3fd2: 88 e0 ldi r24, 0x08 ; 8
3fcc: f5 df rcall .-22 ; 0x3fb8 <watchdogConfig> 3fd4: f5 df rcall .-22 ; 0x3fc0 <watchdogConfig>
3fce: ff cf rjmp .-2 ; 0x3fce <verifySpace+0xa> 3fd6: ff cf rjmp .-2 ; 0x3fd6 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
3fd0: 84 e1 ldi r24, 0x14 ; 20 3fd8: 84 e1 ldi r24, 0x14 ; 20
} }
3fd2: de cf rjmp .-68 ; 0x3f90 <putch> 3fda: de cf rjmp .-68 ; 0x3f98 <putch>
00003fd4 <getNch>: 00003fdc <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
3fd4: 1f 93 push r17 3fdc: 1f 93 push r17
3fd6: 18 2f mov r17, r24 3fde: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
3fd8: e3 df rcall .-58 ; 0x3fa0 <getch> 3fe0: e3 df rcall .-58 ; 0x3fa8 <getch>
3fda: 11 50 subi r17, 0x01 ; 1 3fe2: 11 50 subi r17, 0x01 ; 1
3fdc: e9 f7 brne .-6 ; 0x3fd8 <getNch+0x4> 3fe4: e9 f7 brne .-6 ; 0x3fe0 <getNch+0x4>
verifySpace(); verifySpace();
3fde: f2 df rcall .-28 ; 0x3fc4 <verifySpace> 3fe6: f2 df rcall .-28 ; 0x3fcc <verifySpace>
} }
3fe0: 1f 91 pop r17 3fe8: 1f 91 pop r17
3fe2: 08 95 ret 3fea: 08 95 ret
00003fe4 <appStart>: 00003fec <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
3fe4: 28 2e mov r2, r24 3fec: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
3fe6: 80 e0 ldi r24, 0x00 ; 0 3fee: 80 e0 ldi r24, 0x00 ; 0
3fe8: e7 df rcall .-50 ; 0x3fb8 <watchdogConfig> 3ff0: e7 df rcall .-50 ; 0x3fc0 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
3fea: ee 27 eor r30, r30 3ff2: ee 27 eor r30, r30
3fec: ff 27 eor r31, r31 3ff4: ff 27 eor r31, r31
3fee: 09 94 ijmp 3ff6: 09 94 ijmp

65
optiboot/bootloaders/optiboot/optiboot_pro_20mhz.hex
View File

@@ -1,34 +1,35 @@
:103E0000112484B714BE81FD01C0ECD085E08093FD :103E0000112494B714BE892F8D7011F0892FEED034
:103E1000810082E08093C00088E18093C10086E049 :103E100085E08093810082E08093C00088E18093F8
:103E20008093C20085E18093C4008EE0C5D0259ABE :103E2000C10086E08093C20085E18093C4008EE0EB
:103E300086E02CE33BEF91E03093850020938400F3 :103E3000C7D0259A86E02CE33BEF91E030938500D4
:103E400096BBB09BFECF1D9AA8958150A9F7AA24D6 :103E40002093840096BBB09BFECF1D9AA89581500D
:103E5000BB2433E0832E7724739425E0922E91E1E6 :103E5000A9F7AA24BB2433E0832E7724739425E0AA
:103E6000C92E9ED0813459F49BD0182FABD0123874 :103E6000922E91E1C92EA0D0813469F49DD0182FF3
:103E700021F1113809F482C083E08AD086C08234EF :103E7000ADD0123811F481E004C0113809F482C0C9
:103E800011F484E103C0853419F485E0A3D07DC02A :103E800083E08AD086C0823411F484E103C0853493
:103E9000853579F485D0E82EFF2482D0082F10E0F4 :103E900019F485E0A3D07DC0853579F485D0E82E6E
:103EA000102F00270E291F29000F111F8BD058013A :103EA000FF2482D0082F10E0102F00270E291F2991
:103EB0006CC0863521F484E08DD080E0DECF84367E :103EB000000F111F8BD058016CC0863521F484E0AF
:103EC00009F041C06DD090E0182F002769D090E034 :103EC0008DD080E0DECF843609F041C06DD090E027
:103ED000082B192B65D0D82EE801E12CF1E0FF2E3C :103ED000182F002769D090E0082B192B65D0D82E19
:103EE0005FD0F70181937F012197D1F76BD0F5E483 :103EE000E801E12CF1E0FF2E5FD0F70181937F0123
:103EF000DF1609F4FFCFF50187BEE89507B600FC91 :103EF0002197D1F76BD0F5E4DF1609F4FFCFF50178
:103F0000FDCFB501A801A0E0B1E02C9130E0119601 :103F000087BEE89507B600FCFDCFB501A801A0E08B
:103F10008C91119790E0982F8827822B932B1296E3 :103F1000B1E02C9130E011968C91119790E0982FA0
:103F2000FB010C0177BEE89511246E5F7F4F425074 :103F20008827822B932B1296FB010C0177BEE89514
:103F3000504059F7F50197BEE89507B600FCFDCF54 :103F300011246E5F7F4F4250504059F7F50197BEF4
:103F4000C7BEE89522C0843791F42AD090E0D82FDC :103F4000E89507B600FCFDCFC7BEE89522C08437D0
:103F5000CC2726D090E0C82BD92B22D033D0850196 :103F500091F42AD090E0D82FCC2726D090E0C82B1F
:103F6000F80185918F0114D02197D1F70EC08537C4 :103F6000D92B22D033D08501F80185918F0114D04F
:103F700039F428D08EE10CD084E90AD086E07DCFD8 :103F70002197D1F70EC0853739F428D08EE10CD0C7
:103F8000813511F488E018D01DD080E101D069CFCF :103F800084E90AD086E07DCF813511F488E018D02D
:103F9000982F8091C00085FFFCCF9093C6000895B4 :103F90001DD080E101D067CF982F8091C00085FFB0
:103FA0008091C00087FFFCCF8091C00084FD01C0DC :103FA000FCCF9093C60008958091C00087FFFCCF9E
:103FB000A8958091C6000895E0E6F0E098E190832E :103FB0008091C00084FD01C0A8958091C60008953D
:103FC00080830895EDDF803219F088E0F5DFFFCFC0 :103FC000E0E6F0E098E1908380830895EDDF8032B1
:103FD00084E1DECF1F93182FE3DF1150E9F7F2DF02 :103FD00019F088E0F5DFFFCF84E1DECF1F93182FC3
:103FE0001F910895282E80E0E7DFEE27FF27099430 :103FE000E3DF1150E9F7F2DF1F910895282E80E0FA
:023FFE000006BB :083FF000E7DFEE27FF2709942B
:023FFE000106BA
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

528
optiboot/bootloaders/optiboot/optiboot_pro_20mhz.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega168.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f0 00003e00 00003e00 00000074 2**1 0 .text 000001f8 00003e00 00003e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00003ffe 00003ffe 00000264 2**0 1 .version 00000002 00003ffe 00003ffe 0000026c 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000266 2**0 2 .debug_aranges 00000028 00000000 00000000 0000026e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 0000028e 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000296 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000302 2**0 4 .debug_info 000003e0 00000000 00000000 0000030a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006dd 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ea 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000423 00000000 00000000 000008c7 2**0 6 .debug_line 00000433 00000000 00000000 000008db 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cec 2**2 7 .debug_frame 00000080 00000000 00000000 00000d10 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d6c 2**0 8 .debug_str 00000172 00000000 00000000 00000d90 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ede 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f02 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011b5 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011d9 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,563 +36,569 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3e00: 11 24 eor r1, r1 3e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
3e02: 84 b7 in r24, 0x34 ; 52 3e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
3e04: 14 be out 0x34, r1 ; 52 3e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
3e06: 81 fd sbrc r24, 1 3e06: 89 2f mov r24, r25
3e08: 01 c0 rjmp .+2 ; 0x3e0c <main+0xc> 3e08: 8d 70 andi r24, 0x0D ; 13
3e0a: ec d0 rcall .+472 ; 0x3fe4 <appStart> 3e0a: 11 f0 breq .+4 ; 0x3e10 <main+0x10>
appStart(ch);
3e0c: 89 2f mov r24, r25
3e0e: ee d0 rcall .+476 ; 0x3fec <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
3e0c: 85 e0 ldi r24, 0x05 ; 5 3e10: 85 e0 ldi r24, 0x05 ; 5
3e0e: 80 93 81 00 sts 0x0081, r24 3e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
3e12: 82 e0 ldi r24, 0x02 ; 2 3e16: 82 e0 ldi r24, 0x02 ; 2
3e14: 80 93 c0 00 sts 0x00C0, r24 3e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
3e18: 88 e1 ldi r24, 0x18 ; 24 3e1c: 88 e1 ldi r24, 0x18 ; 24
3e1a: 80 93 c1 00 sts 0x00C1, r24 3e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
3e1e: 86 e0 ldi r24, 0x06 ; 6 3e22: 86 e0 ldi r24, 0x06 ; 6
3e20: 80 93 c2 00 sts 0x00C2, r24 3e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
3e24: 85 e1 ldi r24, 0x15 ; 21 3e28: 85 e1 ldi r24, 0x15 ; 21
3e26: 80 93 c4 00 sts 0x00C4, r24 3e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
3e2a: 8e e0 ldi r24, 0x0E ; 14 3e2e: 8e e0 ldi r24, 0x0E ; 14
3e2c: c5 d0 rcall .+394 ; 0x3fb8 <watchdogConfig> 3e30: c7 d0 rcall .+398 ; 0x3fc0 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
3e2e: 25 9a sbi 0x04, 5 ; 4 3e32: 25 9a sbi 0x04, 5 ; 4
3e30: 86 e0 ldi r24, 0x06 ; 6 3e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e32: 2c e3 ldi r18, 0x3C ; 60 3e36: 2c e3 ldi r18, 0x3C ; 60
3e34: 3b ef ldi r19, 0xFB ; 251 3e38: 3b ef ldi r19, 0xFB ; 251
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e36: 91 e0 ldi r25, 0x01 ; 1 3e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e38: 30 93 85 00 sts 0x0085, r19 3e3c: 30 93 85 00 sts 0x0085, r19
3e3c: 20 93 84 00 sts 0x0084, r18 3e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e40: 96 bb out 0x16, r25 ; 22 3e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
3e42: b0 9b sbis 0x16, 0 ; 22 3e46: b0 9b sbis 0x16, 0 ; 22
3e44: fe cf rjmp .-4 ; 0x3e42 <main+0x42> 3e48: fe cf rjmp .-4 ; 0x3e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
3e46: 1d 9a sbi 0x03, 5 ; 3 3e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3e48: a8 95 wdr 3e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
3e4a: 81 50 subi r24, 0x01 ; 1 3e4e: 81 50 subi r24, 0x01 ; 1
3e4c: a9 f7 brne .-22 ; 0x3e38 <main+0x38> 3e50: a9 f7 brne .-22 ; 0x3e3c <main+0x3c>
3e4e: aa 24 eor r10, r10 3e52: aa 24 eor r10, r10
3e50: bb 24 eor r11, r11 3e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3e52: 33 e0 ldi r19, 0x03 ; 3 3e56: 33 e0 ldi r19, 0x03 ; 3
3e54: 83 2e mov r8, r19 3e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3e56: 77 24 eor r7, r7 3e5a: 77 24 eor r7, r7
3e58: 73 94 inc r7 3e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3e5a: 25 e0 ldi r18, 0x05 ; 5 3e5e: 25 e0 ldi r18, 0x05 ; 5
3e5c: 92 2e mov r9, r18 3e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3e5e: 91 e1 ldi r25, 0x11 ; 17 3e62: 91 e1 ldi r25, 0x11 ; 17
3e60: c9 2e mov r12, r25 3e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
3e62: 9e d0 rcall .+316 ; 0x3fa0 <getch> 3e66: a0 d0 rcall .+320 ; 0x3fa8 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
3e64: 81 34 cpi r24, 0x41 ; 65 3e68: 81 34 cpi r24, 0x41 ; 65
3e66: 59 f4 brne .+22 ; 0x3e7e <main+0x7e> 3e6a: 69 f4 brne .+26 ; 0x3e86 <main+0x86>
unsigned char which = getch(); unsigned char which = getch();
3e68: 9b d0 rcall .+310 ; 0x3fa0 <getch> 3e6c: 9d d0 rcall .+314 ; 0x3fa8 <getch>
3e6a: 18 2f mov r17, r24 3e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
3e6c: ab d0 rcall .+342 ; 0x3fc4 <verifySpace> 3e70: ad d0 rcall .+346 ; 0x3fcc <verifySpace>
if (which == 0x82) {
3e6e: 12 38 cpi r17, 0x82 ; 130
3e70: 21 f1 breq .+72 ; 0x3eba <main+0xba>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
3e72: 12 38 cpi r17, 0x82 ; 130
3e74: 11 f4 brne .+4 ; 0x3e7a <main+0x7a>
putch(optiboot_version & 0xFF);
3e76: 81 e0 ldi r24, 0x01 ; 1
3e78: 04 c0 rjmp .+8 ; 0x3e82 <main+0x82>
} else if (which == 0x81) { } else if (which == 0x81) {
3e72: 11 38 cpi r17, 0x81 ; 129 3e7a: 11 38 cpi r17, 0x81 ; 129
3e74: 09 f4 brne .+2 ; 0x3e78 <main+0x78> 3e7c: 09 f4 brne .+2 ; 0x3e80 <main+0x80>
3e76: 82 c0 rjmp .+260 ; 0x3f7c <main+0x17c> 3e7e: 82 c0 rjmp .+260 ; 0x3f84 <main+0x184>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
3e78: 83 e0 ldi r24, 0x03 ; 3 3e80: 83 e0 ldi r24, 0x03 ; 3
3e7a: 8a d0 rcall .+276 ; 0x3f90 <putch> 3e82: 8a d0 rcall .+276 ; 0x3f98 <putch>
3e7c: 86 c0 rjmp .+268 ; 0x3f8a <main+0x18a> 3e84: 86 c0 rjmp .+268 ; 0x3f92 <main+0x192>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
3e7e: 82 34 cpi r24, 0x42 ; 66 3e86: 82 34 cpi r24, 0x42 ; 66
3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86> 3e88: 11 f4 brne .+4 ; 0x3e8e <main+0x8e>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
3e82: 84 e1 ldi r24, 0x14 ; 20 3e8a: 84 e1 ldi r24, 0x14 ; 20
3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c> 3e8c: 03 c0 rjmp .+6 ; 0x3e94 <main+0x94>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
3e86: 85 34 cpi r24, 0x45 ; 69 3e8e: 85 34 cpi r24, 0x45 ; 69
3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90> 3e90: 19 f4 brne .+6 ; 0x3e98 <main+0x98>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
3e8a: 85 e0 ldi r24, 0x05 ; 5 3e92: 85 e0 ldi r24, 0x05 ; 5
3e8c: a3 d0 rcall .+326 ; 0x3fd4 <getNch> 3e94: a3 d0 rcall .+326 ; 0x3fdc <getNch>
3e8e: 7d c0 rjmp .+250 ; 0x3f8a <main+0x18a> 3e96: 7d c0 rjmp .+250 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
3e90: 85 35 cpi r24, 0x55 ; 85 3e98: 85 35 cpi r24, 0x55 ; 85
3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2> 3e9a: 79 f4 brne .+30 ; 0x3eba <main+0xba>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
3e94: 85 d0 rcall .+266 ; 0x3fa0 <getch> 3e9c: 85 d0 rcall .+266 ; 0x3fa8 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
3e96: e8 2e mov r14, r24 3e9e: e8 2e mov r14, r24
3e98: ff 24 eor r15, r15 3ea0: ff 24 eor r15, r15
3e9a: 82 d0 rcall .+260 ; 0x3fa0 <getch> 3ea2: 82 d0 rcall .+260 ; 0x3fa8 <getch>
3e9c: 08 2f mov r16, r24 3ea4: 08 2f mov r16, r24
3e9e: 10 e0 ldi r17, 0x00 ; 0 3ea6: 10 e0 ldi r17, 0x00 ; 0
3ea0: 10 2f mov r17, r16 3ea8: 10 2f mov r17, r16
3ea2: 00 27 eor r16, r16 3eaa: 00 27 eor r16, r16
3ea4: 0e 29 or r16, r14 3eac: 0e 29 or r16, r14
3ea6: 1f 29 or r17, r15 3eae: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
3ea8: 00 0f add r16, r16 3eb0: 00 0f add r16, r16
3eaa: 11 1f adc r17, r17 3eb2: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
3eac: 8b d0 rcall .+278 ; 0x3fc4 <verifySpace> 3eb4: 8b d0 rcall .+278 ; 0x3fcc <verifySpace>
3eae: 58 01 movw r10, r16 3eb6: 58 01 movw r10, r16
3eb0: 6c c0 rjmp .+216 ; 0x3f8a <main+0x18a> 3eb8: 6c c0 rjmp .+216 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
3eb2: 86 35 cpi r24, 0x56 ; 86 3eba: 86 35 cpi r24, 0x56 ; 86
3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe> 3ebc: 21 f4 brne .+8 ; 0x3ec6 <main+0xc6>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
3eb6: 84 e0 ldi r24, 0x04 ; 4 3ebe: 84 e0 ldi r24, 0x04 ; 4
3eb8: 8d d0 rcall .+282 ; 0x3fd4 <getNch> 3ec0: 8d d0 rcall .+282 ; 0x3fdc <getNch>
putch(0x00); putch(0x00);
3eba: 80 e0 ldi r24, 0x00 ; 0 3ec2: 80 e0 ldi r24, 0x00 ; 0
3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a> 3ec4: de cf rjmp .-68 ; 0x3e82 <main+0x82>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
3ebe: 84 36 cpi r24, 0x64 ; 100 3ec6: 84 36 cpi r24, 0x64 ; 100
3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4> 3ec8: 09 f0 breq .+2 ; 0x3ecc <main+0xcc>
3ec2: 41 c0 rjmp .+130 ; 0x3f46 <main+0x146> 3eca: 41 c0 rjmp .+130 ; 0x3f4e <main+0x14e>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3ec4: 6d d0 rcall .+218 ; 0x3fa0 <getch> 3ecc: 6d d0 rcall .+218 ; 0x3fa8 <getch>
3ec6: 90 e0 ldi r25, 0x00 ; 0
3ec8: 18 2f mov r17, r24
3eca: 00 27 eor r16, r16
length |= getch();
3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch>
3ece: 90 e0 ldi r25, 0x00 ; 0 3ece: 90 e0 ldi r25, 0x00 ; 0
3ed0: 08 2b or r16, r24 3ed0: 18 2f mov r17, r24
3ed2: 19 2b or r17, r25 3ed2: 00 27 eor r16, r16
length |= getch();
3ed4: 69 d0 rcall .+210 ; 0x3fa8 <getch>
3ed6: 90 e0 ldi r25, 0x00 ; 0
3ed8: 08 2b or r16, r24
3eda: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
3ed4: 65 d0 rcall .+202 ; 0x3fa0 <getch> 3edc: 65 d0 rcall .+202 ; 0x3fa8 <getch>
3ed6: d8 2e mov r13, r24 3ede: d8 2e mov r13, r24
3ed8: e8 01 movw r28, r16 3ee0: e8 01 movw r28, r16
3eda: e1 2c mov r14, r1 3ee2: e1 2c mov r14, r1
3edc: f1 e0 ldi r31, 0x01 ; 1 3ee4: f1 e0 ldi r31, 0x01 ; 1
3ede: ff 2e mov r15, r31 3ee6: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
3ee0: 5f d0 rcall .+190 ; 0x3fa0 <getch> 3ee8: 5f d0 rcall .+190 ; 0x3fa8 <getch>
3ee2: f7 01 movw r30, r14 3eea: f7 01 movw r30, r14
3ee4: 81 93 st Z+, r24 3eec: 81 93 st Z+, r24
3ee6: 7f 01 movw r14, r30 3eee: 7f 01 movw r14, r30
while (--length); while (--length);
3ee8: 21 97 sbiw r28, 0x01 ; 1 3ef0: 21 97 sbiw r28, 0x01 ; 1
3eea: d1 f7 brne .-12 ; 0x3ee0 <main+0xe0> 3ef2: d1 f7 brne .-12 ; 0x3ee8 <main+0xe8>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
3eec: 6b d0 rcall .+214 ; 0x3fc4 <verifySpace> 3ef4: 6b d0 rcall .+214 ; 0x3fcc <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
3eee: f5 e4 ldi r31, 0x45 ; 69 3ef6: f5 e4 ldi r31, 0x45 ; 69
3ef0: df 16 cp r13, r31 3ef8: df 16 cp r13, r31
3ef2: 09 f4 brne .+2 ; 0x3ef6 <main+0xf6> 3efa: 09 f4 brne .+2 ; 0x3efe <main+0xfe>
3ef4: ff cf rjmp .-2 ; 0x3ef4 <main+0xf4> 3efc: ff cf rjmp .-2 ; 0x3efc <main+0xfc>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3ef6: f5 01 movw r30, r10 3efe: f5 01 movw r30, r10
3ef8: 87 be out 0x37, r8 ; 55 3f00: 87 be out 0x37, r8 ; 55
3efa: e8 95 spm 3f02: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3efc: 07 b6 in r0, 0x37 ; 55 3f04: 07 b6 in r0, 0x37 ; 55
3efe: 00 fc sbrc r0, 0 3f06: 00 fc sbrc r0, 0
3f00: fd cf rjmp .-6 ; 0x3efc <main+0xfc> 3f08: fd cf rjmp .-6 ; 0x3f04 <main+0x104>
3f02: b5 01 movw r22, r10 3f0a: b5 01 movw r22, r10
3f04: a8 01 movw r20, r16 3f0c: a8 01 movw r20, r16
3f06: a0 e0 ldi r26, 0x00 ; 0 3f0e: a0 e0 ldi r26, 0x00 ; 0
3f08: b1 e0 ldi r27, 0x01 ; 1 3f10: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
3f0a: 2c 91 ld r18, X 3f12: 2c 91 ld r18, X
3f0c: 30 e0 ldi r19, 0x00 ; 0 3f14: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
3f0e: 11 96 adiw r26, 0x01 ; 1 3f16: 11 96 adiw r26, 0x01 ; 1
3f10: 8c 91 ld r24, X 3f18: 8c 91 ld r24, X
3f12: 11 97 sbiw r26, 0x01 ; 1 3f1a: 11 97 sbiw r26, 0x01 ; 1
3f14: 90 e0 ldi r25, 0x00 ; 0 3f1c: 90 e0 ldi r25, 0x00 ; 0
3f16: 98 2f mov r25, r24 3f1e: 98 2f mov r25, r24
3f18: 88 27 eor r24, r24 3f20: 88 27 eor r24, r24
3f1a: 82 2b or r24, r18 3f22: 82 2b or r24, r18
3f1c: 93 2b or r25, r19 3f24: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3f1e: 12 96 adiw r26, 0x02 ; 2 3f26: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3f20: fb 01 movw r30, r22 3f28: fb 01 movw r30, r22
3f22: 0c 01 movw r0, r24 3f2a: 0c 01 movw r0, r24
3f24: 77 be out 0x37, r7 ; 55 3f2c: 77 be out 0x37, r7 ; 55
3f26: e8 95 spm 3f2e: e8 95 spm
3f28: 11 24 eor r1, r1 3f30: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
3f2a: 6e 5f subi r22, 0xFE ; 254 3f32: 6e 5f subi r22, 0xFE ; 254
3f2c: 7f 4f sbci r23, 0xFF ; 255 3f34: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
3f2e: 42 50 subi r20, 0x02 ; 2 3f36: 42 50 subi r20, 0x02 ; 2
3f30: 50 40 sbci r21, 0x00 ; 0 3f38: 50 40 sbci r21, 0x00 ; 0
3f32: 59 f7 brne .-42 ; 0x3f0a <main+0x10a> 3f3a: 59 f7 brne .-42 ; 0x3f12 <main+0x112>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3f34: f5 01 movw r30, r10 3f3c: f5 01 movw r30, r10
3f36: 97 be out 0x37, r9 ; 55 3f3e: 97 be out 0x37, r9 ; 55
3f38: e8 95 spm 3f40: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3f3a: 07 b6 in r0, 0x37 ; 55 3f42: 07 b6 in r0, 0x37 ; 55
3f3c: 00 fc sbrc r0, 0 3f44: 00 fc sbrc r0, 0
3f3e: fd cf rjmp .-6 ; 0x3f3a <main+0x13a> 3f46: fd cf rjmp .-6 ; 0x3f42 <main+0x142>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3f40: c7 be out 0x37, r12 ; 55 3f48: c7 be out 0x37, r12 ; 55
3f42: e8 95 spm 3f4a: e8 95 spm
3f44: 22 c0 rjmp .+68 ; 0x3f8a <main+0x18a> 3f4c: 22 c0 rjmp .+68 ; 0x3f92 <main+0x192>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
3f46: 84 37 cpi r24, 0x74 ; 116 3f4e: 84 37 cpi r24, 0x74 ; 116
3f48: 91 f4 brne .+36 ; 0x3f6e <main+0x16e> 3f50: 91 f4 brne .+36 ; 0x3f76 <main+0x176>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3f4a: 2a d0 rcall .+84 ; 0x3fa0 <getch> 3f52: 2a d0 rcall .+84 ; 0x3fa8 <getch>
3f4c: 90 e0 ldi r25, 0x00 ; 0
3f4e: d8 2f mov r29, r24
3f50: cc 27 eor r28, r28
length |= getch();
3f52: 26 d0 rcall .+76 ; 0x3fa0 <getch>
3f54: 90 e0 ldi r25, 0x00 ; 0 3f54: 90 e0 ldi r25, 0x00 ; 0
3f56: c8 2b or r28, r24 3f56: d8 2f mov r29, r24
3f58: d9 2b or r29, r25 3f58: cc 27 eor r28, r28
length |= getch();
3f5a: 26 d0 rcall .+76 ; 0x3fa8 <getch>
3f5c: 90 e0 ldi r25, 0x00 ; 0
3f5e: c8 2b or r28, r24
3f60: d9 2b or r29, r25
desttype = getch(); desttype = getch();
3f5a: 22 d0 rcall .+68 ; 0x3fa0 <getch> 3f62: 22 d0 rcall .+68 ; 0x3fa8 <getch>
verifySpace(); verifySpace();
3f5c: 33 d0 rcall .+102 ; 0x3fc4 <verifySpace> 3f64: 33 d0 rcall .+102 ; 0x3fcc <verifySpace>
3f5e: 85 01 movw r16, r10 3f66: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
3f60: f8 01 movw r30, r16 3f68: f8 01 movw r30, r16
3f62: 85 91 lpm r24, Z+ 3f6a: 85 91 lpm r24, Z+
3f64: 8f 01 movw r16, r30 3f6c: 8f 01 movw r16, r30
3f66: 14 d0 rcall .+40 ; 0x3f90 <putch> 3f6e: 14 d0 rcall .+40 ; 0x3f98 <putch>
} while (--length); } while (--length);
3f68: 21 97 sbiw r28, 0x01 ; 1 3f70: 21 97 sbiw r28, 0x01 ; 1
3f6a: d1 f7 brne .-12 ; 0x3f60 <main+0x160> 3f72: d1 f7 brne .-12 ; 0x3f68 <main+0x168>
3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a> 3f74: 0e c0 rjmp .+28 ; 0x3f92 <main+0x192>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
3f6e: 85 37 cpi r24, 0x75 ; 117 3f76: 85 37 cpi r24, 0x75 ; 117
3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180> 3f78: 39 f4 brne .+14 ; 0x3f88 <main+0x188>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
3f72: 28 d0 rcall .+80 ; 0x3fc4 <verifySpace> 3f7a: 28 d0 rcall .+80 ; 0x3fcc <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
3f74: 8e e1 ldi r24, 0x1E ; 30 3f7c: 8e e1 ldi r24, 0x1E ; 30
3f76: 0c d0 rcall .+24 ; 0x3f90 <putch> 3f7e: 0c d0 rcall .+24 ; 0x3f98 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
3f78: 84 e9 ldi r24, 0x94 ; 148 3f80: 84 e9 ldi r24, 0x94 ; 148
3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch> 3f82: 0a d0 rcall .+20 ; 0x3f98 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
3f7c: 86 e0 ldi r24, 0x06 ; 6 3f84: 86 e0 ldi r24, 0x06 ; 6
3f7e: 7d cf rjmp .-262 ; 0x3e7a <main+0x7a> 3f86: 7d cf rjmp .-262 ; 0x3e82 <main+0x82>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
3f80: 81 35 cpi r24, 0x51 ; 81 3f88: 81 35 cpi r24, 0x51 ; 81
3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188> 3f8a: 11 f4 brne .+4 ; 0x3f90 <main+0x190>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
3f84: 88 e0 ldi r24, 0x08 ; 8 3f8c: 88 e0 ldi r24, 0x08 ; 8
3f86: 18 d0 rcall .+48 ; 0x3fb8 <watchdogConfig> 3f8e: 18 d0 rcall .+48 ; 0x3fc0 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
3f88: 1d d0 rcall .+58 ; 0x3fc4 <verifySpace> 3f90: 1d d0 rcall .+58 ; 0x3fcc <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
3f8a: 80 e1 ldi r24, 0x10 ; 16 3f92: 80 e1 ldi r24, 0x10 ; 16
3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch> 3f94: 01 d0 rcall .+2 ; 0x3f98 <putch>
3f8e: 69 cf rjmp .-302 ; 0x3e62 <main+0x62> 3f96: 67 cf rjmp .-306 ; 0x3e66 <main+0x66>
00003f90 <putch>: 00003f98 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
3f90: 98 2f mov r25, r24 3f98: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
3f92: 80 91 c0 00 lds r24, 0x00C0 3f9a: 80 91 c0 00 lds r24, 0x00C0
3f96: 85 ff sbrs r24, 5 3f9e: 85 ff sbrs r24, 5
3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2> 3fa0: fc cf rjmp .-8 ; 0x3f9a <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
3f9a: 90 93 c6 00 sts 0x00C6, r25 3fa2: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
3f9e: 08 95 ret 3fa6: 08 95 ret
00003fa0 <getch>: 00003fa8 <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
3fa0: 80 91 c0 00 lds r24, 0x00C0 3fa8: 80 91 c0 00 lds r24, 0x00C0
3fa4: 87 ff sbrs r24, 7 3fac: 87 ff sbrs r24, 7
3fa6: fc cf rjmp .-8 ; 0x3fa0 <getch> 3fae: fc cf rjmp .-8 ; 0x3fa8 <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
3fa8: 80 91 c0 00 lds r24, 0x00C0 3fb0: 80 91 c0 00 lds r24, 0x00C0
3fac: 84 fd sbrc r24, 4 3fb4: 84 fd sbrc r24, 4
3fae: 01 c0 rjmp .+2 ; 0x3fb2 <getch+0x12> 3fb6: 01 c0 rjmp .+2 ; 0x3fba <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3fb0: a8 95 wdr 3fb8: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
3fb2: 80 91 c6 00 lds r24, 0x00C6 3fba: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
3fb6: 08 95 ret 3fbe: 08 95 ret
00003fb8 <watchdogConfig>: 00003fc0 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
3fb8: e0 e6 ldi r30, 0x60 ; 96 3fc0: e0 e6 ldi r30, 0x60 ; 96
3fba: f0 e0 ldi r31, 0x00 ; 0 3fc2: f0 e0 ldi r31, 0x00 ; 0
3fbc: 98 e1 ldi r25, 0x18 ; 24 3fc4: 98 e1 ldi r25, 0x18 ; 24
3fbe: 90 83 st Z, r25 3fc6: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
3fc0: 80 83 st Z, r24 3fc8: 80 83 st Z, r24
} }
3fc2: 08 95 ret 3fca: 08 95 ret
00003fc4 <verifySpace>: 00003fcc <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
3fc4: ed df rcall .-38 ; 0x3fa0 <getch> 3fcc: ed df rcall .-38 ; 0x3fa8 <getch>
3fc6: 80 32 cpi r24, 0x20 ; 32 3fce: 80 32 cpi r24, 0x20 ; 32
3fc8: 19 f0 breq .+6 ; 0x3fd0 <verifySpace+0xc> 3fd0: 19 f0 breq .+6 ; 0x3fd8 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
3fca: 88 e0 ldi r24, 0x08 ; 8 3fd2: 88 e0 ldi r24, 0x08 ; 8
3fcc: f5 df rcall .-22 ; 0x3fb8 <watchdogConfig> 3fd4: f5 df rcall .-22 ; 0x3fc0 <watchdogConfig>
3fce: ff cf rjmp .-2 ; 0x3fce <verifySpace+0xa> 3fd6: ff cf rjmp .-2 ; 0x3fd6 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
3fd0: 84 e1 ldi r24, 0x14 ; 20 3fd8: 84 e1 ldi r24, 0x14 ; 20
} }
3fd2: de cf rjmp .-68 ; 0x3f90 <putch> 3fda: de cf rjmp .-68 ; 0x3f98 <putch>
00003fd4 <getNch>: 00003fdc <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
3fd4: 1f 93 push r17 3fdc: 1f 93 push r17
3fd6: 18 2f mov r17, r24 3fde: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
3fd8: e3 df rcall .-58 ; 0x3fa0 <getch> 3fe0: e3 df rcall .-58 ; 0x3fa8 <getch>
3fda: 11 50 subi r17, 0x01 ; 1 3fe2: 11 50 subi r17, 0x01 ; 1
3fdc: e9 f7 brne .-6 ; 0x3fd8 <getNch+0x4> 3fe4: e9 f7 brne .-6 ; 0x3fe0 <getNch+0x4>
verifySpace(); verifySpace();
3fde: f2 df rcall .-28 ; 0x3fc4 <verifySpace> 3fe6: f2 df rcall .-28 ; 0x3fcc <verifySpace>
} }
3fe0: 1f 91 pop r17 3fe8: 1f 91 pop r17
3fe2: 08 95 ret 3fea: 08 95 ret
00003fe4 <appStart>: 00003fec <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
3fe4: 28 2e mov r2, r24 3fec: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
3fe6: 80 e0 ldi r24, 0x00 ; 0 3fee: 80 e0 ldi r24, 0x00 ; 0
3fe8: e7 df rcall .-50 ; 0x3fb8 <watchdogConfig> 3ff0: e7 df rcall .-50 ; 0x3fc0 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
3fea: ee 27 eor r30, r30 3ff2: ee 27 eor r30, r30
3fec: ff 27 eor r31, r31 3ff4: ff 27 eor r31, r31
3fee: 09 94 ijmp 3ff6: 09 94 ijmp

65
optiboot/bootloaders/optiboot/optiboot_pro_8MHz.hex
View File

@@ -1,34 +1,35 @@
:103E0000112484B714BE81FD01C0ECD085E08093FD :103E0000112494B714BE892F8D7011F0892FEED034
:103E1000810082E08093C00088E18093C10086E049 :103E100085E08093810082E08093C00088E18093F8
:103E20008093C20088E08093C4008EE0C5D0259ABC :103E2000C10086E08093C20088E08093C4008EE0E9
:103E300086E028E13EEF91E03093850020938400F6 :103E3000C7D0259A86E028E13EEF91E030938500D7
:103E400096BBB09BFECF1D9AA8958150A9F7AA24D6 :103E40002093840096BBB09BFECF1D9AA89581500D
:103E5000BB2433E0832E7724739425E0922E91E1E6 :103E5000A9F7AA24BB2433E0832E7724739425E0AA
:103E6000C92E9ED0813459F49BD0182FABD0123874 :103E6000922E91E1C92EA0D0813469F49DD0182FF3
:103E700021F1113809F482C083E08AD086C08234EF :103E7000ADD0123811F481E004C0113809F482C0C9
:103E800011F484E103C0853419F485E0A3D07DC02A :103E800083E08AD086C0823411F484E103C0853493
:103E9000853579F485D0E82EFF2482D0082F10E0F4 :103E900019F485E0A3D07DC0853579F485D0E82E6E
:103EA000102F00270E291F29000F111F8BD058013A :103EA000FF2482D0082F10E0102F00270E291F2991
:103EB0006CC0863521F484E08DD080E0DECF84367E :103EB000000F111F8BD058016CC0863521F484E0AF
:103EC00009F041C06DD090E0182F002769D090E034 :103EC0008DD080E0DECF843609F041C06DD090E027
:103ED000082B192B65D0D82EE801E12CF1E0FF2E3C :103ED000182F002769D090E0082B192B65D0D82E19
:103EE0005FD0F70181937F012197D1F76BD0F5E483 :103EE000E801E12CF1E0FF2E5FD0F70181937F0123
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:103F6000F80185918F0114D02197D1F70EC08537C4 :103F6000D92B22D033D08501F80185918F0114D04F
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:103F8000813511F488E018D01DD080E101D069CFCF :103F800084E90AD086E07DCF813511F488E018D02D
:103F9000982F8091C00085FFFCCF9093C6000895B4 :103F90001DD080E101D067CF982F8091C00085FFB0
:103FA0008091C00087FFFCCF8091C00084FD01C0DC :103FA000FCCF9093C60008958091C00087FFFCCF9E
:103FB000A8958091C6000895E0E6F0E098E190832E :103FB0008091C00084FD01C0A8958091C60008953D
:103FC00080830895EDDF803219F088E0F5DFFFCFC0 :103FC000E0E6F0E098E1908380830895EDDF8032B1
:103FD00084E1DECF1F93182FE3DF1150E9F7F2DF02 :103FD00019F088E0F5DFFFCF84E1DECF1F93182FC3
:103FE0001F910895282E80E0E7DFEE27FF27099430 :103FE000E3DF1150E9F7F2DF1F910895282E80E0FA
:023FFE000006BB :083FF000E7DFEE27FF2709942B
:023FFE000106BA
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

528
optiboot/bootloaders/optiboot/optiboot_pro_8MHz.lst
View File

@@ -3,27 +3,27 @@ optiboot_atmega168.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001f0 00003e00 00003e00 00000074 2**1 0 .text 000001f8 00003e00 00003e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00003ffe 00003ffe 00000264 2**0 1 .version 00000002 00003ffe 00003ffe 0000026c 2**0
CONTENTS, ALLOC, LOAD, DATA CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .debug_aranges 00000028 00000000 00000000 00000266 2**0 2 .debug_aranges 00000028 00000000 00000000 0000026e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 00000074 00000000 00000000 0000028e 2**0 3 .debug_pubnames 00000074 00000000 00000000 00000296 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_info 000003db 00000000 00000000 00000302 2**0 4 .debug_info 000003e0 00000000 00000000 0000030a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 000001ea 00000000 00000000 000006dd 2**0 5 .debug_abbrev 000001f1 00000000 00000000 000006ea 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000423 00000000 00000000 000008c7 2**0 6 .debug_line 00000433 00000000 00000000 000008db 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000cec 2**2 7 .debug_frame 00000080 00000000 00000000 00000d10 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000172 00000000 00000000 00000d6c 2**0 8 .debug_str 00000172 00000000 00000000 00000d90 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_loc 000002d7 00000000 00000000 00000ede 2**0 9 .debug_loc 000002d7 00000000 00000000 00000f02 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 000000b8 00000000 00000000 000011b5 2**0 10 .debug_ranges 000000b8 00000000 00000000 000011d9 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
@@ -36,563 +36,569 @@ Disassembly of section .text:
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3e00: 11 24 eor r1, r1 3e00: 11 24 eor r1, r1
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) * modified Adaboot no-wait mod.
SP=RAMEND; // This is done by hardware reset * Pass the reset reason to app. Also, it appears that an Uno poweron
#endif * can leave multiple reset flags set; we only want the bootloader to
* run on an 'external reset only' status
// Adaboot no-wait mod */
ch = MCUSR; ch = MCUSR;
3e02: 84 b7 in r24, 0x34 ; 52 3e02: 94 b7 in r25, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
3e04: 14 be out 0x34, r1 ; 52 3e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(ch); if (ch & (_BV(WDRF) | _BV(BORF) | _BV(PORF)))
3e06: 81 fd sbrc r24, 1 3e06: 89 2f mov r24, r25
3e08: 01 c0 rjmp .+2 ; 0x3e0c <main+0xc> 3e08: 8d 70 andi r24, 0x0D ; 13
3e0a: ec d0 rcall .+472 ; 0x3fe4 <appStart> 3e0a: 11 f0 breq .+4 ; 0x3e10 <main+0x10>
appStart(ch);
3e0c: 89 2f mov r24, r25
3e0e: ee d0 rcall .+476 ; 0x3fec <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
3e0c: 85 e0 ldi r24, 0x05 ; 5 3e10: 85 e0 ldi r24, 0x05 ; 5
3e0e: 80 93 81 00 sts 0x0081, r24 3e12: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UART_SRA = _BV(U2X0); //Double speed mode USART0 UART_SRA = _BV(U2X0); //Double speed mode USART0
3e12: 82 e0 ldi r24, 0x02 ; 2 3e16: 82 e0 ldi r24, 0x02 ; 2
3e14: 80 93 c0 00 sts 0x00C0, r24 3e18: 80 93 c0 00 sts 0x00C0, r24
UART_SRB = _BV(RXEN0) | _BV(TXEN0); UART_SRB = _BV(RXEN0) | _BV(TXEN0);
3e18: 88 e1 ldi r24, 0x18 ; 24 3e1c: 88 e1 ldi r24, 0x18 ; 24
3e1a: 80 93 c1 00 sts 0x00C1, r24 3e1e: 80 93 c1 00 sts 0x00C1, r24
UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
3e1e: 86 e0 ldi r24, 0x06 ; 6 3e22: 86 e0 ldi r24, 0x06 ; 6
3e20: 80 93 c2 00 sts 0x00C2, r24 3e24: 80 93 c2 00 sts 0x00C2, r24
UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
3e24: 88 e0 ldi r24, 0x08 ; 8 3e28: 88 e0 ldi r24, 0x08 ; 8
3e26: 80 93 c4 00 sts 0x00C4, r24 3e2a: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
3e2a: 8e e0 ldi r24, 0x0E ; 14 3e2e: 8e e0 ldi r24, 0x0E ; 14
3e2c: c5 d0 rcall .+394 ; 0x3fb8 <watchdogConfig> 3e30: c7 d0 rcall .+398 ; 0x3fc0 <watchdogConfig>
#if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
3e2e: 25 9a sbi 0x04, 5 ; 4 3e32: 25 9a sbi 0x04, 5 ; 4
3e30: 86 e0 ldi r24, 0x06 ; 6 3e34: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e32: 28 e1 ldi r18, 0x18 ; 24 3e36: 28 e1 ldi r18, 0x18 ; 24
3e34: 3e ef ldi r19, 0xFE ; 254 3e38: 3e ef ldi r19, 0xFE ; 254
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e36: 91 e0 ldi r25, 0x01 ; 1 3e3a: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
3e38: 30 93 85 00 sts 0x0085, r19 3e3c: 30 93 85 00 sts 0x0085, r19
3e3c: 20 93 84 00 sts 0x0084, r18 3e40: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
3e40: 96 bb out 0x16, r25 ; 22 3e44: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
3e42: b0 9b sbis 0x16, 0 ; 22 3e46: b0 9b sbis 0x16, 0 ; 22
3e44: fe cf rjmp .-4 ; 0x3e42 <main+0x42> 3e48: fe cf rjmp .-4 ; 0x3e46 <main+0x46>
#if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
3e46: 1d 9a sbi 0x03, 5 ; 3 3e4a: 1d 9a sbi 0x03, 5 ; 3
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3e48: a8 95 wdr 3e4c: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
3e4a: 81 50 subi r24, 0x01 ; 1 3e4e: 81 50 subi r24, 0x01 ; 1
3e4c: a9 f7 brne .-22 ; 0x3e38 <main+0x38> 3e50: a9 f7 brne .-22 ; 0x3e3c <main+0x3c>
3e4e: aa 24 eor r10, r10 3e52: aa 24 eor r10, r10
3e50: bb 24 eor r11, r11 3e54: bb 24 eor r11, r11
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3e52: 33 e0 ldi r19, 0x03 ; 3 3e56: 33 e0 ldi r19, 0x03 ; 3
3e54: 83 2e mov r8, r19 3e58: 83 2e mov r8, r19
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3e56: 77 24 eor r7, r7 3e5a: 77 24 eor r7, r7
3e58: 73 94 inc r7 3e5c: 73 94 inc r7
} while (len -= 2); } while (len -= 2);
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3e5a: 25 e0 ldi r18, 0x05 ; 5 3e5e: 25 e0 ldi r18, 0x05 ; 5
3e5c: 92 2e mov r9, r18 3e60: 92 2e mov r9, r18
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3e5e: 91 e1 ldi r25, 0x11 ; 17 3e62: 91 e1 ldi r25, 0x11 ; 17
3e60: c9 2e mov r12, r25 3e64: c9 2e mov r12, r25
#endif #endif
/* Forever loop: exits by causing WDT reset */ /* Forever loop: exits by causing WDT reset */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
3e62: 9e d0 rcall .+316 ; 0x3fa0 <getch> 3e66: a0 d0 rcall .+320 ; 0x3fa8 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
3e64: 81 34 cpi r24, 0x41 ; 65 3e68: 81 34 cpi r24, 0x41 ; 65
3e66: 59 f4 brne .+22 ; 0x3e7e <main+0x7e> 3e6a: 69 f4 brne .+26 ; 0x3e86 <main+0x86>
unsigned char which = getch(); unsigned char which = getch();
3e68: 9b d0 rcall .+310 ; 0x3fa0 <getch> 3e6c: 9d d0 rcall .+314 ; 0x3fa8 <getch>
3e6a: 18 2f mov r17, r24 3e6e: 18 2f mov r17, r24
verifySpace(); verifySpace();
3e6c: ab d0 rcall .+342 ; 0x3fc4 <verifySpace> 3e70: ad d0 rcall .+346 ; 0x3fcc <verifySpace>
if (which == 0x82) {
3e6e: 12 38 cpi r17, 0x82 ; 130
3e70: 21 f1 breq .+72 ; 0x3eba <main+0xba>
/* /*
* Send optiboot version as "minor SW version" * Send optiboot version as "SW version"
* Note that the references to memory are optimized away.
*/ */
putch(OPTIBOOT_MINVER); if (which == 0x82) {
3e72: 12 38 cpi r17, 0x82 ; 130
3e74: 11 f4 brne .+4 ; 0x3e7a <main+0x7a>
putch(optiboot_version & 0xFF);
3e76: 81 e0 ldi r24, 0x01 ; 1
3e78: 04 c0 rjmp .+8 ; 0x3e82 <main+0x82>
} else if (which == 0x81) { } else if (which == 0x81) {
3e72: 11 38 cpi r17, 0x81 ; 129 3e7a: 11 38 cpi r17, 0x81 ; 129
3e74: 09 f4 brne .+2 ; 0x3e78 <main+0x78> 3e7c: 09 f4 brne .+2 ; 0x3e80 <main+0x80>
3e76: 82 c0 rjmp .+260 ; 0x3f7c <main+0x17c> 3e7e: 82 c0 rjmp .+260 ; 0x3f84 <main+0x184>
} else { } else {
/* /*
* GET PARAMETER returns a generic 0x03 reply for * GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy * other parameters - enough to keep Avrdude happy
*/ */
putch(0x03); putch(0x03);
3e78: 83 e0 ldi r24, 0x03 ; 3 3e80: 83 e0 ldi r24, 0x03 ; 3
3e7a: 8a d0 rcall .+276 ; 0x3f90 <putch> 3e82: 8a d0 rcall .+276 ; 0x3f98 <putch>
3e7c: 86 c0 rjmp .+268 ; 0x3f8a <main+0x18a> 3e84: 86 c0 rjmp .+268 ; 0x3f92 <main+0x192>
} }
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
3e7e: 82 34 cpi r24, 0x42 ; 66 3e86: 82 34 cpi r24, 0x42 ; 66
3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86> 3e88: 11 f4 brne .+4 ; 0x3e8e <main+0x8e>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
3e82: 84 e1 ldi r24, 0x14 ; 20 3e8a: 84 e1 ldi r24, 0x14 ; 20
3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c> 3e8c: 03 c0 rjmp .+6 ; 0x3e94 <main+0x94>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
3e86: 85 34 cpi r24, 0x45 ; 69 3e8e: 85 34 cpi r24, 0x45 ; 69
3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90> 3e90: 19 f4 brne .+6 ; 0x3e98 <main+0x98>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
3e8a: 85 e0 ldi r24, 0x05 ; 5 3e92: 85 e0 ldi r24, 0x05 ; 5
3e8c: a3 d0 rcall .+326 ; 0x3fd4 <getNch> 3e94: a3 d0 rcall .+326 ; 0x3fdc <getNch>
3e8e: 7d c0 rjmp .+250 ; 0x3f8a <main+0x18a> 3e96: 7d c0 rjmp .+250 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
3e90: 85 35 cpi r24, 0x55 ; 85 3e98: 85 35 cpi r24, 0x55 ; 85
3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2> 3e9a: 79 f4 brne .+30 ; 0x3eba <main+0xba>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
3e94: 85 d0 rcall .+266 ; 0x3fa0 <getch> 3e9c: 85 d0 rcall .+266 ; 0x3fa8 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
3e96: e8 2e mov r14, r24 3e9e: e8 2e mov r14, r24
3e98: ff 24 eor r15, r15 3ea0: ff 24 eor r15, r15
3e9a: 82 d0 rcall .+260 ; 0x3fa0 <getch> 3ea2: 82 d0 rcall .+260 ; 0x3fa8 <getch>
3e9c: 08 2f mov r16, r24 3ea4: 08 2f mov r16, r24
3e9e: 10 e0 ldi r17, 0x00 ; 0 3ea6: 10 e0 ldi r17, 0x00 ; 0
3ea0: 10 2f mov r17, r16 3ea8: 10 2f mov r17, r16
3ea2: 00 27 eor r16, r16 3eaa: 00 27 eor r16, r16
3ea4: 0e 29 or r16, r14 3eac: 0e 29 or r16, r14
3ea6: 1f 29 or r17, r15 3eae: 1f 29 or r17, r15
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
3ea8: 00 0f add r16, r16 3eb0: 00 0f add r16, r16
3eaa: 11 1f adc r17, r17 3eb2: 11 1f adc r17, r17
address = newAddress; address = newAddress;
verifySpace(); verifySpace();
3eac: 8b d0 rcall .+278 ; 0x3fc4 <verifySpace> 3eb4: 8b d0 rcall .+278 ; 0x3fcc <verifySpace>
3eae: 58 01 movw r10, r16 3eb6: 58 01 movw r10, r16
3eb0: 6c c0 rjmp .+216 ; 0x3f8a <main+0x18a> 3eb8: 6c c0 rjmp .+216 ; 0x3f92 <main+0x192>
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
3eb2: 86 35 cpi r24, 0x56 ; 86 3eba: 86 35 cpi r24, 0x56 ; 86
3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe> 3ebc: 21 f4 brne .+8 ; 0x3ec6 <main+0xc6>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
3eb6: 84 e0 ldi r24, 0x04 ; 4 3ebe: 84 e0 ldi r24, 0x04 ; 4
3eb8: 8d d0 rcall .+282 ; 0x3fd4 <getNch> 3ec0: 8d d0 rcall .+282 ; 0x3fdc <getNch>
putch(0x00); putch(0x00);
3eba: 80 e0 ldi r24, 0x00 ; 0 3ec2: 80 e0 ldi r24, 0x00 ; 0
3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a> 3ec4: de cf rjmp .-68 ; 0x3e82 <main+0x82>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
3ebe: 84 36 cpi r24, 0x64 ; 100 3ec6: 84 36 cpi r24, 0x64 ; 100
3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4> 3ec8: 09 f0 breq .+2 ; 0x3ecc <main+0xcc>
3ec2: 41 c0 rjmp .+130 ; 0x3f46 <main+0x146> 3eca: 41 c0 rjmp .+130 ; 0x3f4e <main+0x14e>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t desttype; uint8_t desttype;
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t savelength; uint16_t savelength;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3ec4: 6d d0 rcall .+218 ; 0x3fa0 <getch> 3ecc: 6d d0 rcall .+218 ; 0x3fa8 <getch>
3ec6: 90 e0 ldi r25, 0x00 ; 0
3ec8: 18 2f mov r17, r24
3eca: 00 27 eor r16, r16
length |= getch();
3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch>
3ece: 90 e0 ldi r25, 0x00 ; 0 3ece: 90 e0 ldi r25, 0x00 ; 0
3ed0: 08 2b or r16, r24 3ed0: 18 2f mov r17, r24
3ed2: 19 2b or r17, r25 3ed2: 00 27 eor r16, r16
length |= getch();
3ed4: 69 d0 rcall .+210 ; 0x3fa8 <getch>
3ed6: 90 e0 ldi r25, 0x00 ; 0
3ed8: 08 2b or r16, r24
3eda: 19 2b or r17, r25
savelength = length; savelength = length;
desttype = getch(); desttype = getch();
3ed4: 65 d0 rcall .+202 ; 0x3fa0 <getch> 3edc: 65 d0 rcall .+202 ; 0x3fa8 <getch>
3ed6: d8 2e mov r13, r24 3ede: d8 2e mov r13, r24
3ed8: e8 01 movw r28, r16 3ee0: e8 01 movw r28, r16
3eda: e1 2c mov r14, r1 3ee2: e1 2c mov r14, r1
3edc: f1 e0 ldi r31, 0x01 ; 1 3ee4: f1 e0 ldi r31, 0x01 ; 1
3ede: ff 2e mov r15, r31 3ee6: ff 2e mov r15, r31
// read a page worth of contents // read a page worth of contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
3ee0: 5f d0 rcall .+190 ; 0x3fa0 <getch> 3ee8: 5f d0 rcall .+190 ; 0x3fa8 <getch>
3ee2: f7 01 movw r30, r14 3eea: f7 01 movw r30, r14
3ee4: 81 93 st Z+, r24 3eec: 81 93 st Z+, r24
3ee6: 7f 01 movw r14, r30 3eee: 7f 01 movw r14, r30
while (--length); while (--length);
3ee8: 21 97 sbiw r28, 0x01 ; 1 3ef0: 21 97 sbiw r28, 0x01 ; 1
3eea: d1 f7 brne .-12 ; 0x3ee0 <main+0xe0> 3ef2: d1 f7 brne .-12 ; 0x3ee8 <main+0xe8>
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
3eec: 6b d0 rcall .+214 ; 0x3fc4 <verifySpace> 3ef4: 6b d0 rcall .+214 ; 0x3fcc <verifySpace>
* void writebuffer(memtype, buffer, address, length) * void writebuffer(memtype, buffer, address, length)
*/ */
static inline void writebuffer(int8_t memtype, uint8_t *mybuff, static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
uint16_t address, uint16_t len) uint16_t address, uint16_t len)
{ {
switch (memtype) { switch (memtype) {
3eee: f5 e4 ldi r31, 0x45 ; 69 3ef6: f5 e4 ldi r31, 0x45 ; 69
3ef0: df 16 cp r13, r31 3ef8: df 16 cp r13, r31
3ef2: 09 f4 brne .+2 ; 0x3ef6 <main+0xf6> 3efa: 09 f4 brne .+2 ; 0x3efe <main+0xfe>
3ef4: ff cf rjmp .-2 ; 0x3ef4 <main+0xf4> 3efc: ff cf rjmp .-2 ; 0x3efc <main+0xfc>
* Start the page erase and wait for it to finish. There * Start the page erase and wait for it to finish. There
* used to be code to do this while receiving the data over * used to be code to do this while receiving the data over
* the serial link, but the performance improvement was slight, * the serial link, but the performance improvement was slight,
* and we needed the space back. * and we needed the space back.
*/ */
__boot_page_erase_short((uint16_t)(void*)address); __boot_page_erase_short((uint16_t)(void*)address);
3ef6: f5 01 movw r30, r10 3efe: f5 01 movw r30, r10
3ef8: 87 be out 0x37, r8 ; 55 3f00: 87 be out 0x37, r8 ; 55
3efa: e8 95 spm 3f02: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3efc: 07 b6 in r0, 0x37 ; 55 3f04: 07 b6 in r0, 0x37 ; 55
3efe: 00 fc sbrc r0, 0 3f06: 00 fc sbrc r0, 0
3f00: fd cf rjmp .-6 ; 0x3efc <main+0xfc> 3f08: fd cf rjmp .-6 ; 0x3f04 <main+0x104>
3f02: b5 01 movw r22, r10 3f0a: b5 01 movw r22, r10
3f04: a8 01 movw r20, r16 3f0c: a8 01 movw r20, r16
3f06: a0 e0 ldi r26, 0x00 ; 0 3f0e: a0 e0 ldi r26, 0x00 ; 0
3f08: b1 e0 ldi r27, 0x01 ; 1 3f10: b1 e0 ldi r27, 0x01 ; 1
/* /*
* Copy data from the buffer into the flash write buffer. * Copy data from the buffer into the flash write buffer.
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
3f0a: 2c 91 ld r18, X 3f12: 2c 91 ld r18, X
3f0c: 30 e0 ldi r19, 0x00 ; 0 3f14: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
3f0e: 11 96 adiw r26, 0x01 ; 1 3f16: 11 96 adiw r26, 0x01 ; 1
3f10: 8c 91 ld r24, X 3f18: 8c 91 ld r24, X
3f12: 11 97 sbiw r26, 0x01 ; 1 3f1a: 11 97 sbiw r26, 0x01 ; 1
3f14: 90 e0 ldi r25, 0x00 ; 0 3f1c: 90 e0 ldi r25, 0x00 ; 0
3f16: 98 2f mov r25, r24 3f1e: 98 2f mov r25, r24
3f18: 88 27 eor r24, r24 3f20: 88 27 eor r24, r24
3f1a: 82 2b or r24, r18 3f22: 82 2b or r24, r18
3f1c: 93 2b or r25, r19 3f24: 93 2b or r25, r19
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
3f1e: 12 96 adiw r26, 0x02 ; 2 3f26: 12 96 adiw r26, 0x02 ; 2
*/ */
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
3f20: fb 01 movw r30, r22 3f28: fb 01 movw r30, r22
3f22: 0c 01 movw r0, r24 3f2a: 0c 01 movw r0, r24
3f24: 77 be out 0x37, r7 ; 55 3f2c: 77 be out 0x37, r7 ; 55
3f26: e8 95 spm 3f2e: e8 95 spm
3f28: 11 24 eor r1, r1 3f30: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
3f2a: 6e 5f subi r22, 0xFE ; 254 3f32: 6e 5f subi r22, 0xFE ; 254
3f2c: 7f 4f sbci r23, 0xFF ; 255 3f34: 7f 4f sbci r23, 0xFF ; 255
} while (len -= 2); } while (len -= 2);
3f2e: 42 50 subi r20, 0x02 ; 2 3f36: 42 50 subi r20, 0x02 ; 2
3f30: 50 40 sbci r21, 0x00 ; 0 3f38: 50 40 sbci r21, 0x00 ; 0
3f32: 59 f7 brne .-42 ; 0x3f0a <main+0x10a> 3f3a: 59 f7 brne .-42 ; 0x3f12 <main+0x112>
/* /*
* Actually Write the buffer to flash (and wait for it to finish.) * Actually Write the buffer to flash (and wait for it to finish.)
*/ */
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
3f34: f5 01 movw r30, r10 3f3c: f5 01 movw r30, r10
3f36: 97 be out 0x37, r9 ; 55 3f3e: 97 be out 0x37, r9 ; 55
3f38: e8 95 spm 3f40: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
3f3a: 07 b6 in r0, 0x37 ; 55 3f42: 07 b6 in r0, 0x37 ; 55
3f3c: 00 fc sbrc r0, 0 3f44: 00 fc sbrc r0, 0
3f3e: fd cf rjmp .-6 ; 0x3f3a <main+0x13a> 3f46: fd cf rjmp .-6 ; 0x3f42 <main+0x142>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
3f40: c7 be out 0x37, r12 ; 55 3f48: c7 be out 0x37, r12 ; 55
3f42: e8 95 spm 3f4a: e8 95 spm
3f44: 22 c0 rjmp .+68 ; 0x3f8a <main+0x18a> 3f4c: 22 c0 rjmp .+68 ; 0x3f92 <main+0x192>
writebuffer(desttype, buff, address, savelength); writebuffer(desttype, buff, address, savelength);
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
3f46: 84 37 cpi r24, 0x74 ; 116 3f4e: 84 37 cpi r24, 0x74 ; 116
3f48: 91 f4 brne .+36 ; 0x3f6e <main+0x16e> 3f50: 91 f4 brne .+36 ; 0x3f76 <main+0x176>
uint8_t desttype; uint8_t desttype;
length = getch()<<8; /* getlen() */ length = getch()<<8; /* getlen() */
3f4a: 2a d0 rcall .+84 ; 0x3fa0 <getch> 3f52: 2a d0 rcall .+84 ; 0x3fa8 <getch>
3f4c: 90 e0 ldi r25, 0x00 ; 0
3f4e: d8 2f mov r29, r24
3f50: cc 27 eor r28, r28
length |= getch();
3f52: 26 d0 rcall .+76 ; 0x3fa0 <getch>
3f54: 90 e0 ldi r25, 0x00 ; 0 3f54: 90 e0 ldi r25, 0x00 ; 0
3f56: c8 2b or r28, r24 3f56: d8 2f mov r29, r24
3f58: d9 2b or r29, r25 3f58: cc 27 eor r28, r28
length |= getch();
3f5a: 26 d0 rcall .+76 ; 0x3fa8 <getch>
3f5c: 90 e0 ldi r25, 0x00 ; 0
3f5e: c8 2b or r28, r24
3f60: d9 2b or r29, r25
desttype = getch(); desttype = getch();
3f5a: 22 d0 rcall .+68 ; 0x3fa0 <getch> 3f62: 22 d0 rcall .+68 ; 0x3fa8 <getch>
verifySpace(); verifySpace();
3f5c: 33 d0 rcall .+102 ; 0x3fc4 <verifySpace> 3f64: 33 d0 rcall .+102 ; 0x3fcc <verifySpace>
3f5e: 85 01 movw r16, r10 3f66: 85 01 movw r16, r10
__asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#else #else
// read a Flash byte and increment the address // read a Flash byte and increment the address
__asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
#endif #endif
putch(ch); putch(ch);
3f60: f8 01 movw r30, r16 3f68: f8 01 movw r30, r16
3f62: 85 91 lpm r24, Z+ 3f6a: 85 91 lpm r24, Z+
3f64: 8f 01 movw r16, r30 3f6c: 8f 01 movw r16, r30
3f66: 14 d0 rcall .+40 ; 0x3f90 <putch> 3f6e: 14 d0 rcall .+40 ; 0x3f98 <putch>
} while (--length); } while (--length);
3f68: 21 97 sbiw r28, 0x01 ; 1 3f70: 21 97 sbiw r28, 0x01 ; 1
3f6a: d1 f7 brne .-12 ; 0x3f60 <main+0x160> 3f72: d1 f7 brne .-12 ; 0x3f68 <main+0x168>
3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a> 3f74: 0e c0 rjmp .+28 ; 0x3f92 <main+0x192>
read_mem(desttype, address, length); read_mem(desttype, address, length);
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
3f6e: 85 37 cpi r24, 0x75 ; 117 3f76: 85 37 cpi r24, 0x75 ; 117
3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180> 3f78: 39 f4 brne .+14 ; 0x3f88 <main+0x188>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
3f72: 28 d0 rcall .+80 ; 0x3fc4 <verifySpace> 3f7a: 28 d0 rcall .+80 ; 0x3fcc <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
3f74: 8e e1 ldi r24, 0x1E ; 30 3f7c: 8e e1 ldi r24, 0x1E ; 30
3f76: 0c d0 rcall .+24 ; 0x3f90 <putch> 3f7e: 0c d0 rcall .+24 ; 0x3f98 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
3f78: 84 e9 ldi r24, 0x94 ; 148 3f80: 84 e9 ldi r24, 0x94 ; 148
3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch> 3f82: 0a d0 rcall .+20 ; 0x3f98 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
3f7c: 86 e0 ldi r24, 0x06 ; 6 3f84: 86 e0 ldi r24, 0x06 ; 6
3f7e: 7d cf rjmp .-262 ; 0x3e7a <main+0x7a> 3f86: 7d cf rjmp .-262 ; 0x3e82 <main+0x82>
} }
else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
3f80: 81 35 cpi r24, 0x51 ; 81 3f88: 81 35 cpi r24, 0x51 ; 81
3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188> 3f8a: 11 f4 brne .+4 ; 0x3f90 <main+0x190>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
3f84: 88 e0 ldi r24, 0x08 ; 8 3f8c: 88 e0 ldi r24, 0x08 ; 8
3f86: 18 d0 rcall .+48 ; 0x3fb8 <watchdogConfig> 3f8e: 18 d0 rcall .+48 ; 0x3fc0 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
3f88: 1d d0 rcall .+58 ; 0x3fc4 <verifySpace> 3f90: 1d d0 rcall .+58 ; 0x3fcc <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
3f8a: 80 e1 ldi r24, 0x10 ; 16 3f92: 80 e1 ldi r24, 0x10 ; 16
3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch> 3f94: 01 d0 rcall .+2 ; 0x3f98 <putch>
3f8e: 69 cf rjmp .-302 ; 0x3e62 <main+0x62> 3f96: 67 cf rjmp .-306 ; 0x3e66 <main+0x66>
00003f90 <putch>: 00003f98 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
3f90: 98 2f mov r25, r24 3f98: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UART_SRA & _BV(UDRE0))); while (!(UART_SRA & _BV(UDRE0)));
3f92: 80 91 c0 00 lds r24, 0x00C0 3f9a: 80 91 c0 00 lds r24, 0x00C0
3f96: 85 ff sbrs r24, 5 3f9e: 85 ff sbrs r24, 5
3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2> 3fa0: fc cf rjmp .-8 ; 0x3f9a <putch+0x2>
UART_UDR = ch; UART_UDR = ch;
3f9a: 90 93 c6 00 sts 0x00C6, r25 3fa2: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
3f9e: 08 95 ret 3fa6: 08 95 ret
00003fa0 <getch>: 00003fa8 <getch>:
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UART_SRA & _BV(RXC0))) while(!(UART_SRA & _BV(RXC0)))
3fa0: 80 91 c0 00 lds r24, 0x00C0 3fa8: 80 91 c0 00 lds r24, 0x00C0
3fa4: 87 ff sbrs r24, 7 3fac: 87 ff sbrs r24, 7
3fa6: fc cf rjmp .-8 ; 0x3fa0 <getch> 3fae: fc cf rjmp .-8 ; 0x3fa8 <getch>
; ;
if (!(UART_SRA & _BV(FE0))) { if (!(UART_SRA & _BV(FE0))) {
3fa8: 80 91 c0 00 lds r24, 0x00C0 3fb0: 80 91 c0 00 lds r24, 0x00C0
3fac: 84 fd sbrc r24, 4 3fb4: 84 fd sbrc r24, 4
3fae: 01 c0 rjmp .+2 ; 0x3fb2 <getch+0x12> 3fb6: 01 c0 rjmp .+2 ; 0x3fba <getch+0x12>
} }
#endif #endif
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
3fb0: a8 95 wdr 3fb8: a8 95 wdr
* don't care that an invalid char is returned...) * don't care that an invalid char is returned...)
*/ */
watchdogReset(); watchdogReset();
} }
ch = UART_UDR; ch = UART_UDR;
3fb2: 80 91 c6 00 lds r24, 0x00C6 3fba: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
3fb6: 08 95 ret 3fbe: 08 95 ret
00003fb8 <watchdogConfig>: 00003fc0 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
3fb8: e0 e6 ldi r30, 0x60 ; 96 3fc0: e0 e6 ldi r30, 0x60 ; 96
3fba: f0 e0 ldi r31, 0x00 ; 0 3fc2: f0 e0 ldi r31, 0x00 ; 0
3fbc: 98 e1 ldi r25, 0x18 ; 24 3fc4: 98 e1 ldi r25, 0x18 ; 24
3fbe: 90 83 st Z, r25 3fc6: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
3fc0: 80 83 st Z, r24 3fc8: 80 83 st Z, r24
} }
3fc2: 08 95 ret 3fca: 08 95 ret
00003fc4 <verifySpace>: 00003fcc <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) { if (getch() != CRC_EOP) {
3fc4: ed df rcall .-38 ; 0x3fa0 <getch> 3fcc: ed df rcall .-38 ; 0x3fa8 <getch>
3fc6: 80 32 cpi r24, 0x20 ; 32 3fce: 80 32 cpi r24, 0x20 ; 32
3fc8: 19 f0 breq .+6 ; 0x3fd0 <verifySpace+0xc> 3fd0: 19 f0 breq .+6 ; 0x3fd8 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
3fca: 88 e0 ldi r24, 0x08 ; 8 3fd2: 88 e0 ldi r24, 0x08 ; 8
3fcc: f5 df rcall .-22 ; 0x3fb8 <watchdogConfig> 3fd4: f5 df rcall .-22 ; 0x3fc0 <watchdogConfig>
3fce: ff cf rjmp .-2 ; 0x3fce <verifySpace+0xa> 3fd6: ff cf rjmp .-2 ; 0x3fd6 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes while (1) // and busy-loop so that WD causes
; // a reset and app start. ; // a reset and app start.
} }
putch(STK_INSYNC); putch(STK_INSYNC);
3fd0: 84 e1 ldi r24, 0x14 ; 20 3fd8: 84 e1 ldi r24, 0x14 ; 20
} }
3fd2: de cf rjmp .-68 ; 0x3f90 <putch> 3fda: de cf rjmp .-68 ; 0x3f98 <putch>
00003fd4 <getNch>: 00003fdc <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
3fd4: 1f 93 push r17 3fdc: 1f 93 push r17
3fd6: 18 2f mov r17, r24 3fde: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
3fd8: e3 df rcall .-58 ; 0x3fa0 <getch> 3fe0: e3 df rcall .-58 ; 0x3fa8 <getch>
3fda: 11 50 subi r17, 0x01 ; 1 3fe2: 11 50 subi r17, 0x01 ; 1
3fdc: e9 f7 brne .-6 ; 0x3fd8 <getNch+0x4> 3fe4: e9 f7 brne .-6 ; 0x3fe0 <getNch+0x4>
verifySpace(); verifySpace();
3fde: f2 df rcall .-28 ; 0x3fc4 <verifySpace> 3fe6: f2 df rcall .-28 ; 0x3fcc <verifySpace>
} }
3fe0: 1f 91 pop r17 3fe8: 1f 91 pop r17
3fe2: 08 95 ret 3fea: 08 95 ret
00003fe4 <appStart>: 00003fec <appStart>:
void appStart(uint8_t rstFlags) { void appStart(uint8_t rstFlags) {
// save the reset flags in the designated register // save the reset flags in the designated register
// This can be saved in a main program by putting code in .init0 (which // This can be saved in a main program by putting code in .init0 (which
// executes before normal c init code) to save R2 to a global variable. // executes before normal c init code) to save R2 to a global variable.
__asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
3fe4: 28 2e mov r2, r24 3fec: 28 2e mov r2, r24
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
3fe6: 80 e0 ldi r24, 0x00 ; 0 3fee: 80 e0 ldi r24, 0x00 ; 0
3fe8: e7 df rcall .-50 ; 0x3fb8 <watchdogConfig> 3ff0: e7 df rcall .-50 ; 0x3fc0 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
3fea: ee 27 eor r30, r30 3ff2: ee 27 eor r30, r30
3fec: ff 27 eor r31, r31 3ff4: ff 27 eor r31, r31
3fee: 09 94 ijmp 3ff6: 09 94 ijmp