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Earle F. Philhower, III decfbdda5f I2S driver fixes for IRQs, protocol, factoring (#4574)
* I2S driver fixes for IRQs, protocol, factoring

All redundant ICACHE_FLASH_ATTR decorators were removed, we already do
this by default for all routines, anyway,

The actual ISR and its called function moved to to IRAM.  Used to be in flash
due to the decorator, which could lead to crashes.  Use ets_memset to mute
buffers in ISR.

Fix the I2S on-the-wire protocol by enabling the transmit delay I2STMS because
I2S is supposed to send the MSB one clock after LRCLK toggles.  This was
causing I2S to be twice as loud as intended in the best of cases, and causing
garbage/noise output when the MSB was set since data was effectively shifted.

Refactor the clock divider setting to be done in one function only, as there
is no reason to do the same complicated bit setting in two spots.

* Comment some add'l registers, use optimstic_yield

Comment the known and unknown I2S register settings for posterity, using
the ESP32 guide as a basis.

Use optimistic_yield() instead of esp_wdt_disable/enable when busy
waiting in blocking writes to ensure we don't hog the CPU completely.

Move the constant IO pins to #defines for easier understanding.
2018-03-27 20:40:34 -03:00
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