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https://github.com/esp8266/Arduino.git
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* PoC cache configuration control Expaned boards.txt.py to allow new MMU options and create revised .ld's Updated eboot to pass 48K IRAM segments. Added Cache_Read_Enable intercept to modify call for 16K ICACHE Update platform.txt to pass new mmu options through to compiler and linker preprocessor. Added quick example: esp8266/MMU48K * Style corrections Added MMU_ qualifier to new defines. Moved changes into their own file. Don't know how to fix platformio issue. * Added detailed description for Cache_Read_Enable. Updated tools/sizes.py to report correct IRAM size and indicate ICACHE size. Merged in earlephilhower's work on unaligned exception. Refactored and added support for store operations and changed the name to be more closely aligned with its function. Improved crash reporting path. * Style and MMU_SEC_HEAP corrections. * Improved asm register usage. Added some inline functions to aid in byte and short access to iRAM. * only byte read has been tested Updated .ld file to work better with platform.io; however, I am still missing some steps, so platformio will still fail. * Interesting glitch in boards.txt after github merge. A new board in master was missing new additions added by boards.txt.py in the PR. Which the CI flags when it rebuilds boards.txt. * Support for 2nd Heap, excess IRAM, through umm_malloc. Adapted changes to umm_malloc, Esp.cpp, StackThunk.cpp, WiFiClientSecureBearSSL.cpp, and virtualmem.ino to irammem.ino from @earlephilhower PR #6994. Reworked umm_malloc to use context pointers instead of copy context. umm_malloc now supports allocations from IRAM. Added class HeapSelectIram, ... to aid in selecting alternate heaps, modeled after class InterruptLock. Restrict alloc request from ISRs to DRAM. Never ending improvements to debug printing. Sec Heap option now pulls in free IRAM left over in the 1st 32K block. Managed through umm_malloc with HeapSelectIram. Updated examples. * Post push CI cleanup. * Cleanup part II * Cleanup part III * Updates to support platformio, maybe. * Added exception C wrapper replacement. * CI Cleanup * CI Cleanup II Don't know what to do with platformio it doesn't like my .S file. ifdef out USE_ISR_SAFE_EXC_WRAPPER to block the new assemlby module from building on platformio only. * Changes to exc-c-wrapper-handler.S to assemble under platformio. * For platformio, Correction to toolchain-xtensa include path. @mcspr, Thankyou! * Temporarily added --print-memory-usage to ld parameters for cross-checking IRAM size. * undo change to platform.txt * correct merge conflict. take 1 * Fixed #if... for building umm_get_oom_count. It was not building when UMM_STATS_FULL was used. * Commented out XMC support. Compatibility issues with PoC when using 16K ICACHE. * Corrected size.py, DRAM bracketing changed to not include ICACHE with DRAM total. * Added additional _context for support of use of UMM_INLINE_METRICS. Corrected some UMM_POSION missed edits. * Changes to clear errors and warnings from toolchain 10.1 Several fixes and improvements to example MMU48K. With the improved optimization in toolchain 10.1 The example divide by 0 exception was failing with a HWDT event instead of its exception handler. The compiler saw the obscured divide by 0 and replaced it with a break point. * Isolated incompatable definitions related to _xtos_set_exception_handler. GDBSTUB definitions are different from the BootROM's. * Update tools/platformio-build.py Co-authored-by: Max Prokhorov <prokhorov.max@outlook.com> * Requested changes Changed mmu related usages of ETS_... defines to DBG_MMU_... Cleanup in example MMU48K.ino. Removed stale memory reference macro and mmu_status print statement. Cleanup printf '\n' to be '\r\n'. Improved issolation of development debug prints from the rest of the debug prints. * Corrected comment. And added missing include. * Improve comment. * style and comment correction * Added draft mmu.rst file and updated index. Updated example HeapMetric.ino to also illustrate use of IRAM Improved comments in exc-c-wrapper-handler.S. Added insurance IRQ disable. * Updated mmu.rst Improved function name uniqueness for is_iram, is_dram, and is_icache by adding prefix mmu_. Also, made them available outside of a debug build. Made pointer precision width more specific. Made some of the static inline functions in mmu_irm.h safe for ISRs by setting then for always inline. * Add a default MMU_IRAM_SIZE value for a new CI test to pass. Extended use 'umm_heap_context_t *_context' argument in ..._core functions and expanded its usage to reduce unnecessary repeated calls to umm_info(NULL, false), also removed recursion from umm_info(NULL, true). Fixed stack buffer length in umm_info_safe_printf_P and heap.cpp. Added example for creating an IRAM reserve section. Updated mmu.rst. Grammar and spelling corrections. * CI appeasement * CI appeasement with comment correction. * Ensure SYS always runs with DRAM Heap selected. * Add/move heap stack overflow/underflow check to Esp.cpp where the event was discarded. * Improved comment clarity of purpose for IramReserve.ino. Clean up MMU48K.ino * Added missing #include * Corrected usage of warning * CI appeasement and use #message not #pragma message * Updated git version of eboot.elf to match build version. Good test catch. * Remove conditional build option USE_ISR_SAFE_EXC_WRAPPER, always install. Use the replacement wrapper on non32xfer_exception_handler install. Added comments to code describing some exception handling issues. * Updated mmu.rst * Expanded and clarified comments. Limited access to some detailed typdefs/prototypes to .cpp modules, to avoid future build conflicts. Completed TODO for verifing that the "C" structure struct __exception_frame matches the ASM version. Fixed some typo's, code rot, and added some more cases in examaple irammem.ino. Refactored a little and reordered printing to ease comparison between methods. Corrected `#ifdef __cplusplus` coverage area. Cleaned up `extern "C" ...` usage. Fixes issues with including mmu_iram.h or esp8266_undocumented.h in .c files. * Style fixes and more cleanup * Style fix * Remove unnessasary IRAM_ATTR from install_non32xfer_exception_handler Some comment tuning. In the context of _xtos_set_exception_handler and the functions it registers, changed to type int for exception cause type. This is also the type used by gdbstub and some other Xtensa files I found.
295 lines
8.6 KiB
C
295 lines
8.6 KiB
C
/* Copyright (c) 2015-2016 Ivan Grokhotkov. All rights reserved.
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* This file is part of eboot bootloader.
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*
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* Redistribution and use is permitted according to the conditions of the
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* 3-clause BSD license to be found in the LICENSE file.
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include "flash.h"
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#include "eboot_command.h"
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#include <uzlib.h>
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extern unsigned char _gzip_dict;
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#define SWRST do { (*((volatile uint32_t*) 0x60000700)) |= 0x80000000; } while(0);
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extern void ets_wdt_enable(void);
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extern void ets_wdt_disable(void);
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// Converts bit of a string into a uint32
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#define S(a,b,c,d) ( (((uint32_t)a) & 0xff) | (((uint32_t)b) << 8) | (((uint32_t)c) << 16) | (((uint32_t)d)<<24) )
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int print_version(const uint32_t flash_addr)
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{
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uint32_t ver;
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if (SPIRead(flash_addr + APP_START_OFFSET + sizeof(image_header_t) + sizeof(section_header_t), &ver, sizeof(ver))) {
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return 1;
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}
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// We don't have BSS and can't print from flash, so build up string
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// 4 chars at a time. Smaller code than byte-wise assignment.
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uint32_t fmt[2];
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fmt[0] = S('v', '%', '0', '8');
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fmt[1] = S('x', '\n', 0, 0);
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ets_printf((const char*) fmt, ver);
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return 0;
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}
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int load_app_from_flash_raw(const uint32_t flash_addr)
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{
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image_header_t image_header;
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uint32_t pos = flash_addr + APP_START_OFFSET;
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if (SPIRead(pos, &image_header, sizeof(image_header))) {
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return 1;
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}
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pos += sizeof(image_header);
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for (uint32_t section_index = 0;
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section_index < image_header.num_segments;
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++section_index)
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{
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section_header_t section_header = {0};
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if (SPIRead(pos, §ion_header, sizeof(section_header))) {
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return 2;
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}
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pos += sizeof(section_header);
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const uint32_t address = section_header.address;
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bool load = false;
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if (address < 0x40000000) {
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load = true;
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}
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// The final IRAM size, once boot has completed, can be either 32K or 48K.
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// Allow for the higher in range testing.
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if (address >= 0x40100000 && address < 0x4010C000) {
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load = true;
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}
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if (address >= 0x60000000) {
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load = true;
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}
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if (!load) {
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pos += section_header.size;
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continue;
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}
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if (SPIRead(pos, (void*)address, section_header.size))
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return 3;
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pos += section_header.size;
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}
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asm volatile("" ::: "memory");
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asm volatile ("mov.n a1, %0\n"
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"mov.n a3, %1\n"
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"jx a3\n" : : "r" (0x3ffffff0), "r" (image_header.entry) );
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__builtin_unreachable(); // Save a few bytes by letting GCC know no need to pop regs/return
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return 0;
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}
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uint8_t read_flash_byte(const uint32_t addr)
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{
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uint8_t __attribute__((aligned(4))) buff[4];
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SPIRead(addr & ~3, buff, 4);
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return buff[addr & 3];
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}
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unsigned char __attribute__((aligned(4))) uzlib_flash_read_cb_buff[4096];
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uint32_t uzlib_flash_read_cb_addr;
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int uzlib_flash_read_cb(struct uzlib_uncomp *m)
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{
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m->source = uzlib_flash_read_cb_buff;
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m->source_limit = uzlib_flash_read_cb_buff + sizeof(uzlib_flash_read_cb_buff);
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SPIRead(uzlib_flash_read_cb_addr, uzlib_flash_read_cb_buff, sizeof(uzlib_flash_read_cb_buff));
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uzlib_flash_read_cb_addr += sizeof(uzlib_flash_read_cb_buff);
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return *(m->source++);
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}
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unsigned char gzip_dict[32768];
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uint8_t buffer2[FLASH_SECTOR_SIZE]; // no room for this on the stack
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int copy_raw(const uint32_t src_addr,
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const uint32_t dst_addr,
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const uint32_t size,
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const bool verify)
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{
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// require regions to be aligned
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if ((src_addr & 0xfff) != 0 ||
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(dst_addr & 0xfff) != 0) {
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return 1;
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}
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const uint32_t buffer_size = FLASH_SECTOR_SIZE;
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uint8_t buffer[buffer_size];
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int32_t left = ((size+buffer_size-1) & ~(buffer_size-1));
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uint32_t saddr = src_addr;
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uint32_t daddr = dst_addr;
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struct uzlib_uncomp m_uncomp;
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bool gzip = false;
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// Check if we are uncompressing a GZIP upload or not
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if ((read_flash_byte(saddr) == 0x1f) && (read_flash_byte(saddr + 1) == 0x8b)) {
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// GZIP signature matched. Find real size as encoded at the end
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left = read_flash_byte(saddr + size - 4);
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left += read_flash_byte(saddr + size - 3)<<8;
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left += read_flash_byte(saddr + size - 2)<<16;
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left += read_flash_byte(saddr + size - 1)<<24;
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uzlib_init();
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/* all 3 fields below must be initialized by user */
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m_uncomp.source = NULL;
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m_uncomp.source_limit = NULL;
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uzlib_flash_read_cb_addr = src_addr;
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m_uncomp.source_read_cb = uzlib_flash_read_cb;
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uzlib_uncompress_init(&m_uncomp, gzip_dict, sizeof(gzip_dict));
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int res = uzlib_gzip_parse_header(&m_uncomp);
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if (res != TINF_OK) {
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return 5; // Error uncompress header read
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}
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gzip = true;
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}
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while (left > 0) {
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if (!gzip) {
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if (SPIRead(saddr, buffer, buffer_size)) {
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return 3;
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}
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} else {
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m_uncomp.dest_start = buffer;
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m_uncomp.dest = buffer;
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int to_read = (left > buffer_size) ? buffer_size : left;
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m_uncomp.dest_limit = buffer + to_read;
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int res = uzlib_uncompress(&m_uncomp);
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if ((res != TINF_DONE) && (res != TINF_OK)) {
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return 6;
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}
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// Fill any remaining with 0xff
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for (int i = to_read; i < buffer_size; i++) {
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buffer[i] = 0xff;
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}
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}
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if (verify) {
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if (SPIRead(daddr, buffer2, buffer_size)) {
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return 4;
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}
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if (memcmp(buffer, buffer2, buffer_size)) {
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return 9;
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}
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} else {
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// Special treatment for address 0 (bootloader). Only erase and
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// rewrite if the data is different (i.e. very rarely).
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bool skip = false;
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if (daddr == 0) {
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if (SPIRead(daddr, buffer2, buffer_size)) {
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return 4;
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}
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if (!memcmp(buffer2, buffer, buffer_size)) {
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ets_putc('B'); // Note we skipped the bootloader in output
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skip = true; // And skip erase/write
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}
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}
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if (!skip) {
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if (SPIEraseSector(daddr/buffer_size)) {
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return 2;
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}
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if (SPIWrite(daddr, buffer, buffer_size)) {
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return 4;
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}
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}
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}
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saddr += buffer_size;
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daddr += buffer_size;
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left -= buffer_size;
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}
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return 0;
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}
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int main()
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{
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int res = 9;
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bool clear_cmd = false;
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struct eboot_command cmd;
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print_version(0);
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if (eboot_command_read(&cmd) == 0) {
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// valid command was passed via RTC_MEM
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clear_cmd = true;
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ets_putc('@');
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} else {
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// no valid command found
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cmd.action = ACTION_LOAD_APP;
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cmd.args[0] = 0;
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ets_putc('~');
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}
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if (cmd.action == ACTION_COPY_RAW) {
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uint32_t cp = S('c', 'p', ':', 0);
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ets_printf((const char *)&cp);
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ets_wdt_disable();
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res = copy_raw(cmd.args[0], cmd.args[1], cmd.args[2], false);
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ets_wdt_enable();
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cp = S('0' + res, '\n', 0, 0 );
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ets_printf((const char *)&cp);
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#if 0
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//devyte: this verify step below (cmp:) only works when the end of copy operation above does not overwrite the
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//beginning of the image in the empty area, see #7458. Disabling for now.
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//TODO: replace the below verify with hash type, crc, or similar.
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// Verify the copy
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uint32_t v[2];
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v[0] = S('c', 'm', 'p', ':');
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v[1] = 0;
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ets_printf(const char *)v);
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if (res == 0) {
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ets_wdt_disable();
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res = copy_raw(cmd.args[0], cmd.args[1], cmd.args[2], true);
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ets_wdt_enable();
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}
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cp = S('0' + res, '\n', 0, 0 );
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ets_printf((const char *)&cp);
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#endif
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if (res == 0) {
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cmd.action = ACTION_LOAD_APP;
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cmd.args[0] = cmd.args[1];
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}
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}
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if (clear_cmd) {
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eboot_command_clear();
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}
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if (cmd.action == ACTION_LOAD_APP) {
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ets_putc('l'); ets_putc('d'); ets_putc('\n');
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res = load_app_from_flash_raw(cmd.args[0]);
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// We will get to this only on load fail
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uint32_t e[2];
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e[0] = S('e', ':', '0' + res, '\n' );
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e[1] = 0;
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ets_printf((const char*)e);
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}
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if (res) {
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SWRST;
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}
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while(true){}
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__builtin_unreachable();
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return 0;
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}
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