mirror of
https://github.com/esp8266/Arduino.git
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353 lines
8.6 KiB
C++
353 lines
8.6 KiB
C++
/*
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HardwareSerial.cpp - esp8266 UART support
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Copyright (c) 2014 Ivan Grokhotkov. All rights reserved.
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This file is part of the esp8266 core for Arduino environment.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "Arduino.h"
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#include "cbuf.h"
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extern "C" {
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#include "osapi.h"
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#include "ets_sys.h"
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#include "mem.h"
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#include "uart_register.h"
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#include "user_interface.h"
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}
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#include "HardwareSerial.h"
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HardwareSerial Serial;
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uart_t* uart0_init(int baud_rate);
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void uart0_set_baudrate(uart_t* uart, int baud_rate);
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int uart0_get_baudrate(uart_t* uart);
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void uart0_uninit(uart_t* uart);
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void uart0_transmit(uart_t* uart, const char* buf, size_t size); // may block on TX fifo
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void uart0_wait_for_transmit(uart_t* uart);
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void uart0_transmit_char(uart_t* uart, char c); // does not block, but character will be lost if FIFO is full
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void uart_set_debug(bool enabled);
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bool uart_get_debug();
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struct uart_
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{
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int baud_rate;
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};
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#define UART_TX_FIFO_SIZE 0x80
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void ICACHE_FLASH_ATTR uart0_interrupt_handler(uart_t* uart)
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{
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uint32_t status = READ_PERI_REG(UART_INT_ST(0));
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if (status & UART_RXFIFO_FULL_INT_ST)
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{
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while(true)
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{
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int rx_count = (READ_PERI_REG(UART_STATUS(0)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT;
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if (!rx_count)
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break;
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while(rx_count--)
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{
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char c = READ_PERI_REG(UART_FIFO(0)) & 0xFF;
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Serial._rx_complete_irq(c);
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}
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}
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WRITE_PERI_REG(UART_INT_CLR(0), UART_RXFIFO_FULL_INT_CLR);
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}
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if (status & UART_TXFIFO_EMPTY_INT_ST)
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{
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WRITE_PERI_REG(UART_INT_CLR(0), UART_TXFIFO_EMPTY_INT_CLR);
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Serial._tx_empty_irq();
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}
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}
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void ICACHE_FLASH_ATTR uart0_wait_for_tx_fifo(size_t size_needed)
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{
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while (true)
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{
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size_t tx_count = (READ_PERI_REG(UART_STATUS(0)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT;
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if (tx_count <= (UART_TX_FIFO_SIZE - size_needed))
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break;
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}
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}
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size_t ICACHE_FLASH_ATTR uart0_get_tx_fifo_room()
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{
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return UART_TX_FIFO_SIZE - ((READ_PERI_REG(UART_STATUS(0)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT);
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}
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void ICACHE_FLASH_ATTR uart0_wait_for_transmit(uart_t* uart)
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{
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uart0_wait_for_tx_fifo(UART_TX_FIFO_SIZE);
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}
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void ICACHE_FLASH_ATTR uart0_transmit_char(uart_t* uart, char c)
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{
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WRITE_PERI_REG(UART_FIFO(0), c);
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}
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void ICACHE_FLASH_ATTR uart0_transmit(uart_t* uart, const char* buf, size_t size)
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{
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while (size)
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{
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size_t part_size = (size > UART_TX_FIFO_SIZE) ? UART_TX_FIFO_SIZE : size;
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size -= part_size;
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uart0_wait_for_tx_fifo(part_size);
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for(;part_size;--part_size, ++buf)
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WRITE_PERI_REG(UART_FIFO(0), *buf);
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}
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}
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void ICACHE_FLASH_ATTR uart0_flush(uart_t* uart)
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{
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SET_PERI_REG_MASK(UART_CONF0(0), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(0), UART_RXFIFO_RST | UART_TXFIFO_RST);
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}
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void ICACHE_FLASH_ATTR uart0_interrupt_enable(uart_t* uart)
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{
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WRITE_PERI_REG(UART_INT_CLR(0), 0x1ff);
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ETS_UART_INTR_ATTACH(&uart0_interrupt_handler, uart);
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SET_PERI_REG_MASK(UART_INT_ENA(0), UART_RXFIFO_FULL_INT_ENA);
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ETS_UART_INTR_ENABLE();
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}
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void ICACHE_FLASH_ATTR uart0_interrupt_disable(uart_t* uart)
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{
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CLEAR_PERI_REG_MASK(UART_INT_ENA(0), UART_RXFIFO_FULL_INT_ENA);
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ETS_UART_INTR_DISABLE();
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}
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void ICACHE_FLASH_ATTR uart0_arm_tx_interrupt()
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{
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SET_PERI_REG_MASK(UART_INT_ENA(0), UART_TXFIFO_EMPTY_INT_ENA);
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}
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void ICACHE_FLASH_ATTR uart0_disarm_tx_interrupt()
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{
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CLEAR_PERI_REG_MASK(UART_INT_ENA(0), UART_TXFIFO_EMPTY_INT_ENA);
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}
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void ICACHE_FLASH_ATTR uart0_set_baudrate(uart_t* uart, int baud_rate)
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{
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uart->baud_rate = baud_rate;
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uart_div_modify(0, UART_CLK_FREQ / (uart->baud_rate));
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}
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int ICACHE_FLASH_ATTR uart0_get_baudrate(uart_t* uart)
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{
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return uart->baud_rate;
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}
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uart_t* ICACHE_FLASH_ATTR uart0_init(int baudrate)
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{
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uart_t* uart = (uart_t*) os_malloc(sizeof(uart_t));
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
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uart0_set_baudrate(uart, baudrate);
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WRITE_PERI_REG(UART_CONF0(0), 0x3 << UART_BIT_NUM_S); // 8n1
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uart0_flush(uart);
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uart0_interrupt_enable(uart);
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WRITE_PERI_REG(UART_CONF1(0), ((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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((0x20 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S));
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return uart;
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}
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void ICACHE_FLASH_ATTR uart0_uninit(uart_t* uart)
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{
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uart0_interrupt_disable(uart);
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// TODO: revert pin functions
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os_free(uart);
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}
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void ICACHE_FLASH_ATTR uart0_swap(uart_t* uart)
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{
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_UART0_CTS);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_UART0_RTS);
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//SWAP PIN : U0TXD<==>U0RTS(MTDO, GPIO15) , U0RXD<==>U0CTS(MTCK, GPIO13)
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SET_PERI_REG_MASK(0x3ff00028 , BIT2);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_GPIO1);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_GPIO3);
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}
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void ICACHE_FLASH_ATTR
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uart_ignore_char(char c)
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{
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}
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void ICACHE_FLASH_ATTR
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uart_write_char(char c)
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{
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if (c == '\n')
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WRITE_PERI_REG(UART_FIFO(0), '\r');
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WRITE_PERI_REG(UART_FIFO(0), c);
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}
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bool s_uart_debug_enabled = true;
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void ICACHE_FLASH_ATTR uart_set_debug(bool enabled)
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{
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s_uart_debug_enabled = enabled;
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if (enabled)
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{
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system_set_os_print(1);
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ets_install_putc1((void *)&uart_write_char);
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}
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else
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ets_install_putc1((void *)&uart_ignore_char);
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}
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bool ICACHE_FLASH_ATTR uart_get_debug()
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{
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return s_uart_debug_enabled;
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}
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ICACHE_FLASH_ATTR HardwareSerial::HardwareSerial() :
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_uart(0), _rx_buffer(0), _tx_buffer(0)
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{
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}
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void ICACHE_FLASH_ATTR HardwareSerial::begin(unsigned long baud, byte config)
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{
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_rx_buffer = new cbuf(SERIAL_RX_BUFFER_SIZE);
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_tx_buffer = new cbuf(SERIAL_TX_BUFFER_SIZE);
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uart_set_debug(false);
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_uart = uart0_init(baud);
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_written = false;
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delay(1);
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}
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void ICACHE_FLASH_ATTR HardwareSerial::end()
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{
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uart0_uninit(_uart);
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delete _rx_buffer;
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delete _tx_buffer;
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_uart = 0;
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_rx_buffer = 0;
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_tx_buffer = 0;
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}
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void ICACHE_FLASH_ATTR HardwareSerial::swap()
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{
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uart0_swap(_uart);
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pinMode(1, INPUT);
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pinMode(3, INPUT);
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}
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void ICACHE_FLASH_ATTR HardwareSerial::setDebugOutput(bool en)
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{
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uart_set_debug(en);
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}
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int ICACHE_FLASH_ATTR HardwareSerial::available(void)
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{
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return static_cast<int>(_rx_buffer->getSize());
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}
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int ICACHE_FLASH_ATTR HardwareSerial::peek(void)
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{
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return _rx_buffer->peek();
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}
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int ICACHE_FLASH_ATTR HardwareSerial::read(void)
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{
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return _rx_buffer->read();
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}
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int ICACHE_FLASH_ATTR HardwareSerial::availableForWrite(void)
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{
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return static_cast<int>(_tx_buffer->room());
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}
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void ICACHE_FLASH_ATTR HardwareSerial::flush()
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{
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if (!_written)
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return;
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while (_tx_buffer->getSize() || uart0_get_tx_fifo_room() < UART_TX_FIFO_SIZE)
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yield();
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_written = false;
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}
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size_t ICACHE_FLASH_ATTR HardwareSerial::write(uint8_t c)
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{
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_written = true;
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size_t room = uart0_get_tx_fifo_room();
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if (room > 0 && _tx_buffer->empty())
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{
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uart0_transmit_char(_uart, c);
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if (room < 10)
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{
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uart0_arm_tx_interrupt();
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}
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return 1;
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}
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while (_tx_buffer->room() == 0)
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{
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yield();
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}
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_tx_buffer->write(c);
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return 1;
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}
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ICACHE_FLASH_ATTR HardwareSerial::operator bool() const
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{
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return _uart != 0;
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}
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void ICACHE_FLASH_ATTR HardwareSerial::_rx_complete_irq(char c)
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{
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_rx_buffer->write(c);
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}
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void ICACHE_FLASH_ATTR HardwareSerial::_tx_empty_irq(void)
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{
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size_t queued = _tx_buffer->getSize();
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if (!queued)
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{
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uart0_disarm_tx_interrupt();
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return;
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}
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size_t room = uart0_get_tx_fifo_room();
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int n = static_cast<int>((queued < room) ? queued : room);
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while (n--)
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{
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uart0_transmit_char(_uart, _tx_buffer->read());
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}
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}
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